FEATURES
D> 1MHz TRANSIMPEDANCE BANDWIDTH
DEXCELLENT LONG-TERM VOS STABILITY
DBIAS CURRENT: 50pA (max)
DOFFSET VOLTAGE: 25µV (max)
DDYNAMIC RANGE: 4 to 5 Decades
DDRIFT: 0.1µV/°C (max)
DGAIN BANDWIDTH: 90MHz
DQUIESCENT CURRENT: 7.5mA
DSUPPLY RANGE: 2.7V to 5.5V
DSINGLE AND DUAL VERSIONS
DMicroSize PACKAGE: MSOP-8
APPLICATIONS
DPHOTODIODE MONITORING
DPRECISION I/V CONVERSION
DOPTICAL AMPLIFIERS
DCAT-SCANNER FRONT-END
1M
RF
100k
+5V
7
2
3
4
6
OPA380
67pF
75pF
5V
RP
(Optional
Pulldown
Resistor)
VOUT
(0V to 4.4V)
Photodiode
DESCRIPTION
The OPA380 family of transimpedance amplifiers provides
high-speed (90MHz Gain Bandwidth [GBW]) operation, w ith
extremely high precision, excellent long-term stability, and
very low 1/f noise. It is ideally suited for high-speed
photodiode applications. The OPA380 features an offset
voltage of 25µV, offset drift of 0.1µV/°C, and bias current of
50pA. The OPA380 far exceeds the offset, drift, and noise
performance that conventional JFET op amps provide.
The s ignal b andwidth o f a t ransimpedance amplifier d epends
largely on the GBW of the amplifier and the parasitic
capacitance of the photodiode, as well as the feedback
resistor. The 90MHz GBW of the OPA380 enables a trans-
impedance b andwidth o f > 1 MHz i n most c onfigurations. The
OPA380 is i deally s uited f or f ast control l oops f or p o wer level
on an optical fiber.
As a result of t he h igh p recision and l ow-noise c haracteristics
of the OPA 380, a dynamic range of 4 to 5 decades can be
achieved. For example, this capability allows the
measurement o f signal currents on the order of 1nA, and up
to 100µA in a single I/V conversion stage. In contrast to
logarithmic amplifiers, the OPA380 provides very wide
bandwidth throughout the full dynamic range. By using an
external pull-down resistor to –5V, the output voltage range
can be extended to include 0V.
The OPA380 (single) is available in MSOP-8 and SO-8
packages. The OPA2380 (dual) is available in the
miniature MSOP-8 package. They are specified from
–40°C to +125°C.
OPA380 RELATED DEVICES
PRODUCT FEATURES
OPA300 150MHz CMOS, 2.7V to 5.5V Supply
OPA350 500µV VOS, 38MHz, 2.5V to 5V Supply
OPA335 10µV VOS, Zero-Drift, 2.5V to 5V Supply
OPA132 16MHz GBW , Precision FET Op Amp, ±15V
OPA656/7 230MHz, Precision FET, ±5V
LOG112 LOG amp, 7.5 decades, ±4.5V to ±18V Supply
LOG114 LOG amp, 7.5 decades, ±2.25V to ±5.5V Supply
IVC102 Precision Switched Integrator
DDC112 Dual Current Input, 20-Bit ADC
OPA380
OPA2380
SBOS291G − NOVEMBER 2003 − REVISED SEPTEMBER 2007
Precision, High-Speed
Transimpedance Amplifier
         
          
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Copyright 2003-2007, Texas Instruments Incorporated
All trademarks are the property of their respective owners.
Please be aware that an important notice concerning availability, standard warranty , and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
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2
ABSOLUTE MAXIMUM RATINGS(1)
Voltage Supply +7V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Signal Input Terminals(2), Voltage −0. 5 V t o ( V + ) + 0.5V. . . . . . . . . .
Current ±10mA. . . . . . . . . . . . . . . . . . . . .
Short-Circuit Current(3) Continuous. . . . . . . . . . . . . . . . . . . . . . . . .
Operating Temperature Range −40 °C to +125°C. . . . . . . . . . . . . . .
Storage Temperature Range −65 °C to +150°C. . . . . . . . . . . . . . . . .
Junction Temperature +150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead Temperature (soldering, 10s) +300°C. . . . . . . . . . . . . . . . . . . . .
ESD Rating (Human Body Model) 2000V. . . . . . . . . . . . . . . . . . . . . . .
(1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods
may degrade device reliability. These are stress ratings only , an d
functional operation of the device at these or any other conditions
beyond those specified is not implied.
(2) Input terminals are diode clamped to the power-supply rails. Input
signals that can swing more than 0.5V beyond the supply rails
should be current limited to 10mA or less.
(3) Short-circuit to ground; one amplifier per package.
ELECTROSTATIC DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be
handled with appropriate precautions. Failure to observe
proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
PACKAGE/ORDERING INFORMATION(1)
PRODUCT PACKAGE-LEAD PACKAGE
MARKING
OPA380
MSOP-8
AUN
OPA380
MSOP-8
AUN
OPA380
SO-8
OPA380A
OPA380
SO-8
OPA380A
OPA2380
MSOP-8
BBX
OPA2380
MSOP-8
BBX
(1) For the most current package and ordering information, see the
Package Option Addendum at the end of this document, or see
the TI web site at www.ti.com.
PIN ASSIGNMENTS
Top V iew
1
2
3
4
8
7
6
5
NC(1)
V+
Out
NC(1)
NC(1)
In
+In
V
OPA380
MSOP-8, SO-8
NOTES: (1) NC indicates no internal connection.
1
2
3
4
8
7
6
5
V+
Out B
In B
+In B
Out A
In A
+In A
V
OPA2380
MSOP-8
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3
ELECTRICAL CHARACTERISTICS: OPA380 (SINGLE), VS = 2.7V to 5.5V
Boldface limits apply over the temperature range, TA = −40°C to +125°C.
All specifications at TA = +25°C, RL = 2k connected to VS/2, and VOUT = VS/2, unless otherwise noted. OPA380
PARAMETER CONDITION MIN TYP MAX UNITS
OFFSET VOLTAGE
Input Offset Voltage VOS VS = +5V, VCM = 0V 4 25 µV
Drift dVOS/dT 0.03 0.1 µV/°C
vs Power Supply PSRR VS = +2.7V to +5.5V, VCM = 0V 2.4 10 µV/V
Over Temperature VS = +2.7V to +5.5V, VCM = 0V 10 µV/V
Long-Term Stabilit y (1) See Note (1)
Channel Separation, dc 1µV/V
INPUT BIAS CURRENT
Input Bias Current IB VCM = VS/2 3 ±50 pA
Over Temperature Typical Characteristics
Input Offset Current IOS VCM = VS/2 6 ±100 pA
NOISE
Input Voltage Noise, f = 0.1Hz to 10Hz enVS = +5V, VCM = 0V 3µVPP
Input Voltage Noise Density, f = 10kHz enVS = +5V, VCM = 0V 67 nV/Hz
Input Voltage Noise Density, f > 1MHz enVS = +5V, VCM = 0V 5.8 nV/Hz
Input Current Noise Density, f = 10kHz inVS = +5V, VCM = 0V 10 fA/Hz
INPUT VOLTAGE RANGE
Common-Mode Voltage Range VCM V− (V+) − 1.8V V
Common-Mode Rejection Ratio CMRR (V−) < VCM < (V+) – 1.8V 100 110 dB
INPUT IMPEDANCE
Differential Capacitance 1.1 pF
Common-Mode Resistance and Inverting Input
Capacitance 1013 || 3 || pF
OPEN-LOOP GAIN
Open-Loop Voltage Gain AOL 0.1V < VO < (V+) − 0.7V, VS = 5V, VCM = VS/2 110 130 dB
0.1V < VO < (V+) − 0.6V, VS = 5V, VCM = VS/2,
TA = −40°C to +85°C110 130 dB
0V < VO < (V+) − 0.7V, VS = 5V, VCM = 0V,
RP = 2kto −5V(2) 106 120 dB
0V < VO < (V+) − 0.6V, VS = 5V, VCM = 0V,
RP = 2kto −5V(2), TA = −40°C to +85°C106 120 dB
FREQUENCY RESPONSE CL = 50pF
Gain-Bandwidth Product GBW 90 MHz
Slew Rate SR G = +1 80 V/µs
Settling Time, 0.01%(3) tSVS = +5V, 4V Step, G = +1 2µs
Overload Recovery Time(4)(5) VIN × G = > VS100 ns
OUTPUT
Voltage Output Swing from Positive Rail RL = 2k400 600 mV
Voltage Output Swing from Nega tive Rail RL = 2k60 100 mV
Voltage Output Swing from Positive Rail RP = 2k to −5V(2) 400 600 mV
Voltage Output Swing from Nega tive Rail RP = 2k to −5V(2) −20 0 mV
Output Current IOUT See Typical Characteristics
Short-Circuit Current ISC 150 mA
Capacitive Load Drive CLOAD See Typical Characteristics
Open-Loop Output Impedance ROf = 1MHz, IO = 0A 40
POWER SUPPLY
Specified Voltage Range VS2.7 5.5 V
Quiescent Current IQIO = 0A 7.5 9.5 mA
Over Temperature 10 mA
TEMPERATURE RANGE
Specified and Operating Range −40 +125 °C
Storage Range −65 +150 °C
Thermal Resistance qJA
MSOP-8, SO-8 150 °C/W
(1) 300-hour life test at 150°C demonstrated randomly distributed variation approximately equal to measurement repeatability of 1µV.
(2) Tested with output connected only to RP, a pulldown resistor connected between VOUT and −5V, as shown in Figure 5. See also applications section, Achieving
Output Swing to Ground.
(3) Transimpedance frequency of 1MHz.
(4) T ime required to return to linear operation.
(5) From positive rail.
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4
ELECTRICAL CHARACTERISTICS: OPA2380 (DUAL), VS = 2.7V to 5.5V
Boldface limits apply over the temperature range, TA = −40°C to +125°C.
All specifications at TA = +25°C, RL = 2k connected to VS/2, and VOUT = VS/2, unless otherwise noted. OPA2380
PARAMETER CONDITION MIN TYP MAX UNITS
OFFSET VOLTAGE
Input Offset Voltage VOS VS = +5V, VCM = 0V 4 25 µV
Drift dVOS/dT 0.03 0.1 µV/°C
vs Power Supply PSRR VS = +2.7V to +5.5V, VCM = 0V 2.4 10 µV/V
Over Temperature VS = +2.7V to +5.5V, VCM = 0V 10 µV/V
Long-Term Stabilit y (1) See Note (1)
Channel Separation, dc 1µV/V
INPUT BIAS CURRENT
Input Bias Current, Inverting Input IB VCM = VS/2 3 ±50 pA
Noninverting Input IB VCM = VS/2 3 ±200 pA
Over Temperature Typical Characteristics
NOISE
Input Voltage Noise, f = 0.1Hz to 10Hz enVS = +5V, VCM = 0V 3µVPP
Input Voltage Noise Density, f = 10kHz enVS = +5V, VCM = 0V 67 nV/Hz
Input Voltage Noise Density, f > 1MHz enVS = +5V, VCM = 0V 5.8 nV/Hz
Input Current Noise Density, f = 10kHz inVS = +5V, VCM = 0V 10 fA/Hz
INPUT VOLTAGE RANGE
Common-Mode Voltage Range VCM V− (V+) − 1.8V V
Common-Mode Rejection Ratio CMRR (V−) < VCM < (V+) – 1.8V 95 105 dB
INPUT IMPEDANCE
Differential Capacitance 1.1 pF
Common-Mode Resistance and Inverting Input
Capacitance 1013 || 3 || pF
OPEN-LOOP GAIN
Open-Loop Voltage Gain AOL 0.12V < VO < (V+) − 0.7V, VS = 5V, VCM = VS/2 110 130 dB
0.12V < VO < (V+) − 0.6V, VS = 5V, VCM = VS/2,
TA = −40°C to +85°C110 130 dB
0V < VO< (V+) − 0.7V, VS = 5V, VCM = 0V,
RP = 2kto −5V(2) 106 120 dB
0V < VO < (V+) − 0.6V, VS = 5V, VCM = 0V,
RP = 2kto −5V(2), TA = −40°C to +85°C106 120 dB
FREQUENCY RESPONSE CL = 50pF
Gain-Bandwidth Product GBW 90 MHz
Slew Rate SR G = +1 80 V/µs
Settling Time, 0.01%(3) tSVS = +5V, 4V Step, G = +1 2µs
Overload Recovery Time(4)(5) VIN × G = > VS100 ns
OUTPUT
Voltage Output Swing from Positive Rail RL = 2k400 600 mV
Voltage Output Swing from Nega tive Rail RL = 2k80 120 mV
Voltage Output Swing from Positive Rail RP = 2k to −5V(2) 400 600 mV
Voltage Output Swing from Nega tive Rail RP = 2k to −5V(2) −20 0 mV
Output Current IOUT See Typical Characteristics
Short-Circuit Current ISC 150 mA
Capacitive Load Drive CLOAD See Typical Characteristics
Open-Loop Output Impedance ROf = 1MHz, IO = 0A 40
POWER SUPPLY
Specified Voltage Range VS2.7 5.5 V
Quiescent Current (per amplifier) IQIO = 0A 7.5 9.5 mA
Over Temperature 10 mA
TEMPERATURE RANGE
Specified and Operating Range −40 +125 °C
Storage Range −65 +150 °C
Thermal Resistance qJA
MSOP-8 150 °C/W
(1) 300-hour life test at 150°C demonstrated randomly distributed variation approximately equal to measurement repeatability of 1µV.
(2) Tested with output connected only to RP, a pulldown resistor connected between VOUT and −5V, as shown in Figure 5. See also applications section, Achieving
Output Swing to Ground.
(3) Transimpedance frequency of 1MHz.
(4) T ime required to return to linear operation.
(5) From positive rail.
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5
TYPICAL CHARACTERISTICS: VS = +2.7V to +5.5V
All specifications at TA = +25°C, RL = 2kconnected to VS/2, and VOUT = VS/2, unless otherwise noted.
140
120
100
80
60
40
20
0
20
OPEN−LOOP GAIN AND PHASE vs FREQUENCY
Frequency (Hz)
Open−Loop Gain (dB)
90
45
0
45
90
135
180
225
270
Phase (_)
10 100 10M1M10k 100k1k 100M
Gain
Phase
160
140
120
100
80
60
40
20
0
20
POWER−SUPPLY REJECTION RATIO AND
COMMON−MODE REJECTION vs FREQUENCY
Frequency (Hz)
PSRR, CMRR (dB)
0.1 1 100k 10M1M1k 10k10 100 100M
PSRR
CMRR
1000
100
10
1
INPUT VOLTAGE NOISE SPECTRAL DENSITY
Frequency (Hz)
Input Voltage Noise (nV/(Hz)
10 100 100k 1M10k1k 10M
8
7
6
5
4
3
2
1
0
QUIESCENT CURRENT vs TEMPERATURE
Temperature (_C)
Quiescent Current (mA)
40 25 0 25 50 75 100 125
VS= +2.7V
VS=+5.5V
8
7
6
5
4
3
2
1
QUIESCENT CURRENT vs SUPPLY VOLTAGE
Supply Voltage (V)
Quiescent Current (mA)
2.7 3.0 3.5 4.0 4.5 5.0 5.5
1000
100
10
1
INPUT BIAS CURRENT vs TEMPERATURE
Temperature (_C)
Input Bias Current (pA)
40 100 125
25 0 25 50 75
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TYPICAL CHARACTERISTICS: VS = +2.7V to +5.5V (continued)
All specifications at TA = +25°C, RL = 2kconnected to VS/2, and VOUT = VS/2, unless otherwise noted.
25
20
15
10
5
0
5
10
15
20
25
INPUT BIAS CURRENT
vs INPUT COMMON−MODE VOLTAGE
Input Common−Mode Voltage (V)
IB
+IB
Input Bias Current (pA)
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
+125_C+25_C40_C
Output Swing (V)
50 100 1500
(V+)
(V+) 1
(V+) 2
(V)+2
(V)+1
(V)
Output Current (mA)
40 100 125
250 255075
SHORT−CIRCUIT CURRENT vs TEMPERATURE
Short−Circuit Current(mA)
200
150
100
50
0
50
100
150
Temperature (_C)
VS=5V
+ISC
ISC
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
Offset Voltage (µV)
25 20 15 10 50 5 10152025
Population
OFFSET VOLTAGE DRIFT
PRODUCTION DISTRIBUTION
Offset Voltage Drift (µV/_C)
0.10 0.08 0.06 0.04 0.02 0 0.020.040.060.08 0.1
Population
GAIN BANDWIDTH vs POWER SUPPLY VOLTAGE
Gain Bandwidth (MHz)
3.5 4.5 5.52.5
95
90
85
80
75
70
Power Supply Voltage (V)
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TYPICAL CHARACTERISTICS: VS = +2.7V to +5.5V (continued)
All specifications at TA = +25°C, RL = 2kconnected to VS/2, and VOUT = VS/2, unless otherwise noted.
CF
Circuit for Transimpedance Amplifier Characteristic curves on this page.
RF
CDIODE
OPA380
CSTRAY
TRANSIMPEDANCEAMP CHARACTERISTIC
100
140
130
120
110
100
90
80
70
60
50
40
30
20 1k 10k 100k 1M 10M 100M
Frequency (Hz)
Transimpedance Gain (V/Ain dB)
RF=10M
CSTRAY (parasitic) = 0.2pF
CDIODE = 100pF
RF=1M
CF=0.5pF
RF=100k
RF= 10k
RF=1k
CF= 2pF
CF= 5pF
CF=18pF
TRANSIMPEDANCEAMP CHARACTERISTIC
100
140
130
120
110
100
90
80
70
60
50
40
30
20 1k 10k 100k 1M 10M 100M
Frequency (Hz)
Transimpedance Gain (V/Ain dB)
RF=10M
RF=1M
CF=0.5pF
RF=100k
RF= 10k
RF=1k
CF=1.5pF
CF= 4pF
CF=12pF
CSTRAY (parasitic) = 0.2pF
CDIODE = 50pF
TRANSIMPEDANCEAMP CHARACTERISTIC
100
140
130
120
110
100
90
80
70
60
50
40
30 1k 10k 100k 1M 10M 100M
Frequency (Hz)
Transimpedance Gain (V/Ain dB)
RF=10M
RF=1M
RF=100k
RF= 10k
RF=1k
CF=1pF
CF= 2.5pF
CF= 7pF
CSTRAY (parasitic) = 0.2pF
CDIODE = 20pF
TRANSIMPEDANCEAMP CHARACTERISTIC
100
140
130
120
110
100
90
80
70
60
50
40
30 1k 10k 100k 1M 10M 100M
Frequency (Hz)
Transimpedance Gain (V/Ain dB)
RF=10M
RF=1M
RF=100k
RF= 10k
RF=1k
CF= 0.5pF
CF= 2pF
CF= 5pF
CSTRAY (parasitic) = 0.2pF
CDIODE =10pF
TRANSIMPEDANCEAMP CHARACTERISTIC
100
140
130
120
110
100
90
80
70
60
50
40 1k 10k 100k 1M 10M 100M
Frequency (Hz)
Transimpedance Gain (V/Ain dB)
RF= 10M
RF=1M
RF=100k
RF= 10kRF=1k
CF=0.5pF
CF=1pF
CF=2.5pF
CSTRAY (parasitic) = 0.2pF
CDIODE =1pF
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TYPICAL CHARACTERISTICS: VS = +2.7V to +5.5V (continued)
All specifications at TA = +25°C, RL = 2kconnected to VS/2, and VOUT = VS/2, unless otherwise noted.
SMALL−SIGNAL OVERSHOOT vs LOAD CAPACITANCE
Overshoot (%)
100 100010
50
45
40
35
30
25
20
15
10
5
0
Load Capacitance (pF)
RS=100
No RS
5V
VOUT
RP=2k
C
RS
+5V
OPA380
2.5pF
10k
SMALL−SIGNAL OVERSHOOT vs LOAD CAPACITANCE
Overshoot (%)
100 100010
50
45
40
35
30
25
20
15
10
5
0
Load Capacitance (pF)
RS=100
No RS
VOUT
RF=2kC
RS
+2.5V
2.5V
OPA380
2.5pF
10k
OVERLOAD RECOVERY
00 0.8mA/div 2V/div
Time (100ns/div)
3.2pF
VP
VOUT
2k
50k
+5V
IIN
1.6mA
VP=0V
VP=5V
VOUT
IIN
SMALL−SIGNAL STEP RESPONSE
50mV/div
Time (100ns/div)
RL=2k
LARGE−SIGNAL STEP RESPONSE
1V/div
Time (100ns/div)
RL=2k
10k
2.5V
2.5V
2k
2.5pF
CHANNEL SEPARATION vs INPUT FREQUENCY
10
140
120
100
80
60
40
20
0100 1k 10k 100k 1M 10M 100M
Frequency (Hz)
Channel Separation (dB)
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APPLICATIONS INFORMATION
BASIC OPERATION
The OPA380 is a high-performance transimpedance
amplifier with very low 1/f noise. As a result of its unique
architecture, the OPA380 has excellent long-term input
voltage offset stability—a 300-hour life test at 150°C
demonstrated randomly distributed variation
approximately equal to measurement repeatability of
1µV.
The OPA380 performance results from an internal
auto-zero amplifier combined with a high-speed
amplifier. The OPA380 has been designed with circuitry
to improve overload recovery and settling time over a
traditional composite approach. It has been specifically
designed and characterized to accommodate circuit
options to allow 0V output operation (see Figure 3).
The OPA380 is used in inverting configurations, with t h e
noninverting input used as a fixed biasing point.
Figure 1 shows the OPA380 in a typical configuration.
Power-supply pins should be bypassed with 1µF ceramic
or tantalum capacitors. Electrolytic capacitors are not
recommended.
OPA380 VOUT(1)
(0.5V to 4.4V)
VBIAS =0.5V
+5V 1µF
RF
CF
λ
NOTE: (1) VOUT = 0.5V in dark conditions.
Figure 1. OPA380 Typical Configuration
OPERATING VOLTAGE
The OPA380 series op amps are fully specified from
2.7V to 5.5V over a temperature range of −40°C to
+125°C. Parameters that vary significantly with operat-
ing voltages or temperature are shown in the Typical
Characteristics.
INTERNAL OFFSET CORRECTION
The OPA380 series op amps use an auto-zero topology
with a time-continuous 90MHz op amp in the signal
path. This amplifier is zero-corrected every 100µs using
a proprietary technique. Upon power-up, the amplifier
requires approximately 400µs to achieve specified VOS
accuracy, which includes one full auto-zero cycle of
approximately 100 µs and the start-up time for the bias
circuitry. Prior to this time, the amplifier will function
properly but with unspecified offset voltage.
This design has virtually no aliasing and very low noise.
Zero correction occurs at a 10kHz rate, but there is very
little fundamental noise energy present at that
frequency due to internal filtering. For all practical
purposes, any glitches have energy at 20MHz or higher
and are easily filtered, if required. Most applications are
not sensitive to such high-frequency noise, and no
filtering is required.
INPUT VOLTAGE
The input common-mode voltage range of the OPA380
series extends from V− to (V+) – 1.8V. With input
signals above this common-mode range, the amplifier
will no longer provide a valid output value, but it will not
latch or invert.
INPUT OVERVOLTAGE PROTECTION
Device inputs are protected by ESD diodes that will
conduct if the input voltages exceed the power supplies
by more than approximately 500mV. Momentary
voltages greater than 500mV beyond the power supply
can be tolerated if the current is limited to 10mA. The
OPA380 series feature no phase inversion when the
inputs extend beyond supplies if the input is current
limited.
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10
OUTPUT RANGE
The OPA380 is specified to swing within at least 600mV
of the positive rail and 100mV of the negative rail with
a 2 k load with excellent linearity. Swing to the negative
rail while maintaining good linearity can be extended t o
0V—see the section, Achieving Output Swing to
Ground. See the Typical Characteristic curve, Output
Voltage Swing vs Output Current.
The OPA380 can swing slightly closer than specified to
the positive rail; however, linearity will decrease and a
high-speed overload recovery clamp limits the amount
of positive output voltage swing available, as shown in
Figure 2.
20
15
10
5
0
5
10
15
20
OFFSET VOLTAGE vs OUTPUT VOLTAGE
VOUT (V)
VOS (µV)
012345
VS=5V
RP=2k
connected to 5V
RL=2k
connected to VS/2
Effect of clamp
Figure 2. Effect of High-Speed Overload
Recovery Clamp on Output Voltage
OVERLOAD RECOVERY
The OPA380 has been designed to prevent output
saturation. After being overdriven to the positive rail, it
will typically require only 100ns to return to linear
operation. The time required for negative overload
recovery is greater, unless a pull-down resistor
connected to a more negative supply is used to extend
the output swing all the way to the negative rail—see th e
following section, Achieving Output Swing to Ground.
ACHIEVING OUTPUT SWING TO GROUND
Some applications require output voltage swing from
0V to a positive full-scale voltage (such as +4.096V)
with excellent accuracy. With most single-supply op
amps, problems arise when the output signal
approaches 0V, near the lower output swing limit of a
single-supply op amp. A good single-supply op amp
may swing close to single-supply ground, but will not
reach 0V.
The output of the OPA380 can be made to swing to
ground, or slightly below, on a single-supply power
source. This extended output swing requires the use of
another resistor and an additional negative power
supply. A pull-down resistor may be connected between
the output and the negative supply to pull the output
down to 0V. See Figure 3.
OPA380 VOUT
RF
RP=2k
V+ = +5V
V=Gnd
VP=5V
Negative Supply
λ
Figure 3. Amplifier with Optional Pull-Down
Resistor to Achieve VOUT = 0V
The OPA380 has an output stage that allows the output
voltage to b e pulled to its negative supply rail using this
technique. However, this technique only works with
some types of output stages. The OPA380 has been
designed to perform well with this method. Accuracy is
excellent down to 0V. Reliable operation is assured over
the specified temperature range.
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11
BIASING PHOTODIODES IN SINGLE-SUPPLY
CIRCUITS
The +IN input can be biased with a positive DC voltage
to offset the output voltage and allow the amplifier
output to i n d icate a true zero photodiode measurement
when the photodiode is not exposed to any light. It will
also prevent the added delay that results from coming
out of the negative rail. This bias voltage appears
across the photodiode, providing a reverse bias for
faster operation. An RC filter placed at this bias point will
reduce noise, as shown in Figure 4. This bias voltage
can also serve as an offset bias point for an ADC with
range that does not include ground.
OPA380 VOUT
100k
V+
RF
10M
CF(1)
<1pF
0.1µF
λ
NOTE: (1) CFis optional to prevent gain peaking.
It includes the stray capacitance of RF.
+VBias
Figure 4. Filtered Reverse Bias Voltage
TRANSIMPEDANCE AMPLIFIER
Wide bandwidth, low input bias current, and low input
voltage and current noise make the OPA380 an ideal
wideband photodiode transimpedance amplifier.
Low-voltage noise is important because photodiode
capacitance causes the effective noise gain of the
circuit to increase at high frequency.
The key elements to a transimpedance design are
shown in Figure 5:
the total input capacitance (CTOT), consisting of the
photodiode capacitance (CDIODE) plus the parasitic
common-mode and differential-mode input
capacitance (3pF + 1.1pF for the OPA380);
the desired transimpedance gain (RF);
the Gain Bandwidth Product (GBW) for the
OPA380 (90MHz).
With these three variables set, the feedback capacitor
value ( C F) can be set to control the frequency response.
CSTRAY is the stray capacitance of RF, which is 0.2pF for
a typical surface-mount resistor.
To achieve a maximally flat, 2nd-order, Butterworth
frequency response, the feedback pole should be set
to:
1
2pRFǒCF)CSTRAYǓ+GBW
4pRFCTOT
Ǹ
Bandwidth is calculated by:
f*3dB +GBW
2pRFCTOT
ǸHz
These equations will result in maximum
transimpedance bandwidth. For even higher
transimpedance bandwidth, the high-speed CMOS
OPA300 (SBOS271 (180MHz GBW)), or the OPA656
(SBOS196 (230MHz GBW)) may be used.
For additional information, refer to Application Bulletin
AB−050 (SBOA055), Compensate Transimpedance
Amplifiers Intuitively, available for download at
www.ti.com.
CTOT(3) OPA380 VOUT
5V
10M
+5V
RF
CF(1)
CSTRAY(2)
λ
NOTE: (1) CFis optional to prevent gain peaking.
(2) CSTRAY is the stray capacitance of RF
(typically, 0.2pF for a surface−mount resistor).
(3) CTOT is the photodiode capacitance plus OPA380
input capacitance.
RP(optional
pulldown resistor)
Figure 5. Transimpedance Amplifier
(1)
(2)
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12
TRANSIMPEDANCE BANDWIDTH AND
NOISE
Limiting the gain set by RF can decrease the noise
occurring at the output of the transimpedance circuit.
However, all required gain should occur in the
transimpedance stage, since adding gain after the
transimpedance amplifier generally produces poorer
noise performance. The noise spectral density
produced by RF increases with the square-root of RF,
whereas the signal increases linearly. Therefore,
signal-to-noise ratio is improved when all the required
gain is placed in the transimpedance stage.
Total noise increases with increased bandwidth. Limit
the circuit bandwidth to only that required. Use a
capacitor, CF, across the feedback resistor, RF, to limit
bandwidth, even if not required for stability if total output
noise is a concern.
Figure 6a shows the transimpedance circuit without any
feedback capacitor. The resulting transimpedance gain
of this circuit is shown in Figure 7. The –3dB point is
approximately 10MHz. Adding a 16pF feedback
capacitor (Figure 6b) will limit the bandwidth and result
in a –3dB point at approximately 1MHz (see Figure 7).
Output noise will be further reduced by adding a filter
(RFILTER and CFILTER) to create a second pole (Figure
6c). This second pole is placed within the feedback loop
to maintain the amplifier’s low output impedance. (If the
pole was placed outside the feedback loop, an
additional buffer would be required and would
inadvertently increase noise and dc error).
Using RDIODE to represent the equivalent diode
resistance, and CTOT for equivalent diode capacitance
plus OPA380 input capacitance, the noise zero, fZ, is
calculated by:
fZ+ǒRDIODE )RFǓ
2pRDIODERFǒCTOT )CFǓ
OPA380 VOUT
VBIAS
RF=10k
(a)
λ
CSTRAY =0.2pF
CF=16pF
OPA380 VOUT
VBIAS
RF= 10k
(b)
λ
CSTRAY =0.2pF
VOUT
CFILTER
= 796pF
RFILTER
= 100
CF= 21pF
OPA380
VBIAS
RF=10k
(c)
λ
CSTRAY =0.2pF
Figure 6. Transimpedance Circuit Configurations
with Varying Total and Integrated Noise Gain
(3)
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13
110
80
50
20
10
Frequency (Hz)
Transimpedance Gain (dB)
100 10k1k 1M 10M100k 100M
3dB BW at 1MHz
SeeFigure6a
CDIODE = 10pF
SeeFigure6c
SeeFigure6b
Figure 7. Transimpedance Gains for Circuits in
Figure 6
The effect of these circuit configurations on ou t put noise
is shown in Figure 8 and on integrated output noise in
Figure 9. A 2-pole Butterworth filter (maximally flat in
passband) i s created by selecting the filter values using
the equation:
CFRF+2CFILTERRFILTER
with:
f*3dB +1
2pRFRFILTERCFCFILTER
Ǹ
The circuit in Figure 6b rolls off at 20dB/decade. The
circuit with the additional filter shown in Figure 6c rolls
off at 40dB/decade, resulting in improved noise
performance.
300
200
100
0
Frequency (Hz)
Output Noise (nV/Hz)
CDIODE = 10pF
SeeFigure6a
See Figure 6b
SeeFigure6c
110010 10k1k 1M 10M100k 100M
Figure 8. Output Noise for Circuits in Figure 6
500
400
300
200
100
0
Frequency (Hz)
110010 10k1k 1M 10M100k 100M
419µV
30µV
86µV
CDIODE = 10pF
See Figure 6a
See Figure 6b
SeeFigure6c
Integrated O utput Noise (µVrms)
Figure 9. Integrated Output Noise for Circuits in
Figure 6
Figure 10 shows the effect of diode capacitance on
integrated output noise, using the circuit in Figure 6c.
For additional information, refer to Noise Analysis of
FET Transimpedance Amplifiers (SBOA060), and
Noise Analysis for High-Speed Op Amps (SBOA066),
available for download from the TI web site.
80
60
0
20
0
Frequency (Hz)
1 10010 10k1k 1M 10M100k 100M
CDIODE
= 100pF
CDIODE
= 10pF
CDIODE
= 1pF
See Figure 6c
CDIODE
= 50pF 50µV
35µV
30µV
27µV
79µV
CDIODE
= 20pF
Integrated Output Noise (µVrms)
Figure 10. Integrated Output Noise for Various
Values of CDIODE for Circuit in Figure 6c
(4)
(5)
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14
BOARD LAYOUT
Minimize photodiode capacitance and stray
capacitance at the summing junction (inverting input).
This capacitance causes the voltage noise of the op
amp to be amplified (increasing amplification at high
frequency). Using a low-noise voltage source to
reverse-bias a photodiode can significantly reduce its
capacitance. Smaller photodiodes have lower
capacitance. Use optics to concentrate light on a small
photodiode.
Circuit board leakage can degrade the performance of
an otherwise well-designed amplifier. Clean the circuit
board carefully. A circuit board guard trace that
encircles the summing junction and is driven at the
same voltage can help control leakage, as shown in
Figure 11.
Guard Ring
RF
VOUT
OPA380
λ
Figure 11. Connection of Input Guard
OTHER WAYS TO MEASURE SMALL
CURRENTS
Logarithmic amplifiers are used to compress extremely
wide dynamic range input currents to a much narrower
range. Wide input dynamic ranges of 8 decades, or
100pA to 10mA, can be accommodated for input to a
12-bit ADC. (Suggested products: LOG101, LOG102,
LOG104, and LOG112.)
Extremely small currents can be accurately measured
by integrating currents on a capacitor. (Suggested
product: IVC102.)
Low-level currents can be converted to high-resolution
data words. (Suggested product: DDC112.)
For further information on the range of products
available, search www.ti.com using the above specific
model names or by using keywords transimpedance
and logarithmic.
CAPACITIVE LOAD AND STABILITY
The OPA380 series op amps can drive up to 500pF pure
capacitive load. Increasing the gain enhances the
amplifier’s ability to drive greater capacitive loads (see
the Typical Characteristic curve, Small-Signal
Overshoot vs Capacitive Load).
One method of improving capacitive load drive in the
unity-gain configuration is to insert a 10 to 20
resistor in series with the load. This reduces ringing with
large capacitive loads while maintaining DC accuracy.
DRIVING FAST 16-BIT ANALOG-TO-DIGITAL
CONVERTERS (ADC)
The OPA380 series is optimized for driving a fast 16-bit
ADC such as the ADS8411. The OPA380 op amp
buffers the converter’s input capacitance and resulting
charge injection while providing signal gain. Figure 12
shows the OPA380 in a single-ended method of
interfacing the ADS8411 16-bit, 2MSPS ADC. For
additional information, refer to the ADS8411 data sheet.
OPA380
RF
15
6800pF
ADS8411
CF
RC Values shown are optimized for the
ADS8411values may vary for other ADCs.
Figure 12. Driving 16-Bit ADCs
OPA380
RF
R1
(Provides high−speed amplification
with very low offset and drift.)
VOUT
CF
VIN
Figure 13. OPA380 Inverting Gain Configuration
PACKAGE OPTION ADDENDUM
www.ti.com 16-Aug-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
OPA2380AIDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
OPA2380AIDGKRG4 ACTIVE VSSOP DGK 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
OPA2380AIDGKT ACTIVE VSSOP DGK 8 250 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
OPA2380AIDGKTG4 ACTIVE VSSOP DGK 8 250 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
OPA380AID ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA380AIDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA380AIDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
OPA380AIDGKRG4 ACTIVE VSSOP DGK 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
OPA380AIDGKT ACTIVE VSSOP DGK 8 250 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
OPA380AIDGKTG4 ACTIVE VSSOP DGK 8 250 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
OPA380AIDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA380AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
PACKAGE OPTION ADDENDUM
www.ti.com 16-Aug-2012
Addendum-Page 2
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
OPA2380AIDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
OPA2380AIDGKT VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
OPA380AIDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
OPA380AIDGKT VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
OPA380AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Aug-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
OPA2380AIDGKR VSSOP DGK 8 2500 367.0 367.0 35.0
OPA2380AIDGKT VSSOP DGK 8 250 210.0 185.0 35.0
OPA380AIDGKR VSSOP DGK 8 2500 367.0 367.0 35.0
OPA380AIDGKT VSSOP DGK 8 250 210.0 185.0 35.0
OPA380AIDR SOIC D 8 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Aug-2012
Pack Materials-Page 2
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