74AC138SCX - FAIRCHILD SEMICONDUCTOR

November 1988

Revised July 2003

74AC138 • 74ACT138 1-of-8 Decoder/Demult iplexer

74AC138 • 74ACT138

1-of-8 Decoder/Demultiplexer

General Description

The AC/ACT138 is a high-speed 1-of-8 decoder/demulti-

plexer. This device is ideally suited for high-speed bipolar

memory chip select address decoding. The multiple input

enables allow parallel expansion to a 1-of-24 decoder

using just three AC/ACT138 devices or a 1-of-32 decoder

using four AC/ACT138 devices and one inverter.

Features

■ICC reduced by 50%

■Demultiplexing capability

■Multiple input enable for easy expansion

■Active LOW mutually exclusive outputs

■Outputs source/sink 24 mA

■ACT138 has TTL-compatible inputs

Ordering Code:

Device a ls o av ailable in Tape and Reel. Specify by a ppending s uffix let te r “X” to the or dering co de.

Connection Diagram

Pin Descriptions

Logic Symbols

IEEE/IEC

FACT is a trademark of Fairchild Semiconductor Corporation.

Order Number Package Number Package Description

74AC138SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74AC138SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74AC138MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

74AC138PC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

74ACT138SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74ACT138SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74ACT138PC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Pin Names Description

A0–A2Address Inputs

E1–E2Enable Inputs

E3Enable Input

O0–O7Outputs

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74AC138 • 74ACT138

Truth Table

H = HIGH Voltage Le ve l L = LOW Voltage Level X = Immaterial

Functional Description

The AC/ACT138 high-speed 1-of-8 decoder/demultiplexer

accepts three binary weighted inputs (A0, A1, A2) and,

when enabled, provides eight mutually exclusive active-

LOW outputs (O0–O7). The AC/ACT138 features three

Enable inputs, two active-LOW (E1, E2) and one active-

HIGH (E3). All outputs will be HIGH unless E1 and E2 are

LOW and E3 is HIGH. This multiple ena ble function a llows

easy para llel expansion of the device to a 1-of-32 (5 lines

to 32 li ne s) d eco der with j u st fo ur AC /ACT1 38 d evice s an d

one i nverter (see Figure 1). The AC/ACT13 8 can be use d

as an 8-output demultiplexer by using one of the active

LOW En abl e inp uts as the da ta in put and the oth er E nab le

inputs as strobes. The Enable inputs which are not used

must be pe rmanently tied to their appro priate active-H IGH

or active-LOW state.

Logic Diagram

Please note that this diagram is provided only for the understanding of logic

operations and should not be used to estimate propagation delays.

FIGURE 1. Expansion to 1-of-32 Decoding

Inputs Outputs

E1E2E3A0A1A2O0O1O2O3O4O5O6O7

HXXXXXHHHHHHHH

XHXXXXHHHHHHHH

XXLXXXHHHHHHHH

LLHLLLLHHHHHHH

LLHHLLHLHHHHHH

LLHLHLHHLHHHHH

LLHHHLHHHLHHHH

LLHLLHHHHHLHHH

LLHHLHHHHHHLHH

LLHLHHHHHHHHLH

LLHHHHHHHHHHHL

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74AC138 • 74ACT138

Absolute Maximum Ratings(Note 1) Recommended Operating

Conditions

Note 1: Absol ut e maximum ratings are thos e values beyond which damage

to the dev ice may occ ur. The databoo k specific ations sh ould be m et, with-

out exc eption, to e nsure that the system des ign is reliable over its power

supply, temperature, and output/input loading variables. Fairchild does not

recommend operation of FACT circuits outside da t abook spe c if ic at ions.

DC Electrical Characteristics for AC

Note 2: All outputs lo aded; thre sholds on input as s oc iated with outpu t un der test.

Note 3: Maximum test duration 2.0 ms, one output loaded at a time.

Note 4: IIN and ICC @ 3.0V are gu aranteed to be less t han or equa l t o th e respectiv e limit @ 5.5V VCC.

Supply Voltage (VCC)−0.5V to +7.0V

DC Input Diode Current (IIK)

VI = −0.5V −20 mA

VI = VCC + 0.5V +20 mA

DC Input Voltage (VI)−0.5V to VCC + 0.5V

DC Output Diode Current (IOK)

VO = −0.5V −20 mA

VO = VCC + 0.5V +20 mA

DC Output Voltage (VO)−0.5V to VCC + 0.5V

DC Output Source

or Sink Current (IO)±50 mA

DC VCC or Ground Current

per Output Pin (ICC or IGND)±50 mA

Storage Temperature (TSTG)−65°C to +150°C

Junction Temperature (TJ)

PDIP 140°C

Supply Voltage (VCC)

AC 2.0V to 6.0V

ACT 4.5V to 5.5V

Input Voltage (VI)0V to V

Output Voltage (VO)0V to V

Operating Temperature (TA)−40°C to +85°C

Minimum Input Edge Rate (∆V/∆t)

AC Devices

VIN from 30% to 70% of VCC

VCC @ 3.3V, 4.5V, 5.5 V 125 mV/ns

Minimum Input Edge Rate (∆V/∆t)

ACT Devices

VIN from 0.8V to 2.0V

VCC @ 4.5V, 5.5V 125 mV/ns

Symbol Parameter VCC TA = +25°CT

A = −40°C to +85°CUnits Conditions

(V) Typ Guaranteed Limits

VIH Minimum HIGH Level 3.0 1.5 2.1 2.1 VOUT = 0.1V

Input Voltage 4.5 2.25 3.15 3.15 V or VCC − 0.1V

5.5 2.75 3.85 3.85

VIL Maximum LOW Level 3.0 1.5 0.9 0.9 VOUT = 0.1V

Input Voltage 4.5 2.25 1.35 1.35 V or VCC − 0.1V

5.5 2.75 1.65 1.65

VOH Minimum HIGH Level 3.0 2.99 2.9 2.9

Output Voltage 4.5 4.49 4.4 4.4 V IOUT = −50 µA

5.5 5.49 5.4 5.4 VIN = VIL or VIH

3.0 2.56 2.46 IOH = −12 mA

4.5 3.86 3.76 V IOH = −24 mA

5.5 4.86 4.76 IOH = −24 mA (Note 2)

VOL Maximum LOW Level 3.0 0.002 0.1 0.1

Output Voltage 4.5 0.001 0.1 0.1 V IOUT = 50 µA

5.5 0.001 0.1 0.1 VIN = VIL or VIH

3.0 0.36 0.44 IOL = 12 mA

4.5 0.36 0.44 V IOL = 24 mA 0

5.5 0.36 0.44 IOL = 24 mA (Note 2)

IIN Maximum Input 5.5 ±0.1 ±1.0 µAV

I = VCC, GND

(Note 4) Leakage Current

IOLD Minimum Dynamic 5.5 75 mA VOLD = 1.65V Max

IOHD Output Current (Note 3) 5.5 −75 mA VOHD = 3.85V Min

ICC

(Note 4) Maximum Quiescent

Supply Curre nt 5.5 4.0 40.0 µAV

IN = VCC or GND

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74AC138 • 74ACT138

DC Electrical Characteristics for ACT

Note 5: All outputs loaded; th resholds on input associate d w it h output under tes t.

Note 6: Maximum test du ration 2.0 m s, one out put loaded a t a tim e.

AC Electrical Characteristics for AC

Note 7: Voltage Range 3.3 is 3.3V ± 0. 3V

Voltage Range 5. 0 is 5. 0V ± 0.5V

Symbol Parameter VCC TA = +25°CT

A = −40°C to +85°CUnits Conditions

(V) Typ Guaranteed Limits

VIH Minimum HIGH Level 4.5 1.5 2.0 2 .0 VVOUT = 0.1V

Input Voltage 5.5 1.5 2.0 2.0 or VCC − 0.1V

VIL Maximum LOW Level 4.5 1.5 0.8 0.8 VVOUT = 0.1V

Input Voltage 5.5 1.5 0.8 0.8 or VCC − 0.1V

VOH Minimum HIGH Level 4.5 4.49 4.4 4.4 VI

OUT = −50 µA

Output Voltage 5.5 5.49 5.4 5.4 VIN = VIL or VIH

4.5 3.86 3.76 V IOH = −24 mA

5.5 4.86 4.76 IOH = −24 mA (Note 5)

VOL Maximum LOW Level 4.5 0.001 0.1 0.1 VI

OUT = 50 µA

Output Voltage 5.5 0.001 0.1 0.1 VIN = VIL or VIH

4.5 0.36 0.44 V IOL 24 mA

5.5 0.36 0.44 IOL.= 24 mA (Note 5)

IIN Maximum Input 5.5 ±0.1 ±1.0 µAV

I = VCC, GND

Leakage Current

ICCT Maximum 5.5 0.6 1.5 mA VI = VCC − 2.1V

ICC/Input

IOLD Minimum Dynamic 5.5 75 mA VOLD = 1.65V Max

IOHD Output Current (Note 6) 5.5 −75 mA VOHD = 3.85V Min

ICC Maximum Quiescent 5.5 4.0 40.0 µAV

IN = VCC or GND

Supply Current

VCC TA = +25°CT

A = −40°C to +85°C

Symbol Parameter (V) CL = 50 pF CL = 50 pF Units

(Note 7) Min Typ Max Min Max

tPLH Propagation Delay 3.3 1.5 8.5 13.0 1.5 15.0 ns

An to On5.0 1.5 6.5 9.5 1.5 10.5

tPHL Propagation Delay 3.3 1.5 8.0 12.5 1.5 14.0 ns

An to On5.0 1.5 6.0 9.0 1.5 10.5

tPLH Propagation Delay 3.3 1.5 11.0 15.0 1.5 16.0 ns

E1 or E2 to On5.0 1.5 8.0 11.0 1.5 12.0

tPHL Propagation Delay 3.3 1.5 9.5 13.5 1.5 15.0 ns

E1 or E2 to On5.0 1.5 7.0 9.5 1.5 10.5

tPLH Propagation Delay 3.3 1.5 11.0 15.5 1.5 16.5 ns

E3 to On5.0 1.5 8.0 11.0 1.5 12.5

tPHL Propagation Delay 3.3 1.5 8.5 13.0 1.5 14.0 ns

E3 to On5.01.56.08.01.09.5

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74AC138 • 74ACT138

AC Electrical Characteristics for ACT

Note 8: Volt age Ran ge 5.0 is 5.0V ± 0.5 V

Capacitance

VCC TA = +25°CT

A = −40°C to +85°C

Symbol Parameter (V) CL = 50 pF CL = 50 pF Units

(Note 8) Min Typ Max Min Max

tPLH Propagation Delay 5.0 1.5 7.0 10.5 1.5 11.5 ns

An to On

tPHL Propagation Delay 5.0 1.5 6.5 10.5 1.5 11.5 ns

An to On

tPLH Propagation Delay 5.0 2.5 8.0 11.5 2.0 12.5 ns

E1 or E2 to On

tPHL Propagation Delay 5.0 2.0 7.5 11.5 2.0 12.5 ns

E1 or E2 to On

tPLH Propagation Delay 5.0 2.5 8.0 12.0 2.0 13.0 ns

E3 to On

tPHL Propagation Delay 5.0 2.0 6.5 10.5 1.5 11.5 ns

E3 to On

Symbol Parameter Typ Units Conditions

CIN Input Capacitance 4.5 pF VCC = OPEN

CPD Power Dissipation Capacitance 60.0 pF VCC = 5.0V

www.fairchildsemi.com 6

74AC138 • 74ACT138

Physical Dimensions inches (millimeters) unless otherwise noted

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

Package Number M16A

7 www.fairchildsemi.com

74AC138 • 74ACT138

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

Package Number M16D

www.fairchildsemi.com 8

74AC138 • 74ACT138

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Package Number MTC16

9 www.fairchildsemi.com

74AC138 • 74ACT138 1-of-8 Decoder/Demult iplexer

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Package Number N16E

Fairchild does not assume an y responsibility for u se of any circuitry descr ibed, no circuit pat ent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life suppor t de vices o r syst ems are dev ic es or syste ms

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instruct ions fo r use pr ovi de d in the l abe ling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A crit ical componen t in any com ponen t of a life s uppor t

device or system whose failure to perform can be rea-

sonabl y e xpec ted to cause th e fa i lure of the l ife s upport

device or system, or to affect its safety or effectiveness.