1
FEATURES
KTE (PowerFLEX ) PACKAGE
(TOPVIEW)
IN
OUT
ADJ
OUT
KC (TO-220) PACKAGE
(TOPVIEW)
OUT
IN
ADJ
OUT
OUT
KTT (TO-263) PACKAGE
(TOPVIEW)
IN
OUT
ADJ
DESCRIPTION/ORDERING INFORMATION
TL783
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............................................................................................................................................... SLVS036M – SEPTEMBER 1981 – REVISED APRIL 2008
HIGH-VOLTAGE ADJUSTABLE REGULATOR
2
•Output Adjustable From 1.25 V to 125 V When Thermal-Shutdown ProtectionUsed With an External Resistor Divider
•0.001%/V Typical Input Voltage Regulation•700-mA Output Current
•0.15% Typical Output Voltage Regulation•Full Short-Circuit, Safe-Operating-Area, and
•76-dB Typical Ripple Rejection
The TL783 is an adjustable three-terminal high-voltage regulator with an output range of 1.25 V to 125 V and aDMOS output transistor capable of sourcing more than 700 mA. It is designed for use in high-voltage applicationswhere standard bipolar regulators cannot be used. Excellent performance specifications, superior to those ofmost bipolar regulators, are achieved through circuit design and advanced layout techniques.
As a state-of-the-art regulator, the TL783 combines standard bipolar circuitry with high-voltage double-diffusedMOS transistors on one chip, to yield a device capable of withstanding voltages far higher than standard bipolarintegrated circuits. Because of its lack of secondary-breakdown and thermal-runaway characteristics usuallyassociated with bipolar outputs, the TL783 maintains full overload protection while operating at up to 125 V frominput to output. Other features of the device include current limiting, safe-operating-area (SOA) protection, andthermal shutdown. Even if ADJ is disconnected inadvertently, the protection circuitry remains functional.
Only two external resistors are required to program the output voltage. An input bypass capacitor is necessaryonly when the regulator is situated far from the input filter. An output capacitor, although not required, improvestransient response and protection from instantaneous output short circuits. Excellent ripple rejection can beachieved without a bypass capacitor at the adjustment terminal.
ORDERING INFORMATION
(1)
T
J
PACKAGE
(2)
ORDERABLE PART NUMBER TOP-SIDE MARKING
PowerFLEX™ – KTE Reel of 2000 TL783CKTER TL7830°C to 125 °C TO-263 – KTT Reel of 500 TL783CKTTR TL783CTO-220 – KC Tube of 50 TL783CKC TL783C
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TIweb site at www.ti.com .(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging .
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2PowerFLEX, PowerPAD are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 1981 – 2008, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
+
−
Protection
Circuit
OUT
IN
Vref R1
R2
VO
VI
Error
Amplifier
ADJ
VO[Vrefǒ1)R2
R1Ǔ
Absolute Maximum Ratings
(1)
Package Thermal Data
(1)
Recommended Operating Conditions
TL783
SLVS036M – SEPTEMBER 1981 – REVISED APRIL 2008 ...............................................................................................................................................
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FUNCTIONAL BLOCK DIAGRAM
over operating temperature range (unless otherwise noted)
MIN MAX UNIT
V
l
– V
O
Input-to-output differential voltage 125 VT
J
Operating virtual junction temperature 150 °CT
stg
Storage temperature range – 65 150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operatingconditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
PACKAGE BOARD θ
JC
θ
JP
(2)
θ
JA
PowerFLEX (KTE) High K, JESD 51-5 2.7 °C/W 23 °C/WTO-263 (KTT) High K, JESD 51-5 18 °C/W 1.94 °C/W 25.3 °C/WTO-220 (KC) High K, JESD 51-5 17 °C/W 3 °C/W 19 °C/W
(1) Maximum power dissipation is a function of T
J(max)
,θ
JA
, and T
A
. The maximum allowable power dissipation at any allowable ambienttemperature is P
D
= (T
J(max)
– T
A
)/ θ
JA
. Operating at the absolute maximum T
J
of 150 °C can affect reliability. Due to variations inindividual device electrical characteristics and thermal resistance, the built-in thermal overload protection may be activated at powerlevels slightly above or below the rated dissipation.(2) For packages with exposed thermal pads, such as QFN, PowerPAD™, or PowerFLEX, θ
JP
is defined as the thermal resistance betweenthe die junction and the bottom of the exposed pad.
MIN MAX UNIT
V
l
– V
O
Input-to-output differential voltage 125 VI
O
Output current 15 700 mAT
J
Operating virtual junction temperature 0 125 °C
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Electrical Characteristics
TL783
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............................................................................................................................................... SLVS036M – SEPTEMBER 1981 – REVISED APRIL 2008
V
l
– V
O
= 25 V, I
O
= 0.5 A, T
J
= 0 °C to 125 °C (unless otherwise noted)
PARAMETER TEST CONDITIONS
(1)
MIN TYP MAX UNIT
T
J
= 25 °C 0.001 0.01V
l
– V
O
= 20 V to 125 V,Input voltage regulation
(2)
%/VP≤rated dissipation
T
J
= 0 °C to 125 °C 0.004 0.02Ripple rejection ΔV
I(PP)
= 10 V, V
O
= 10 V, f = 120 Hz 66 76 dBV
O
≤5 V 7.5 25 mVI
O
= 15 mA to 700 mA,T
J
= 25 °C
V
O
≥5 V 0.15 0.5 %Output voltage regulation
V
O
≤5 V 20 70 mVI
O
= 15 mA to 700 mA,P≤rated dissipation
V
O
≥5 V 0.3 1.5 %Output voltage change with temperature 0.4 %Output voltage long-term drift 1000 hours at T
J
= 125 °C, V
l
– V
O
= 125 V 0.2 %Output noise voltage f = 10 Hz to 10 kHz, T
J
= 25 °C 0.003 %Minimum output current to maintain regulation V
l
– V
O
= 125 V 15 mAV
l
– V
O
= 25 V, t = 1 ms 1100V
l
– V
O
= 15 V, t = 30 ms 715Peak output current mAV
l
– V
O
= 25 V, t = 30 ms 700 900V
l
– V
O
= 125 V, t = 30 ms 100 250ADJ input current 83 110 µAV
l
– V
O
= 15 V to 125 V, I
O
= 15 mA to 700 mA,Change in ADJ input current 0.5 5 µAP≤rated dissipation
V
l
– V
O
= 10 V to 125 V, I
O
= 15 mA to 700 mA,Reference voltage (OUT to ADJ)
(3)
1.2 1.27 1.3 VP≤rated dissipation
(1) Pulse-testing techniques maintain the junction temperature as close to the ambient temperature as possible. Thermal effects must betaken into account separately.(2) Input voltage regulation is expressed here as the percentage change in output voltage per 1-V change at the input(3) Due to the dropout voltage and output current-limiting characteristics of this device, output current is limited to less than 700 mA atinput-to-output voltage differentials of less than 25 V.
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TYPICAL CHARACTERISTICS
2
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0250 50 75 100 125
Output Current Limit − A
VI − VO − Input-to-Output Voltage Differential − V
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
tw = 1 ms
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
TJ = 0°C
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
TJ = 25°C
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
TJ = 125°C
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
00 25 50 75 100
Output Current Limit − A
VI − VO − Input-to-Output Voltage Differential − V
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
tw = 30 ms
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
TJ = 0°C
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
TJ = 25°C
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
TJ = 125°C
125
010 20 30 40
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
Output Current Limit − A
Time − ms
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
VI − VO = 25 V
TJ = 25°C
0 10 20 30 40 50 60 70 80 90
100
80
60
40
20
0
120
Ripple Rejection − dB
VO − Output Voltage − V
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
VI(AV) − VO = 25 V
∆VI(PP) = 10 V
IO = 100 mA
f = 120 Hz
Co = 0
TJ = 25°C
100
TL783
SLVS036M – SEPTEMBER 1981 – REVISED APRIL 2008 ...............................................................................................................................................
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OUTPUT CURRENT LIMIT OUTPUT CURRENT LIMITvs vsINPUT-TO-OUTPUT VOLTAGE DIFFERENTIAL INPUT-TO-OUTPUT VOLTAGE DIFFERENTIAL
Figure 1. Figure 2.
OUTPUT CURRENT LIMIT RIPPLE REJECTIONvs vsTIME OUTPUT VOLTAGE
Figure 3. Figure 4.
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0 100 200 300 400 500 600 700 800
Ripple Rejection − dB
IO − Output Current − mA
100
80
60
40
20
0
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
VI(AV) = 25 V
∆VI(PP) = 10 V
VO = 10 V
f = 120 Hz
Co = 0
TJ = 25°C
100
0.01
90
80
70
60
50
40
30
20
10
00.1 1 10 100 1000
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
Co = 10 µF
Ripple Rejection − dB
f − Frequency − kHz
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
Co = 0
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
VI(AV) = 25 V
∆VI(PP) = 10 V
VO = 10 V
IO = 500 mA
TJ = 25°C
1.30
1.29
1.28
1.27
1.26
1.25
1.24
1.23
1.22
−75 −50 −25 0 25 50 75 100 125 150
− Reference Voltage − V
TJ − V irtual Junction Temperature − °C
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
VI = 20 V
IO = 15 mA
Vref
175
1
f − Frequency − kHz
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
VI = 35 V
VO = 10 V
IO = 500 mA
TJ = 25°C
101102103104105106107
10−1
10−2
10−3
10−4
101
102
− Output Impedance − ΩZo
TL783
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............................................................................................................................................... SLVS036M – SEPTEMBER 1981 – REVISED APRIL 2008
TYPICAL CHARACTERISTICS (continued)
RIPPLE REJECTION RIPPLE REJECTIONvs vsOUTPUT CURRENT FREQUENCY
Figure 5. Figure 6.
OUTPUT IMPEDANCE REFERENCE VOLTAGEvs vsFREQUENCY VIRTUAL JUNCTION TEMPERATURE
Figure 7. Figure 8.
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86
84
82
80 0 25 50 75
88
90
100 125
TJ − V irtual Junction Temperature − °C
VI = 25 V
VO = V ref
IO = 500 mA
ADJ Input Current − µA
20
10
5
0
−75 −50 −25 0 25 50
Dropout Voltage − V
75 100 125
25
15
TJ − V irtual Junction Temperature − °C
∆VO = 100 mV
IO = 700 mA
IO = 600 mA
IO = 500 mA
IO = 250 mA
IO = 100 mA
IO = 15 mA
6
4
2
00 25 50 75
− Output Current − mA
8
10
12
100 125
IO
VI − Input Voltage − V
TJ = 25°C
TJ = 125°C
TJ = 0°C
−0.2
−0.3
−0.4
−0.50 25 50 75 100 125 150
− Output Voltage Deviation − %
−0.1
0
∆VO
TJ − V irtual Junction Temperature − °C
VI = 25 V
VO = 5 V
IO = 15 mA to 700 mA
TL783
SLVS036M – SEPTEMBER 1981 – REVISED APRIL 2008 ...............................................................................................................................................
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TYPICAL CHARACTERISTICS (continued)
INPUT CURRENT AT ADJ DROPOUT VOLTAGEvs vsVIRTUAL JUNCTION TEMPERATURE VIRTUAL JUNCTION TEMPERATURE
Figure 9. Figure 10.
OUTPUT VOLTAGE DEVIATION OUTPUT CURRENT
(1)
vs vsVIRTUAL JUNCTION TEMPERATURE INPUT VOLTAGE
Figure 11.
(1) This is the minimum current required tomaintain voltage regulation.
Figure 12.
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VI = 35 V
VO = 10 V
Co = 1 µF
TJ = 25°C
− Output Current − AIO
6
4
2
0
−2
−4
−6
0.8
0.6
0.4
0.2
00 40 80 120 160 200 240
Time − µs
− Output Voltage Deviation − VVO
∆
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
TJ = 25°C
ÎÎÎ
ÎÎÎ
ÎÎÎ
Co = 0
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
Co = 10 µF
0 1 2 3 4
Time − µs
− Output Voltage Deviation − VVO
Change in Input Voltage − V
0.4
0.2
0
−0.2
1
0.5
0
∆
TL783
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............................................................................................................................................... SLVS036M – SEPTEMBER 1981 – REVISED APRIL 2008
TYPICAL CHARACTERISTICS (continued)
LINE TRANSIENT RESPONSE LOAD TRANSIENT RESPONSE
Figure 13. Figure 14.
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DESIGN CONSIDERATIONS
Bypass Capacitors
Protection Circuitry
TL783
SLVS036M – SEPTEMBER 1981 – REVISED APRIL 2008 ...............................................................................................................................................
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The internal reference (see functional block diagram ) generates 1.25 V nominal (V
ref
) between OUT and ADJ.This voltage is developed across R1 and causes a constant current to flow through R1 and the programmingresistor R2, giving an output voltage of:V
O
= V
ref
(1 + R2/R1) + l
I(ADJ)
(R2)
or
V
O
≈V
ref
(1 + R2/R1)
The TL783 was designed to minimize the input current at ADJ and maintain consistency over line and loadvariations, thereby minimizing the associated (R2) error term.
To maintain I
I(ADJ)
at a low level, all quiescent operating current is returned to the output terminal. This quiescentcurrent must be sunk by the external load and is the minimum load current necessary to prevent the output fromrising. The recommended R1 value of 82 Ωprovides a minimum load current of 15 mA. Larger values can beused when the input-to-output differential voltage is less than 125 V (see the output-current curve in Figure 12 ) orwhen the load sinks some portion of the minimum current.
The TL783 regulator is stable without bypass capacitors; however, any regulator becomes unstable with certainvalues of output capacitance if an input capacitor is not used. Therefore, the use of input bypassing isrecommended whenever the regulator is located more than four inches from the power-supply filter capacitor. A1- µF tantalum or aluminum electrolytic capacitor usually is sufficient.
Adjustment-terminal capacitors are not recommended for use on the TL783 because they can seriously degradeload transient response, as well as create a need for extra protection circuitry. Excellent ripple rejection presentlyis achieved without this added capacitor.
Due to the relatively low gain of the MOS output stage, output voltage dropout may occur under large-loadtransient conditions. The addition of an output bypass capacitor greatly enhances load transient response andprevents dropout. For most applications, it is recommended that an output bypass capacitor be used, with aminimum value of:C
o
(µF) = 15/V
O
Larger values provide proportionally better transient-response characteristics.
The TL783 regulator includes built-in protection circuits capable of guarding the device against most overloadconditions encountered in normal operation. These protective features are current limiting, safe-operating-areaprotection, and thermal shutdown. These circuits protect the device under occasional fault conditions only.Continuous operation in the current limit or thermal shutdown mode is not recommended.
The internal protection circuits of the TL783 protect the device up to maximum-rated V
I
as long as certainprecautions are taken. If V
l
is switched on instantaneously, transients exceeding maximum input ratings mayoccur, which can destroy the regulator. Usually, these are caused by lead inductance and bypass capacitorscausing a ringing voltage on the input. In addition, when rise times in excess of 10 V/ns are applied to the input,a parasitic npn transistor in parallel with the DMOS output can be turned on, causing the device to fail. If thedevice is operated over 50 V and the input is switched on, rather than ramped on, a low-Q capacitor, such astantalum or aluminum electrolytic, should be used, rather than ceramic, paper, or plastic bypass capacitors. A Qfactor of 0.015, or greater, usually provides adequate damping to suppress ringing. Normally, no problems occurif the input voltage is allowed to ramp upward through the action of an ac line rectifier and filter network.
Similarly, when an instantaneous short circuit is applied to the output, both ringing and excessive fall times canresult. A tantalum or aluminum electrolytic bypass capacitor is recommended to eliminate this problem. However,if a large output capacitor is used, and the input is shorted, addition of a protection diode may be necessary toprevent capacitor discharge through the regulator. The amount of discharge current delivered is dependent onoutput voltage, size of capacitor, and fall time of V
l
. A protective diode (see Figure 15 ) is required only forcapacitance values greater than:C
o
(µF) = 3 ×10
4
/(V
O
)
2
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IN
TL783
OUT VO
R1
R2
ADJ
VI
Co
Load Regulation
VI
TL783
R1
Rline
RL
R2
VO
IN OUT
ADJ
TL783
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............................................................................................................................................... SLVS036M – SEPTEMBER 1981 – REVISED APRIL 2008
Care always should be taken to prevent insertion of regulators into a socket with power on. Power should beturned off before removing or inserting regulators.
Figure 15. Regulator With Protective Diode
The current-set resistor (R1) should be located close to the regulator output terminal, rather than near the load.This eliminates long line drops from being amplified, through the action of R1 and R2, to degrade load regulation.To provide remote ground sensing, R2 should be near the load ground.
Figure 16. Regulator With Current-Set Resistor
Copyright © 1981 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Link(s): TL783
APPLICATION INFORMATION
VI = 125 V
TL783
IN OUT
ADJ
1 µF
(see Note A)
0 to 8 kΩ
10 µF
R2
R1
82 Ω+
+
VO+Vref ǒ1)R2
R1Ǔ
10 µF
0.1 µF
IN
OUT
ADJ
R2
8.2 kΩ, 2W
125 V
120 V, 1.5 W
7.5 kΩ, 1 W
VI = 145 to 200 V
TIP150
TL783 R1
82 Ω
+
50 µF
82 Ω+
VI = 70 to 125 V
10 Ω
1 kΩ
TIP30C
TIPL762
VO = 50 V
at 0.5 A
TL783
3.3 kΩ, 1W
10 kΩ
IN OUT
ADJ
50 µF
+
125 V
10 Ω
1 kΩTIPL762
1 Ω
R2
TL783
R1
82 Ω
10 kΩ
IN
OUT
ADJ VO+Vref ǒ1)R2
R1Ǔ
TL783
SLVS036M – SEPTEMBER 1981 – REVISED APRIL 2008 ...............................................................................................................................................
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Figure 18. 125-V Short-Circuit-Protected Off-LineA. Needed if device is more than 4 inches from
Regulatorfilter capacitor
Figure 17. 1.25-V to 115-V Adjustable Regulator
Figure 19. 50-V Regulator With Current Boost Figure 20. Adjustable Regulator With Current Boost andCurrent Limit
10 Submit Documentation Feedback Copyright © 1981 – 2008, Texas Instruments Incorporated
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