IRF9240 - Intersil Corporation

5-26

File Number

2279.2

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

IRF9240

-11A, -200V, 0.500 Ohm, P-Channel Power

MOSFET

This P-Channel enhancement mode silicon gate power ﬁeld

effect transistor is an advanced power MOSFET designed,

tested, and guaranteed to withstand a speciﬁed level of

energy in the breakdown avalanche mode of operation. All of

these power MOSFETs are designed for applications such

as switching regulators, switching convertors, motor drivers,

relay drivers, and drivers for high power bipolar switching

transistors requiring high speed and low gate drive power.

These types can be operated directly from integrated

circuits.

Formerly developmental type TA17522.

Features

• -11A, -200V

•r

DS(ON) = 0.500Ω

• Single Pulse Avalanche Energy Rated

• SOA is Power Dissipation Limited

• Nanosecond Switching Speeds

• Linear Transfer Characteristics

• High Input Impedance

• Related Literature

- TB334, “Guidelines for Soldering Surface Mount

Components to PC Boards”

Symbol

Packaging

JEDEC TO-204AA

Ordering Information

PART NUMBER PACKAGE BRAND

IRF9240 TO-204AA IRF9240

NOTE: When ordering, use the entire part number. G

DRAIN

(FLANGE)

SOURCE (PIN 2)

GATE (PIN 1)

Data Sheet February 1999

5-27

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Speciﬁed IRF9240 UNITS

Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS -200 V

Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR -200 V

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID

TC= 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID-11

-7 A

Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM -44 A

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS ±20 V

Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD125 W

Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 W/oC

Single Pulse Avalanche Energy Rating (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS 790 mJ

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 oC

aximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg 300

260

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe

device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

NOTE:

1. TJ = 25oC to TJ = 125oC.

Electrical Speciﬁcations TC = 25oC, Unless Otherwise Speciﬁed

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BVDSS ID = -250µA, VGS = 0V, (Figure10) -200 - - V

Gate Threshold Voltage VGS(TH) VGS = VDS, ID = -250µA -2 - -4 V

Zero Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - -25 µA

VDS = 0.8 x Rated BVDSS, VGS = 0V, TC = 125oC - - -250 µA

On-State Drain Current (Note 2) ID(ON) VDS > ID(ON) x rDS(ON)MAX, VGS = -10V,

(Figure 7) -11 - - A

Gate to Source Leakage Current IGSS VGS = ±20V - - ±100 nA

On Resistance (Note 2) rDS(ON) ID = -6A, VGS = -10V, (Figures 8, 9) - 0.35 0.500 Ω

Forward Transconductance (Note 2) gfs VDS > ID(ON) x rDS(ON)MAX, ID = -6A, (Figure 12) 4 6 - S

Turn-On Delay Time td(ON) VDD = 1.00 x Rated BVDSS, ID≈ 11A,

RG = 9.1Ω, VGS =10V, (Figure 17, 18)

RL = 17.5Ω for BVDSS = 150V

RL = 9.6Ω for BVDSS = 200V

MOSFET Switching Times are Essentially

Independent of Operating Temperature

-1822ns

Rise Time tr-4568ns

Turn-Off Delay Time td(OFF) -7590ns

Fall Time tf-2944ns

Total Gate Charge

(Gate to Source + Gate to Drain) Qg(TOT) VGS = -10V, ID = -11A, VDS = 0.8 x Rated BVDSS,

(Figures 14, 19, 20))

Gate Charge is Essentially Independent of

Operating Temperature

-7090nC

Gate to Source Charge Qgs -55-nC

Gate to Drain “Miller” Charge Qgd -15-nC

Input Capacitance CISS VDS = -25V, VGS = 0V, f = 1MHz, (Figure 11) - 1100 - pF

Output Capacitance COSS - 375 - pF

Reverse Transfer Capacitance CRSS - 150 - pF

Internal Drain Inductance LD Measured Between the

Contact Screw on the

Flange that is Closer to

Source and Gate Pins and

the Center of Die

Modified MOSFET

Symbol Showing the In-

ternal Devices

Inductances

- 5.0 - nH

Internal Source Inductance LSMeasuredFrom theSource

Lead, 6mm (0.25in) From

the Flange and the Source

Bonding Pad

- 12.5 - nH

Thermal Resistance Junction to Case RθJC --1

oC/W

Thermal Resistance Junction to

Ambient RθJA Typical Socket Mount - - 62.5 oC/W

IRF9240

5-28

Source to Drain Diode Speciﬁcations

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Continuous Source to Drain Current ISD Modified MOSFET Symbol

Showing the Integral

Reverse P-N Junction

Diode

- - -11 A

Pulse Source to Drain Current (Note 3) ISDM - - -44 A

Source to Drain Diode Voltage (Note 2) VSD TC = 25oC, ISD = -11A, V GS = 0V, (Figure13) - - -1.5 V

Reverse Recovery Time trr TJ = 150oC, ISD = -11A, dISD/dt = 100A/µs - 270 - ns

Reverse Recovery Charge QRR TJ = 150oC, ISD = -11A, dISD/dt = 100A/µs-2-µC

NOTES:

2. Pulse test: pulse width ≤300µs, duty cycle ≤2%.

3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).

4. VDD = 50V, starting TJ= 25oC, L = 9.8mH, RG= 25Ω, peak IAS = 11A (Figures 15, 16).

Typical Performance Curves

Unless Otherwise Speciﬁed

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

TA, CASE TEMPERATURE (oC)

POWER DISSIPATION MULTIPLIER

0.0 0 25 50 75 100 150

0.2

0.4

0.6

0.8

1.0

1.2

125

-5

0050

100

ID, DRAIN CURRENT (A)

TC, CASE TEMPERATURE (oC)

-15

150

-10

t1, RECTANGULAR PULSE DURATION (s)

ZθJC, NORMALIZED TRANSIENT

THERMAL IMPEDANCE

10-3 10-2

10-5 10-4

0.01

0.1

SINGLE PULSE

10-1 1

0.1

0.02

0.2

0.5

0.01

0.05

PDM

NOTES:

DUTY FACTOR: D = t1/t2

PEAK TJ = PDM x ZθJC x RθJC + TC

t1t2

IRF9240

5-29

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

NOTE: Heating effect of 5µs pulse is minimal.

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE

VOLTAGE AND DRAIN CURRENT FIGURE 9. NORMALIZED DRAIN TO SOURCE

ON RESISTANCE vs JUNCTION TEMPERATURE

Typical Performance Curves

Unless Otherwise Speciﬁed (Continued)

VDS, DRAIN TO SOURCE VOLTAGE (V)

-10

ID, DRAIN CURRENT (A)

-100

-1

-10-1

-0.1 -1000

10µs

100µs

1ms

10ms

100ms

BY rDS(ON)

AREA IS LIMITED

OPERATION IN THIS

SINGLE PULSE

TJ = MAX RATED

TC = 25oC

ID, DRAIN CURRENT (A)

0 -10 -20 -30 -40

-10

-20

-30

-40

-50

VGS = -5V

VDS, DRAIN TO SOURCE VOLTAGE (V)

80µs PULSE TEST

VGS = -4V

VGS = -6V

VGS = -7V

VGS = -8V

VGS = -9V

VGS = -10V

VGS = -11V

-4

0-2 -4 -6 -10

-8

-12

ID, DRAIN CURRENT (A)

VDS, DRAIN TO SOURCE VOLTAGE (V)

-16

-8

-20

VGS = -6V

VGS = -7V

VGS = -8V

VGS = -5V

VGS = -4V

VGS = -10V

VGS = -9V

80µs PULSE TEST

0-4 -6 -8 -10-2

-0.1

-1.0

-10

ID(ON), ON-STATE DRAIN CURRENT (A)

VGS, GATE TO SOURCE VOLTAGE (V)

100

125oC

25oC

-55oC

VDS ≥ID(ON) x rDS(ON)MAX

80µs PULSE TEST

0.3

0.6

0.7

-15 -30 -45 -60

DRAIN TO SOURCE ON RESISTANCE (Ω)

ID, DRAIN CURRENT (A)

-75

0.8

0.2

0.4

0.5

VGS = -10V

VGS = -20V

5µs PULSE TEST

NORMALIZED DRAIN TO SOURCE

2.5

1.5

1.0

0.5

0-40 0 40

TJ, JUNCTION TEMPERATURE (oC)

120

2.0

VGS = -10V, ID = -11A

160

ON RESISTANCE

IRF9240

5-30

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

Typical Performance Curves

Unless Otherwise Speciﬁed (Continued)

1.15

1.00

0.95

0.90

0.85

-80 -40 0 40

TJ, JUNCTION TEMPERATURE (oC)

NORMALIZED DRAIN TO SOURCE

80 120 160

1.05

1.10

BREAKDOWN VOLTAGE

ID= 250µA

2000

400

0020 50

C, CAPACITANCE (pF)

1200

VDS, DRAIN TO SOURCE VOLTAGE (V)

1600

800

CISS

COSS

CRSS

10 30 40

CISS = CGS + CGD

CRSS = CGD

COSS ≈ CDS + CGD

VGS = 0V, f = 1MHz

ID, DRAIN CURRENT (A)

gfs, TRANSCONDUCTANCE (S)

0 -10 -20 -30 -40

-50

TJ = 125oC

TJ = 25oC

TJ = -55oC

80µs PULSE TEST

0-0.4 -1.0 -1.2 -1.6 -1.8-0.6

-0.1

-1.0

-10

ISD, SOURCE TO DRAIN CURRENT (A)

VSD, SOURCE TO DRAIN VOLTAGE (V)

-100

-0.8 -1.4

TJ = 25oC

TJ = 150oC

-5

-10

020406080

ID = -11A

FOR TEST CIRCUIT

SEE FIGURES 19, 20

VDS = -40V

VDS = -100V

VDS = -160V

Qg(TOT), TOTAL GATE CHARGE (nC)

VGS, GATE TO SOURCE (V)

IRF9240

5-31

Test Circuits and Waveforms

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

0.01Ω

IAS

VDS

VDD

DUT

VARY tP TO OBTAIN

REQUIRED PEAK IAS

VGS

VDD

VDS

BVDSS

IAS

tAV

VGS

DUT

-VDD

td(ON)

90%

10%

VDS 90%

td(OFF)

tOFF

90%

50%

10%

PULSE WIDTH

VGS

tON

10%

0.3µF

12V

BATTERY 50kΩ

+VDS

DUT

IG(REF)

(ISOLATED

-VDS

0.2µF

CURRENT

REGULATOR

ID CURRENT

SAMPLING

IG CURRENT

SAMPLING

SUPPLY)

RESISTOR RESISTOR

DUT

Qg(TOT)

Qgd

Qgs

VDS

VGS

VDD

IG(REF)

IRF9240

5-32

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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-

out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No license is gr anted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

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IRF9240