Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3222E/SP3232E_100_120810
1
SP3222E/SP3232E
True +3.0V to +5.5V RS-232 Transceivers
The SP3222E/SP3232E series is an RS-232 transceiver solution intended for portable or
hand-held applications such as notebook or palmtop computers. The SP3222E/SP3232E
series has a high-efciency, charge-pump power supply that requires only 0.1µF capaci-
tors in 3.3V operation. This charge pump allows the SP3222E/SP3232E series to deliver
true RS-232 performance from a single power supply ranging from +3.0V to +5.5V. The
SP3222E/SP3232E are 2-driver/2-receiver devices. This series is ideal for portable or
hand-held applications such as notebook or palmtop computers. The ESD tolerance of the
SP3222E/SP3232E devices are over +/-15kV for both Human Body Model and IEC61000-4-2
Air discharge test methods. The SP3222E device has a low-power shutdown mode where
the devices' driver outputs and charge pumps are disabled. During shutdown, the supply
current falls to less than 1µA.
FEATURES
■ Meets true EIA/TIA-232-F Standards
from a +3.0V to +5.5V power supply
■ Minimum 120kbps Data Rate Under
Full Load
■ 1µA Low Power Shutdown with
Receivers active (SP3222E)
■ Interoperable with RS-232 down to a
+2.7V power source
■ Enhanced ESD Specications:
+15kV Human Body Model
+15kV IEC61000-4-2 Air Discharge
+8kV IEC61000-4-2 Contact Dis-
charge
DESCRIPTION
SELECTION TABLE
Now Available in Lead Free Packaging
V-
1
2
3
415
16
17
18
5
6
7
14
13
12
SHDN
C1+
V+
C1-
C2+
C2-
EN
R1IN
GND
V
CC
T1OUT
8
910
11
R2IN
SP3222E
T2OUT T2IN
T1IN
R1OUT
nSOIC
R2OUT
MODEL Power
Supplies
RS-232
Drivers
RS-232
Receivers
External
Components
Shutdown TTL
3-State
# of
Pins
SP3222E +3.0V to +5.5V 2 2 4 Capacitors Yes Yes 18, 20
SP3232E +3.0V to +5.5V 2 2 4 Capacitors No No 16
Note: See page 6 for other pinouts
2
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3222E/SP3232E_100_120810
NOTE 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V.
These are stress ratings only and functional operation
of the device at these ratings or any other above those
indicated in the operation sections of the specications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may
affect reliability and cause permanent damage to the
device.
VCC.......................................................-0.3V to +6.0V
V+ (NOTE 1).......................................-0.3V to +7.0V
V- (NOTE 1)........................................+0.3V to -7.0V
V+ + |V-| (NOTE 1)...........................................+13V
ICC (DC VCC or GND current).........................+100mA
Input Voltages
TxIN, EN, SHDN...........................-0.3V to Vcc + 0.3V
RxIN...................................................................+15V
Output Voltages
TxOUT.............................................................+13.2V
RxOUT, .......................................-0.3V to (VCC +0.3V)
Short-Circuit Duration
TxOUT....................................................Continuous
Storage Temperature......................-65°C to +150°C
Unless otherwise noted, the following specications apply for VCC = +3.0V to +5.5V with TAMB = TMIN to TMAX,
Power Dissipation per package
20-pin SSOP (derate 9.25mW/oC above +70oC)..............750mW
18-pin SOIC (derate 15.7mW/oC above +70oC)..............1260mW
20-pin TSSOP (derate 11.1mW/oC above +70oC).............890mW
16-pin SSOP (derate 9.69mW/oC above +70oC)...............775mW
16-pin PDIP (derate 14.3mW/oC above +70oC)...............1150mW
16-pin Wide SOIC (derate 11.2mW/oC above +70oC)........900mW
16-pin TSSOP (derate 10.5mW/oC above +70oC)..............850mW
16-pin nSOIC (derate 13.57mW/oC above +70oC)...........1086mW
ELECTRICAL CHARACTERISTICS
PARAMETER MIN. TYP. MAX. UNITS CONDITIONS
DC CHARACTERISTICS
Supply Current 0.3 1.0 mA no load, VCC = 3.3V,
TAMB = 25oC, TxIN = GND or VCC
Shutdown Supply Current 1.0 10 µA SHDN = GND, VCC = 3.3V,
TAMB = 25oC, TxIN = Vcc or GND
LOGIC INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold LOW 0.8 V TxIN, EN, SHDN, Note 2
Input Logic Threshold HIGH 2.0 Vcc V Vcc = 3.3V, Note 2
Input Logic Threshold HIGH 2.4 Vcc V Vcc = 5.0V, Note 2
Input Leakage Current +0.01 +1.0 µA TxIN, EN, SHDN,
TAMB = +25oC, VIN = 0V to VCC
Output Leakage Current +0.05 +10 µA Receivers disabled, VOUT = 0V to VCC
Output Voltage LOW 0.4 V IOUT = 1.6mA
Output Voltage HIGH VCC -0.6 VCC -0.1 V IOUT = -1.0mA
DRIVER OUTPUTS
Output Voltage Swing +5.0 +5.4 V All driver outputs loaded with 3KΩ to
GND, TAMB = +25oC
ABSOLUTE MAXIMUM RATINGS
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Unless otherwise noted, the following specications apply for VCC = +3.0V to +5.5V with TAMB = TMIN to TMAX,
Typical values apply at VCC = +3.3V or +5.0V and TAMB = 25°C.
ELECTRICAL CHARACTERISTICS
PARAMETER MIN. TYP. MAX. UNITS CONDITIONS
DRIVER OUTPUTS (continued)
Output Resistance 300 ΩVCC = V+ = V- = 0V, TOUT=+2V
Output Short-Circuit Current +35 +60 mA VOUT = 0V
Output Leakage Current +25 µA VCC = 0V or 3.0V to 5.5V,
VOUT = +12V, Drivers disabled
RECEIVER INPUTS
Input Voltage Range -15 +15 V
Input Threshold LOW 0.6 1.2 V Vcc = 3.3V
Input Threshold LOW 0.8 1.5 V Vcc = 5.0V
Input Threshold HIGH 1.5 2.4 V Vcc = 3.3V
Input Threshold HIGH 1.8 2.4 V Vcc = 5.0V
Input Hysteresis 0.3 V
Input Resistance 3 5 7 kΩ
TIMING CHARACTERISTICS
Maximum Data Rate 120 235 Kbps RL = 3KΩ, CL = 1000pF, one
driver switching
Driver Propagation Delay, tPHL 1.0 µs RL = 3KΩ, CL = 1000pF
Driver Propagation Delay, tPLH 1.0 µs RL = 3KΩ, CL = 1000pF
Receiver Propagation Delay, tPHL
0.3 µs Receiver input to Receiver
output, CL = 150pF
Receiver Propagation Delay, tPLH 0.3 µs Receiver input to Receiver
output, CL = 150pF
Receiver Output Enable Time 200 ns
Receiver Output Disable Time 200 ns
Driver Skew 100 500 ns | tPHL - tPLH |, TAMB = 25°C
Receiver Skew 200 1000 ns | tPHL - tPLH |
Transition-Region Slew Rate 30 V/µs Vcc = 3.3V, RL = 3kΩ, TAMB =
25°C, measurements taken from
-3.0V to +3.0V or +3.0V to -3.0V
NOTE 2: Driver input hysteresis is typically 250mV.
4
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3222E/SP3232E_100_120810
Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 120kbps data rate, all
drivers loaded with 3kΩ, 0.1µF charge pump capacitors, and TAMB = +25°C.
Figure 2. Slew Rate vs Load Capacitance for the
SP3222E and SP3232E
Figure 1. Transmitter Output Voltage vs Load
Capacitance for the SP3222E and SP3232E
6
4
2
0
-2
-4
-6
Transmitter Output Voltage [V]
Load Capacitance [pF]
Vout+
Vout-
500 1000 1500 2000
0
Figure 3. Supply Current VS. Load Capacitance
when Transmitting Data
TYPICAL PERFORMANCE CHARACTERISTICS
14
12
10
8
6
4
2
0
Slew Rate [V /µs ]
Load Capacitance [pF]
+Slew
-Slew
0 500 1000 1500 2000 2330
50
45
40
35
30
25
20
15
10
5
0
Suppl y Current [mA]
Load Capacitance [pF]
118KHz
60KHz
10KHz
0 500 1000 1500 2000 2330
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Table 1. Device Pin Description
NAME FUNCTION
PIN NUMBER
SP3222E SP3232E
SOIC SSOP
TSSOP
EN Receiver Enable. Apply Logic LOW for normal operation.
Apply logic HIGH to disable the receiver outputs (high-Z state) 1 1 -
C1+ Positive terminal of the voltage doubler charge-pump capacitor 2 2 1
V+ +5.5V output generated by the charge pump 3 3 2
C1- Negative terminal of the voltage doubler charge-pump capacitor 4 4 3
C2+ Positive terminal of the inverting charge-pump capacitor 5 5 4
C2- Negative terminal of the inverting charge-pump capacitor 6 6 5
V- -5.5V output generated by the charge pump 7 7 6
T1OUT RS-232 driver output. 15 17 14
T2OUT RS-232 driver output. 8 8 7
R1IN RS-232 receiver input 14 16 13
R2IN RS-232 receiver input 9 9 8
R1OUT TTL/CMOS receiver output 13 15 12
R2OUT TTL/CMOS receiver output 10 10 9
T1IN TTL/CMOS driver input 12 13 11
T2IN TTL/CMOS driver input 11 12 10
GND Ground 16 18 15
VCC +3.0V to +5.5V supply voltage 17 19 16
SHDN
Shutdown Control Input. Drive HIGH for normal device operation.
Drive LOW to shutdown the drivers (high-Z output) and the on-
board power supply
18 20 -
N.C. No Connect - 11, 14 -
PIN FUNCTION
6
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3222E/SP3232E_100_120810
Figure 5. Pinout Conguration for the SP3232E
Figure 4. Pinout Congurations for the SP3222E
V-
1
2
3
417
18
19
20
5
6
7
16
15
14
SHDN
C1+
V+
C1-
C2+
C2-
N.C.
EN
R1IN
GND
V
CC
T1OUT
N.C.
8
9
10 11
12
13
R2IN
R2OUT
SP3222E
T2OUT T1IN
T2IN
R1OUT
SSOP/TSSOP
V-
1
2
3
415
16
17
18
5
6
7
14
13
12
SHDN
C1+
V+
C1-
C2+
C2-
EN
R1IN
GND
V
CC
T1OUT
8
910
11
R2IN
SP3222E
T2OUT T2IN
T1IN
R1OUT
nSOIC
R2OUT
V-
1
2
3
413
14
15
16
5
6
7
12
11
10
C1+
V+
C1-
C2+
C2-
R1IN
R2IN
GND
V
CC
T1OUT
T2IN
89
SP3232E
T1IN
R1OUT
R2OUT
T2OUT
PINOUT
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Figure 6. SP3222E Typical Operating Circuits
SP3222E
2
4
6
5
3
7
19
GND
T1IN
T2IN
T1OUT
T2OUT
C1+
C1-
C2+
C2-
V+
V-
V
CC
13
12
0.1µF
0.1µ F
0.1µF
+
C2
C5
C1
+
+
*C3
C4
+
+
0.1µF
0.1µF
8
17
RS-232
OUTPUTS
RS-232
INPUTS
LOGIC
INPUTS
V
CC
18
1
5kΩ
R1IN
R1OUT
15
9
5kΩ
R2IN
R2OUT
10
16
LOGIC
OUTPUTS
EN 20
SHDN
*can be returned to
either V
CC
or GND
SSOP
TSSOP
SP3222E
2
4
6
5
3
7
17
GND
T1IN
T2IN
T1OUT
T2OUT
C1+
C1-
C2+
C2-
V+
V-
V
CC
12
11
0.1µF
0.1µF
0.1µF
+
C2
C5
C1
+
+
*C3
C4
+
+
0.1µF
0.1µF
8
15
RS-232
OUTPUTS
RS-232
INPUTS
LOGIC
INPUTS
V
CC
16
1
5kΩ
R1IN
R1OUT
13
9
5kΩ
R2IN
R2OUT
10
14
LOGIC
OUTPUTS
EN 18
SHDN
*can be returned to
either V
CC
or GND
WSOIC
Figure 7. SP3232E Typical Operating Circuit
SP3232E
1
3
5
4
2
6
16
GND
T1IN
T2IN
T1OUT
T2OUT
C1+
C1-
C2+
C2-
V+
V-
V
CC
11
10
0.1µF
+
C2
C5
C1
+
+*C3
C4
+
+
14
7RS-232
OUTPUTS
RS-232
INPUTS
LOGIC
INPUTS
V
CC
15
5kΩ
R1IN
R1OUT
12 13
5kΩ
R2IN
R2OUT
98
LOGIC
OUTPUTS
*can be returned to
either V
CC
or GND
0.1µF
0.1µF
0.1µF
0.1µF
TYPICAL OPERATING CIRCUITS
8
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3222E/SP3232E_100_120810
The SP3222E/SP3232E transceivers
meet the EIA/TIA-232 and ITU-T V.28/V.24
communication protocols and can be imple-
mented in battery-powered, portable, or
hand-held applications such as notebook or
palmtop computers. The SP3222E/SP3232E
devices feature Exar's proprietary on-board
charge pump circuitry that generates ±5.5V
for RS-232 voltage levels from a single
+3.0V to +5.5V power supply. This series is
ideal for +3.3V-only systems, mixed +3.3V
to +5.5V systems, or +5.0V-only systems
that require true RS-232 performance. The
SP3222E/SP3232E devices can operate
at a typical data rate of 235kbps when fully
loaded.
The SP3222E and SP3232E are 2-driver/2-
receiver devices ideal for portable or hand-
held applications. The SP3222E features a
1µA shutdown mode that reduces power
consumption and extends battery life in por-
table systems. Its receivers remain active in
shutdown mode, allowing external devices
such as modems to be monitored using only
1µA supply current.
THEORY OF OPERATION
The SP3222E/SP3232E series is made up
of three basic circuit blocks:
1. Drivers
2. Receivers
3. The Exar proprietary charge pump
Drivers
The drivers are inverting level transmitters
that convert TTL or CMOS logic levels to
+5.0V EIA/TIA-232 levels with an inverted
sense relative to the input logic levels.
Typically, the RS-232 output voltage swing
is +5.4V with no load and +5V minimum fully
loaded. The driver outputs are protected
against innite short-circuits to ground with-
out degradation in reliability. Driver outputs
will meet EIA/TIA-562 levels of +/-3.7V with
supply voltages as low as 2.7V.
The drivers can guarantee a data rate of
120kbps fully loaded with 3kΩ in parallel
with 1000pF, ensuring compatability with
PC-to-PC communication software.
The slew rate of the driver is internally limited
to a maximum of 30V/µs in order to meet the
EIA standards (EIA RS-232D 2.1.7, Para-
graph 5). The transition of the loaded output
from HIGH to LOW also meet the monotonic-
ity requirements of the standard.
Figure 8 shows a loopback test circuit
used to test the RS-232 Drivers. Figure
9 shows the test results of the loopback
circuit with all drivers active at 120kbps
with RS-232 loads in parallel with a
1000pF capacitor. Figure 10 shows the
test results where one driver was active
at 235kbps and all drivers loaded with an
RS-232 receiver in parallel with 1000pF
capacitors. A solid RS-232 data transmis-
sion rate of 120kbps provides compatibility
with many designs in personal computer
peripherals and LAN applications.
The SP3222E driver's output stages are
turned off (tri-state) when the device is in
shutdown mode. When the power is off, the
SP3222E device permits the outputs to be
driven up to +/-12V. The driver's inputs do
not have pull-up resistors. Designers should
connect unused inputs to Vcc or GND.
In the shutdown mode, the supply current
falls to less than 1µA, where SHDN = LOW.
When the SP3222E device is shut down,
the device's driver outputs are disabled (tri-
stated) and the charge pumps are turned off
with V+ pulled down to Vcc and V- pulled to
GND. The time required to exit shutdown is
typically 100µs. Connect SHDN to Vcc if the
shutdown mode is not used.
DESCRIPTION
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Receivers
The Receivers convert EIA/TIA-232 levels
to TTL or CMOS logic output levels. The
SP3222E receivers have an inverting tri-state
output. These receiver outputs (RxOUT)
are tri-stated when the enable control EN =
HIGH. In the shutdown mode, the receivers
can be active or inactive. EN has no effect on
TxOUT. The truth table logic of the SP3222E
driver and receiver outputs can be found in
Table 2.
Since receiver input is usually from a trans-
mission line where long cable lengths and
system interference can degrade the signal,
the inputs have a typical hysteresis margin
of 300mV. This ensures that the receiver
is virtually immune to noisy transmission
lines. Should an input be left unconnected,
an internal 5KΩ pulldown resistor to ground
will commit the output of the receiver to a
HIGH state.
Table 2. SP3222E Truth Table Logic for Shutdown
and Enable Control
Figure 8. SP3222E/SP3232E Driver Loopback Test
Circuit
Charge Pump
The charge pump is an Exar-patended
design (U.S. 5,306,954) and uses a unique
approach compared to older less-efcient
designs. The charge pump still requires four
external capacitors, but uses a four-phase
voltage shifting technique to attain sym-
metrical 5.5V power supplies. The internal
power supply consists of a regulated dual
charge pump that provides output voltages
of +/-5.5V regardless of the input voltage
(Vcc) over the +3.0V to +5.5V range.
Figure 10. Loopback Test results at 235Kbps
3
1
2
T
T
T
T[ ]
T1 IN
T1 OUT
R1 OUT
Ch1
Ch3
5.00V Ch2 5.00V M 2.50µs Ch1 0V
5.00V
Figure 9. Loopback Test results at 120kbps
3
1
2
T
T
T
T[ ]
T1 IN
T1 OUT
R1 OUT
Ch1
Ch3
5.00V Ch2 5.00V M 5.00µs Ch1 0V
5.00V
SP3222E
SP3232E
GND
TxIN TxOUT
C1+
C1-
C2+
C2-
V+
V-
V
CC
0.1µF
0.1µF
0.1µF
+
C2
C5
C1
+
+
C3
C4
+
+
0.1µF
0.1µF
LOGIC
INPUTS
V
CC
5kΩ
RxIN
RxOUT
LOGIC
OUTPUTS
EN* *SHDN
1000pF
V
CC
* SP3222E only
SHDN EN TxOUT RxOUT
0 0 Tri-state Active
0 1 Tri-state Tri-state
1 0 Active Active
1 1 Active Tri-state
DESCRIPTION
10
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3222E/SP3232E_100_120810
In most circumstances, decoupling the
power supply can be achieved adequately
using a 0.1µF bypass capacitor at C5 (refer
to gures 6 and 7). In applications that are
sensitive to power-supply noise, decouple
Vcc to ground with a capacitor of the same
value as charge-pump capacitor C1. Physi-
cally connect bypass capcitors as close to
the IC as possible.
The charge pump operates in a discontinu-
ous mode using an internal oscillator. If the
output voltages are less than a magnitude
of 5.5V, the charge pump is enabled. If the
output voltages exceed a magnitude of 5.5V,
the charge pump is disabled. This oscillator
controls the four phases of the voltage shift-
ing. A description of each phase follows.
Phase 1
— VSS charge storage — During this phase
of the clock cycle, the positive side of capaci-
tors C1 and C2 are initially charged to VCC.
Cl
+ is then switched to GND and the charge
in C1
– is transferred to C2
–. Since C2
+ is con-
nected to VCC, the voltage potential across
capacitor C2 is now 2 times VCC.
Phase 2
— VSS transfer — Phase two of the clock
connects the negative terminal of C2 to the VSS
storage capacitor and the positive terminal of
C2 to GND. This transfers a negative gener-
ated voltage to C3. This generated voltage is
regulated to a minimum voltage of -5.5V.
Simultaneous with the transfer of the volt-
age to C3, the positive side of capacitor C1
is switched to VCC and the negative side is
connected to GND.
Phase 3
— VDD charge storage — The third phase of
the clock is identical to the rst phase — the
charge transferred in C1 produces –VCC in
the negative terminal of C1, which is applied
to the negative side of capacitor C2. Since
C2
+ is at VCC, the voltage potential across C2
is 2 times VCC.
Phase 4
— VDD transfer — The fourth phase of
the clock connects the negative terminal
of C2 to GND, and transfers this positive
generated voltage across C2 to C4, the
VDD storage capacitor. This voltage is
regulated to +5.5V. At this voltage, the in-
ternal oscillator is disabled. Simultaneous
with the transfer of the voltage to C4, the
positive side of capacitor C1 is switched
to VCC and the negative side is con-
nected to GND, allowing the charge
pump cycle to begin again. The charge
pump cycle will continue as long as the
operational conditions for the internal
oscillator are present.
Since both V+ and V– are separately gener-
ated from VCC, in a no–load condition V+
and V– will be symmetrical. Older charge
pump approaches that generate V– from
V+ will show a decrease in the magnitude
of V– compared to V+ due to the inherent
inefciencies in the design.
The clock rate for the charge pump typically
operates at greater than 250kHz. The exter-
nal capacitors can be as low as 0.1µF with
a 16V breakdown voltage rating.
DESCRIPTION
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11
Figure 12. Charge Pump — Phase 2
r
VCC = +5V
–5V –5V
+5V
VSS Storage Capacitor
VDD Storage Capacitor
C1C2
C3
C4
+
+
+ +
–
–
––
Figure 11. Charge Pump — Phase 1
Figure 14. Charge Pump — Phase 3
V
CC
= +5V
–5V –5V
+5V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
+ +
–
–
––
Figure 15. Charge Pump — Phase 4
V
CC
= +5V
V
SS
Storage Capacitor
V
DD
Storage Capacito
r
C
1
C
2
C
3
C
4
+
+
+ +
–
–
––
+5.5V
Figure 13. Charge Pump Waveforms
DESCRIPTION
12
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3222E/SP3232E_100_120810
ESD TOLERANCE
The SP3222E/SP3232E series incorpo-
rates ruggedized ESD cells on all driver
output and receiver input pins. The ESD
structure is improved over our previous
family for more rugged applications and
environments sensitive to electro-static
discharges and associated transients. The
improved ESD tolerance is at least +15kV
without damage nor latch-up.
There are different methods of ESD testing
applied:
a) MIL-STD-883, Method 3015.7
b) IEC61000-4-2 Air-Discharge
c) IEC61000-4-2 Direct Contact
The Human Body Model has been the
generally accepted ESD testing method
for semi-conductors. This method is also
specied in MIL-STD-883, Method 3015.7
for ESD testing. The premise of this ESD test
is to simulate the human body’s potential to
store electro-static energy and discharge it
to an integrated circuit. The simulation is
performed by using a test model as shown
in Figure 16. This method will test the IC’s
capability to withstand an ESD transient
during normal handling such as in manu-
facturing areas where the ICs tend to be
handled frequently.
The IEC-61000-4-2, formerly IEC801-2, is
generally used for testing ESD on equipment
and systems. For system manufacturers,
they must guarantee a certain amount of ESD
protection since the system itself is exposed
to the outside environment and human pres-
ence. The premise with IEC61000-4-2 is that
the system is required to withstand an amount
of static electricity when ESD is applied to
points and surfaces of the equipment that
are accessible to personnel during normal
usage. The transceiver IC receives most
of the ESD current when the ESD source is
applied to the connector pins. The test circuit
for IEC61000-4-2 is shown on Figure 17.
There are two methods within IEC61000-4-2,
the Air Discharge method and the Contact
Discharge method.
With the Air Discharge Method, an ESD
voltage is applied to the equipment under
test (EUT) through air. This simulates an
electrically charged person ready to connect
a cable onto the rear of the system only to
nd an unpleasant zap just before the person
touches the back panel. The high energy
potential on the person discharges through
an arcing path to the rear panel of the system
before he or she even touches the system.
This energy, whether discharged directly or
through air, is predominantly a function of the
discharge current rather than the discharge
voltage. Variables with an air discharge such
as approach speed of the object carrying the
ESD potential to the system and humidity
will tend to change the discharge current.
For example, the rise time of the discharge
current varies with the approach speed.
The Contact Discharge Method applies the
ESD current directly to the EUT. This method
was devised to reduce the unpredictability
of the ESD arc. The discharge current rise
time is constant since the energy is directly
transferred without the air-gap arc. In situ-
ations such as hand held systems, the ESD
charge can be directly discharged to the
Figure 16. ESD Test Circuit for Human Body Model
R
C
Device
Under
Test
DC Power
Source
C
S
R
S
SW1 SW2
DESCRIPTION
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3222E/SP3232E_100_120810
13
DEVICE PIN HUMAN BODY IEC61000-4-2
TESTED MODEL Air Discharge Direct Contact Level
Driver Outputs +15kV +15kV +8kV 4
Receiver Inputs +15kV +15kV +8kV 4
equipment from a person already holding
the equipment. The current is transferred
on to the keypad or the serial port of the
equipment directly and then travels through
the PCB and nally to the IC.
The circuit models in Figures 16 and 17 rep-
resent the typical ESD testing circuit used for
all three methods. The CS is initially charged
with the DC power supply when the rst
switch (SW1) is on. Now that the capacitor
is charged, the second switch (SW2) is on
while SW1 switches off. The voltage stored
in the capacitor is then applied through RS,
the current limiting resistor, onto the device
under test (DUT). In ESD tests, the SW2
switch is pulsed so that the device under
test receives a duration of voltage.
For the Human Body Model, the current
limiting resistor (RS) and the source capacitor
(CS) are 1.5kΩ an 100pF, respectively. For
IEC-61000-4-2, the current limiting resistor
(RS) and the source capacitor (CS) are 330Ω
an 150pF, respectively.
Figure 18. ESD Test Waveform for IEC61000-4-2
Figure 17. ESD Test Circuit for IEC61000-4-2
Table 3. Transceiver ESD Tolerance Levels
R
S
and
R
V
add up to 330Ω for IEC61000-4-2.
R
C
Device
Under
Test
DC Power
Source
C
S
R
S
SW1 SW2
R
V
Contact-Discharge Model
t = 0ns t = 30ns
0A
15A
30A
I →
t →
The higher CS value and lower RS value in
the IEC61000-4-2 model are more stringent
than the Human Body Model. The larger
storage capacitor injects a higher voltage
to the test point when SW2 is switched on.
The lower current limiting resistor increases
the current charge onto the test point.
DESCRIPTION
14
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3222E/SP3232E_100_120810
PACKAGE: 20 PIN SSOP
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3222E/SP3232E_100_120810
15
PACKAGE: 16 PIN SSOP
16
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3222E/SP3232E_100_120810
PACKAGE: 16 PIN PDIP
▲
▲
e
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3222E/SP3232E_100_120810
17
PACKAGE: 16 PIN WSOIC
18
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3222E/SP3232E_100_120810
PACKAGE: 18 PIN WSOIC
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3222E/SP3232E_100_120810
19
PACKAGE: 16 PIN nSOIC
20
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3222E/SP3232E_100_120810
PACKAGE: 16 PIN TSSOP
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3222E/SP3232E_100_120810
21
PACKAGE: 20 PIN TSSOP
22
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3222E/SP3232E_100_120810
ORDERING INFORMATION
Note: "/TR" is for tape and Reel option. "-L" is for lead free packaging
Part Number Temp. Range Package
SP3222ECA-L 0°C to +70°C 20 Pin SSOP
SP3222ECA-L/TR 0°C to +70°C 20 Pin SSOP
SP3222ECT-L 0°C to +70°C 18 Pin WSOIC
SP3222ECT-L/TR 0°C to +70°C 18 Pin WSOIC
SP3222ECY-L 0°C to +70°C 20 Pin TSSOP
SP3222ECY-L/TR 0°C to +70°C 20 Pin TSSOP
SP3222EEA-L -40°C to +85°C 20 Pin SSOP
SP3222EEA-L/TR -40°C to +85°C 20 Pin SSOP
SP3222EET-L -40°C to +85°C 18 Pin WSOIC
SP3222EET-L/TR -40°C to +85°C 18 Pin WSOIC
SP3222EEY-L -40°C to +85°C 20 Pin TSSOP
SP3222EEY-L/TR -40°C to +85°C 20 Pin TSSOP
Part Number Temp. Range Package
SP3232ECA-L 0°C to +70°C 16 Pin SSOP
SP3232ECA-L/TR 0°C to +70°C 16 Pin SSOP
SP3232ECN-L 0°C to +70°C 16 Pin NSOIC
SP3232ECN-L/TR 0°C to +70°C 16 Pin NSOIC
SP3232ECP-L 0°C to +70°C 16 Pin PDIP
SP3232ECT-L 0°C to +70°C 16 Pin WSOIC
SP3232ECT-L/TR 0°C to +70°C 16 Pin WSOIC
SP3232ECY-L 0°C to +70°C 16 Pin TSSOP
SP3232ECY-L/TR 0°C to +70°C 16 Pin TSSOP
SP3232EEA-L -40°C to +85°C 16 Pin SSOP
SP3232EEA-L/TR -40°C to +85°C 16 Pin SSOP
SP3232EEN-L -40°C to +85°C 16 Pin NSOIC
SP3232EEN-L/TR -40°C to +85°C 16 Pin NSOIC
SP3232EEP-L -40°C to +85°C 16 Pin PDIP
SP3232EET-L -40°C to +85°C 16 Pin WSOIC
SP3232EET-L/TR -40°C to +85°C 16 Pin WSOIC
SP3232EEY-L -40°C to +85°C 16 Pin TSSOP
SP3232EEY-L/TR -40°C to +85°C 16 Pin TSSOP
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3222E/SP3232E_100_120810
23
REVISION HISTORY
Notice
EXAR Corporation reserves the right to make changes to any products contained in this publication in order to improve design, performance or reli-
ability. EXAR Corporation assumes no representation that the circuits are free of patent infringement. Charts and schedules contained herein are
only for illustration purposes and may vary depending upon a user's specic application. While the information in this publication has been carefully
checked; no responsibility, however, is assumed for inaccuracies.
EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can
reasonably be expected to cause failure of the life support system or to signicantly affect its safety or effectiveness. Products are not authorized for
use in such applications unless EXAR Corporation receives, in writting, assurances to its satisfaction that: (a) the risk of injury or damage has been
minimized ; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances.
Copyright 2010 EXAR Corporation
Datasheet December 2010
For technical questions please email Exar's Serial Technical Support group at: serialtechsupport@exar.com
Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.
DATE REVISION DESCRIPTION
08/22/05 -- Legacy Sipex Datasheet
12/08/10 1.0.0 Convert to Exar Format and update ordering information.