©KEMET Electronics Corporation, P.O. Box 5928, Greenville, S.C. 29606, (864) 963-63004
MULTILAYER CERAMIC CAPACITORS/AXIAL
&RADIAL LEADED
Multilayer ceramic capacitors are available in a
variety of physical sizes and configurations, including
leaded devices and surface mounted chips. Leaded
styles include molded and conformally coated parts
with axial and radial leads. However, the basic
capacitor element is similar for all styles. It is called a
chip and consists of formulated dielectric materials
which have been cast into thin layers, interspersed
with metal electrodes alternately exposed on opposite
edges of the laminated structure.
The entire structure is
fired at high temperature to produce a monolithic
block
which provides high capacitance values in a
small physical volume. After firing, conductive
terminations are applied to opposite ends of the chip to
make contact with the exposed electrodes.
Termination materials and methods vary depending on
the intended use.
TEMPERATURE CHARACTERISTICS
Ceramic dielectric materials can be formulated with
awide range of characteristics. The EIA standard for
ceramic dielectric capacitors (RS-198) divides ceramic
dielectrics into the following classes:
Class I: Temperature compensating capacitors,
suitable for resonant circuit application or other appli-
cations where high Q and stability of capacitance char-
acteristics are required. Class I capacitors have
predictable temperature coefficients and are not
affected by voltage, frequency or time. They are made
from materials which are not ferro-electric, yielding
superior stability but low volumetric efficiency.Class I
capacitors are the most stable type available, but have
the lowest volumetric efficiency.
Class II: Stable capacitors, suitable for bypass
or coupling applications or frequency discriminating
circuits where Q and stability of capacitance char-
acteristics arenot of major importance. Class II
capacitors have temperature characteristics of ± 15%
or less. They aremade from materials which are
ferro-electric, yielding higher volumetric efficiency but
less stability. Class II capacitors are affected by
temperature, voltage, frequency and time.
Class III: General purpose capacitors, suitable
for by-pass coupling or other applications in which
dielectric losses, high insulation resistance and
stability of capacitance characteristics are of little or
no importance. Class III capacitors are similar to Class
II capacitors except for temperature characteristics,
which are greater than ± 15%. Class III capacitors
have the highest vol
umetric efficiency and poorest
stability of any type.
KEMET leaded ceramic capacitors are offered in
the three most popular temperature characteristics:
C0G: Class I, with a temperature coefficient of 0 ±
30 ppm per degree C over an operating
temperature range of - 55°C to + 125°C (Also
known as “NP0”).
X7R: Class II, with a maximum capacitance
change of ± 15% over an operating temperature
range of - 55°Cto + 125°C.
Z5U: Class III, with a maximum capacitance
change of + 22% - 56% over an operating tem-
peraturerange of + 10°Cto + 85°C.
Specified electrical limits for these three temperature
characteristics areshown in Table 1.
SPECIFIED ELECTRICAL LIMITS
Table I
C0G X7R Z5U
Dissipation Factor: Measured at following conditions.
C0G 1 kHz and 1 vrms if capacitance >1000pF
1 MHz and 1 vrms if capacitance 1000 pF
X7R 1 kHz and 1 vrms* or if extended cap range 0.5 vrms
Z5U 1 kHz and 0.5 vrms
0.10%
2.5%
(3.5% @ 25V)
4.0%
Dielectric Stength: 2.5 times rated DC voltage.
Insulation Resistance (IR): At rated DC voltage,
whichever of the two is smaller
1,000 M F
or 100 G
1,000 M F
or 100 G
1,000 M F
or 10 G
Temperature Characteristics: Range, °C
Capacitance Change without
DC voltage
-55 to +125
0 ± 30 ppm/°C
-55 to +125
± 15%
+ 10 to +85
+22%,-56%
* MHz and 1 vrms if capacitance 100 pF on military product.
Parameter
Temperature Characteristics
Pass Subsequent IR Test
ELECTRICAL CHARACTERISTICS
The fundamental electrical properties of multilayer
ceramic capacitors are as follows:
Polarity: Multilayer ceramic capacitors are not polar,
and may be used with DC voltage applied in either direction.
Rated Voltage: This term refers to the maximum con-
tinuous DC working voltage permissible across the entire
operating temperature range. Multilayer ceramic capacitors
are not extremely sensitive to voltage, and brief applications
ofvoltage above rated will not result in immediate failure.
However, reliability will be reduced by exposure to sustained
voltages above rated.
Capacitance:
The standard unit of capacitance is the
farad. For practical capacitors, it is usually expressed in
microfarads (10-6 farad), nanofarads (10-9 farad), or picofarads
(10-12 farad). Standard measurement conditions are as
follows:
Class I (up to 1,000 pF): 1MHz and 1.2 VRMS
maximum.
Class I (over 1,000 pF): 1kHz and 1.2 VRMS
maximum.
Class II: 1 kHz and 1.0 ± 0.2 VRMS.
Class III: 1 kHz and 0.5 ± 0.1 VRMS.
Like all other practical capacitors, multilayer ceramic
capacitors also have resistance and inductance. A simplified
schematic for the equivalent circuit is shown in Figure 1.
Other significant electrical characteristics resulting from
these additional properties are as follows:
Impedance: Since the parallel resistance (Rp) is nor-
mally very high, the total impedance of the capacitor is:
Figure 1
C=Capacitance
L = Inductance
RS=Equivalent Series Resistance (ESR)
RP=Insulation Resistance (IR)
RP
RS
C
L
Z =
Where Z = Total Impedance
RS = Equivalent Series Resistance
X
C
=Capacitive Reactance =
2ππfC
X
L
=Inductive Reactance = 2ππfL
1
R
S
+(X
C
- X
L
)
22
DF = ESR
Xc
Xc2πfC
1
=
Figure 2
δ
Ζ
O
Xc
ESR
The variation of a capacitor’s impedance with frequency
determines its effectiveness in many applications.
Dissipation Factor: Dissipation Factor (DF) is a mea-
sure of the losses in a capacitor under AC application. It is the
ratio of the equivalent series resistance to the capacitive reac-
tance
,and is usually expressed in percent. It is usually mea-
sured simultaneously with capacitance, and under the same
conditions. The vector diagram in Figure 2 illustrates the rela-
tionship between DF, ESR, and impedance. The reciprocal of
the dissipation factor is called the “Q”, or quality factor. For
convenience, the “Q” factor is often used for very low values
of dissipation factor. DF is sometimes called the “loss tangent”
or “tangent d”, as derived from this diagram.
Insulation Resistance: Insulation Resistance (IR) is the
DC resistance measured across the terminals of a capacitor,
represented by the parallel resistance (Rp) shown in Figure 1.
For a given dielectric type, electrode area increases with
capacitance, resulting in a decrease in the insulation resis-
tance. Consequently, insulation resistance is usually specified
as the “RC” (IR x C) product, in terms of ohm-farads or
megohm-microfarads. The insulation resistance for a specific
capacitance value is determined by dividing this product by
the capacitance. However, as the nominal capacitance values
become small, the insulation resistance calculated from the
RC product reaches values which are impractical.
Consequently, IR specifications usually include both a mini-
mum RC product and a maximum limit on the IR calculated
from that value. For example, a typical IR specification might
read “1,000 megohm-microfarads or 100 gigohms, whichever
is less.”
Insulation Resistance is the measure of a capacitor to
resist the flow of DC leakage current. It is sometimes referred
to as “leakage resistance.” The DC leakage current may be
calculated by dividing the applied voltage by the insulation
resistance (Ohm’s Law).
Dielectric Withstanding Voltage: Dielectric withstand-
ing voltage (DWV) is the peak voltage which a capacitor is
designed to withstand for short periods of time without dam-
age. All KEMET multilayer ceramic capacitors will withstand a
test voltage of 2.5 x the rated voltage for 60 seconds.
KEMET specification limits for these characteristics at
standard measurement conditions are shown in Table 1 on
page 4. Variations in these properties caused by changing
conditions of temperature, voltage, frequency, and time are
covered in the following sections.
©KEMET Electronics Corporation, P.O. Box 5928, Greenville, S.C. 29606, (864) 963-6300 5
APPLICATION NOTES FOR MULTILAYER
CERAMIC CAPACITORS
Application Notes
APPLICATION NOTES FOR MULTILAYER
CERAMIC CAPACITORS
©KEMET Electronics Corporation, P.O. Box 5928, Greenville, S.C. 29606, (864) 963-63006
TABLE 1
EIA TEMPERATURE CHARACTERISTIC CODES
FOR CLASS I DIELECTRICS
Significant Figure Multiplier Applied Tolerance of
of Temperature to Temperature Temperature
Coefficient Coefficient Coefficient *
PPM per Letter Multi- Number PPM per Letter
Degree C Symbol plier Symbol Degree C Symbol
0.0 C -1 0 ±30 G
0.3 B -10 1 ±60 H
0.9 A -100 2 ±120 J
1.0 M -1000 3 ±250 K
1.5 P -100000 4 ±500 L
2.2 R +1 5 ±1000 M
3.3 S +10 6 ±2500 N
4.7 T +100 7
7.5 U +1000 8
+10000 9
*These symetrical tolerances apply to a two-point measurement of
temperature coefficient: one at 25°C and one at 85°C. Some deviation
is permitted at lower temperatures. For example, the PPM tolerance
for C0G at -55°C is +30 / -72 PPM.
TABLE 2
EIA TEMPERATURE CHARACTERISTIC CODES
FOR CLASS II & III DIELECTRICS
Low Temperature High Temperature Maximum Capacitance
Rating Rating Shift
Degree Letter Degree Number Letter
Celcius Symbol Celcius Symbol Percent Symbol
+10C Z +45C 2 ±1.0% A
-30C Y +65C 4 ±1.5% B
-55C X +85C 5 ±2.2% C
+105C 6±3.3% D
+125C 7 ±4.7% E
+150C 8 ±7.5% F
+200C 9±10.0% P
±15.0% R
±22.0% S
+22/-33% T
+22/-56% U
+22/-82% V
+10 +20 +30 +40 +50 +60 +70 +80
Effect of Temperature: Both capacitance and dissipa-
tion factor are affected by variations in temperature. The max-
imum capacitance change with temperatureis defined by the
temperaturecharacteristic. However,this only defines a “box”
bounded by the upper and lower operating temperatures and
the minimum and maximum capacitance values. Within this
“box”, the variation with temperature depends upon the spe-
cific dielectric formulation. Typical curves for KEMET capaci-
tors are shown in Figures 3, 4, and 5. These figures also
include the typical change in dissipation factor for KEMET
capacitors.
Insulation resistance decreases with temperature.
Typically, the insulation resistance at maximum rated temper-
atureis 10% of the 25°Cvalue.
Effect of Voltage: Class I ceramic capacitors arenot
affected by variations in applied AC or DC voltages. For Class
II and III ceramic capacitors, variations in voltage affect only
the capacitance and dissipation factor.The application of DC
voltage higher than 5 vdc reduces both the capacitance and
dissipation factor. The application of AC voltages up to 10-20
Vac tends to increase both capacitance and dissipation factor.
At higher AC voltages, both capacitance and dissipation factor
begin to decrease.
Typical curves showing the effect of applied AC and DC
voltage are shown in Figure 6 for KEMET X7R capacitors and
Figure 7 for KEMET Z5U capacitors.
Effect of Frequency: Frequency affects both capaci-
tance and dissipation factor. Typical curves for KEMET multi-
layer ceramic capacitors are shown in Figures 8 and 9.
T
he variation of impedance with frequency is an impor-
tant consideration in the application of multilayer ceramic
capacitors. Total impedance of the capacitor is the vector of the
capacitive reactance, the inductive reactance, and the ESR, as
illustrated in Figure 2. As frequency increases, the capacitive
reactance decreases. However, the series inductance (L)
shown in Figure 1 produces inductive reactance, which
increases with frequency. At some frequency, the impedance
ceases to be capacitive and becomes inductive. This point, at
the bottom of the V-shaped impedance versus frequency
curves, is the self-resonant frequency. At the self-resonant fre-
quency, the reactance is zero, and the impedance consists of
the ESR only.
Typical impedance versus frequency curves for KEMET
multilayer ceramic capacitors areshown in Figures 10, 11, and
12. These curves apply to KEMET capacitors in chip form, with-
out leads. Lead configuration and lead length have a significant
impact on the series inductance. The lead inductance is
approximately 10nH/inch, which is large compared to the
inductance of the chip. The effect of this additional inductance
is a decrease in the self-resonant frequency,and an increase
in impedance in the inductive region above the self-resonant
frequency.
Effect of Time: The capacitance of Class II and III
dielectrics change with time as well as with temperature, volt-
age and frequency. This change with time is known as “aging.”
It is caused by gradual realignment of the crystalline structure
of the ceramic dielectric material as it is cooled below its Curie
temperature, which produces a loss of capacitance with time.
The aging process is predictable and follows a logarithmic
decay.Typical aging rates for C0G, X7R, and Z5U dielectrics
areas follows:
C0G None
X7R 2.0% per decade of time
Z5U 5.0% per decade of time
Typical aging curves for X7R and Z5U dielectrics are
shown in Figure 13.
The aging process is reversible. If the capacitor is heat-
ed to a temperature above its Curie point for some period of
time, de-aging will occur and the capacitor will regain the
capacitance lost during the aging process. The amount of de-
aging depends on both the elevated temperatureand the
length of time at that temperature. Exposure to 150°C for one-
half hour or 125°C for two hours is usually sufficient to return
the capacitor to its initial value.
Because the capacitance changes rapidly immediately
after de-aging, capacitance measurements are usually delayed
for at least 10 hours after the de-aging process, which is often
referred to as the “last heat.” In addition, manufacturers utilize
the aging rates to set factory test limits which will bring the
capacitance within the specified tolerance at some futuretime,
to allow for customer receipt and use. Typically, the test limits
areadjusted so that the capacitance will be within the specified
tolerance after either 1,000 hours or 100 days, depending on
the manufacturer and the product type.
©KEMET Electronics Corporation, P.O. Box 5928, Greenville, S.C. 29606, (864) 963-6300 7
Application Notes
APPLICATION NOTES FOR MULTILAYER
CERAMIC CAPACITORS
APPLICATION NOTES FOR MULTILAYER
CERAMIC CAPACITORS
©KEMET Electronics Corporation, P.O. Box 5928, Greenville, S.C. 29606, (864) 963-63008
POWER DISSIPATION
Power dissipation has been empirically determined for
two representative KEMET series: C052 and C062. Power dis-
sipation capability for various mounting configurations is shown
in Table 3. This table was extracted from Engineering Bulletin
F-2013, which provides a more detailed treatment of this sub-
ject.
Note that no significant difference was detected between
the two sizes in spite of a 2 to 1 surface area ratio. Due to the
materials used in the construction of multilayer ceramic capac-
itors, the power dissipation capability does not depend greatly
onthe surface area of the capacitor body, but rather on how
well heat is conducted out of the capacitor lead wires.
Consequently, this power dissipation capability is applicable to
other leaded multilayer styles and sizes.
TABLE 3
POWER DISSIPATION CAPABILITY
(Rise in Celsius degrees per Watt)
Power
Mounting Configuration Dissipation
ofC052 & C062
1.00" leadwiresattached to binding post 90 Celsius degrees
ofGR-1615 bridge (excellent heat sink) rise per Watt ±10%
0.25" leadwires attached to binding post 55 Celsius degrees
of GR-1615 bridge rise per Watt ±10%
Capacitor mounted flush to 0.062" glass- 77 Celsius degrees
epoxy circuit board with small copper traces rise per Watt ±10%
Capacitor mounted flush to 0.062" glass- 53 Celsius degrees
epoxy circuit board with four square inches rise per Watt ±10%
of copper land area as a heat sink
As shown in Table 3, the power dissipation capability of
the capacitor is very sensitive to the details of its use environ-
ment. The temperature rise due to power dissipation should not
exceed 20°C. Using that constraint, the maximum permissible
power dissipation may be calculated from the data provided in
Table 3.
It is often convenient to translate power dissipation capa-
bility into a permissible AC voltage rating. Assuming a sinu-
soidal wave form, the RMS “ripple voltage” may be calculated
The data necessary to make this calculation is included in
Engineering Bulletin F-2013. However,the following criteria
must be observed:
1. The temperature rise due to power dissipation
should be limited to 20°C.
2. The peak AC voltage plus the DC voltage must not
exceed the maximum working voltage of the
capacitor.
Provided that these criteria aremet, multilayer ceramic
capacitors may be operated with AC voltage applied without
need for DC bias.
RELIABILITY
Awell constructed multilayer ceramic capacitor is
extremely reliable and, for all practical purposes, has an infi-
nite life span when used within the maximum voltage and
temperature ratings. Capacitor failure may be induced by sus-
tained operation at voltages that exceed the rated DC voltage,
voltage spikes or transients that exceed the dielectric with-
standing voltage, sustained operation at temperatures above
the maximum rated temperature, or the excessive tempera-
ture rise due to power dissipation.
Failure rate is usually expressed in terms of percent per
1,000 hours or in FITS (failure per billion hours). Some
KEMET series are qualified under U.S. military established
reliability specifications MIL-PRF-20, MIL-PRF-123, MIL-
PRF-39014, and MIL-PRF-55681. Failure rates as low as
0.001% per 1,000 hours are available for all capacitance /
voltage ratings covered by these specifications. These spec-
ifications and
accompanying Qualified Products List should
be consulted for details.
For series not covered by these military specifications,
an internal testing program is maintained by KEMET Quality
Assurance. Samples from each week’s production are sub-
jected to a 2,000 hour accelerated life test at 2 x rated voltage
and maximum rated temperature. Based on the results of
these tests, the average failure rate for all non-military series
covered by this test program is currently 0.06% per 1,000
hours at maximum rated conditions. The failure rate would be
much lower at typical use conditions. For example, using MIL-
HDBK-217D this failure rate translates to 0.9 FITS at 50%
rated voltage and 50°C.
Current failure rate details for specific KEMET multilay-
er ceramic capacitor series areavailable on request.
MISAPPLICATION
Ceramic capacitors, like any other capacitors, may fail
if they aremisapplied. Typical misapplications include expo-
sure to excessive voltage, current or temperature. If the
dielectric layer of the capacitor is damaged by misapplication
the electrical energy of the circuit can be released as heat,
which may damage the circuit board and other components
as well.
If potential for misapplication exists, it is recommended
that precautions be taken to protect personnel and equipment
during initial application of voltage. Commonly used precau-
tions include shielding of personnel and sensing for excessive
power drain during board testing.
STORAGE AND HANDLING
Ceramic chip capacitors should be stored in normal
working environments. While the chips themselves are quite
robust in other environments, solderability will be degraded
by exposureto high temperatures, high humidity, corrosive
atmospheres, and long term storage. In addition, packaging
materials will be degraded by high temperature–reels may
soften or warp, and tape peel force may increase. KEMET
recommends that maximum storage temperature not exceed
40˚ C, and maximum storage humidity not exceed 70% rela-
tive humidity. In addition, temperature fluctuations should be
minimized to avoid condensation on the parts, and atmos-
pheres should be free of chlorine and sulfur bearing com-
pounds. For optimized solderability, chip stock should be
used promptly, preferably within 1.5 years of receipt.
from the following formula:
IMPEDANCE VS FREQUENCY
Impedance (Ohms)
110100 1,000
0.001
0.01
1
10
100
0.1
0.1
Frequency - MHz
Impedance vs Frequency for C0G Dielectric
Figure 10.
EFFECT OF FREQUENCY
-0.1
0
+0.2
-0.2
+0.1
0.10
0.20
0.0
Frequency - Hertz
Capacitance & DF vs Frequency - C0G
Figure 8.
%DF
Typical Aging Rates for X7R & Z5UFigure 13.
74%
76%
78%
80%
82%
84%
86%
88%
90%
92%
94%
96%
98%
100%
Capacitance
110100 1000 10K 100K
EFFECT OF TIME
%DF
-10
-5
+5
-15
0
5.0
10.0
0.0
2.5
7.5
Frequency - Hertz
Capacitance & DF vs Frequency - X7R & Z5U
Figure 9.
.01μF.001μF
%ΔC
1001K 10K 100K1M 10M
1001K 10K 100K1M 10M
%ΔC
%ΔC
%DF
Z5U
X7R
%DF
%ΔC
Impedance (Ohms)
110100 1,000
0.001
0.01
1
10
100
0.1
0.1
Frequency - MHz
Impedance vs Frequency for Z5U Dielectric
Figure 12.
Impedance (Ohms)
110100 1,000
0.001
0.01
1
10
100
0.1
0.1
Frequency - MHz
Impedance vs Frequency for X7R Dielectric
Figure 11.
0.1μF
1.0 μF
0.1μF.01μF
1.0 μF
Impedance vs. Frequency
Leaded Ceramic C0G
0.01
0.1
1
10
100
0.1 1 1 0100 1000
Frequency - MHz
Impedance (Ohms)
0.01µF
0.001µF
Leaded X7R
0.01
0.1
1
10
100
0.1 1 1 0100 1000
Frequency - MHz
Impedance (Ohms)
0.01µF
0.1µF
Impedance vs. Frequency
1.0µF
Impedance vs. Frequency
Leaded Z5U
0.01
0.1
1
10
100
0.1 1 1 0100 1000
Frequency - MHz
Impedance (Ohms)
0.1µF
1.0µF
Impedance vs Frequency
for C0G Dielectric
Figure 10.
Impedance vs Frequency
for Z5U Dielectric
Figure 12.
Impedance vs Frequency
for X7R Dielectric
Figure 11.
Impedance vs Frequency
for C0G Dielectric
Figure 10.
Impedance vs Frequency
for Z5U Dielectric
Figure 12.
Impedance vs Frequency
for X7R Dielectric
Figure 11.
Impedance vs Frequency
for C0G Dielectric
Figure 10.
Impedance vs Frequency
for Z5U Dielectric
Figure 12.
Impedance vs Frequency
for X7R Dielectric
Figure 11.
Capacitance
100%
74%
76%
78%
80%
82%
84%
86%
88%
90%
92%
94%
96%
98%
X7R
Z5U
1 10 100 1000 10K 100K
©KEMET Electronics Corporation, P.O. Box 5928, Greenville, S.C. 29606, (864) 963-6300 9
Application Notes
APPLICATION NOTES FOR MULTILAYER
CERAMIC CAPACITORS
Impedance vs Frequency
for C0G Dielectric
Figure 10.
Impedance vs Frequency
for Z5U Dielectric
Figure 12.
Impedance vs Frequency
for X7R Dielectric
Figure 11.
Impedance vs Frequency
for C0G Dielectric
Figure 10.
Impedance vs Frequency
for Z5U Dielectric
Figure 12.
Impedance vs Frequency
for X7R Dielectric
Figure 11.
Impedance vs Frequency
for C0G Dielectric
Figure 10.
Impedance vs Frequency
for Z5U Dielectric
Figure 12.
Impedance vs Frequency
for X7R Dielectric
Figure 11.
(hours)
©KEMET Electronics Corporation, P.O. Box 5928, Greenville, S.C. 29606, (864) 963-630010
CERAMIC CONFORMALLY COATED/AXIAL
AXIMAX”
GENERAL SPECIFICATIONS
Working Voltage:
Axial(WVDC)
C0G 50, 100,200
X7R 25, 50, 100, 200,250
Z5U 50, 100
Radial(WVDC)
C0G 50, 100,200, 500, 1k,1.5k, 2k, 2.5k, 3k
X7R 25, 50, 100, 200,250, 500, 1k,1.5k, 2k, 2.5k, 3k
Z5U 50, 100
Temperature Characteristics:
C0G 0 ±30 PPM / °C from -55°C to +125°C (1)
X7R ± 15% from -55°C to +125°C
Z5U + 22%, -56% from +10°C to +85°C
Capacitance Tolerance:
C0G ±0.5pF, ±1%, ±2%, ±5%, ±10%, ±20%
X7R ±10%, ±20%, +80% / -20%
Z5U ±20%, 80% / -20%
Construction:
Epoxy encapsulatedmeets flame test requirements
of UL Standard 94V-0.
High-temperature solder meets EIA RS-198, Method 302,
Condition B (260°C for 10 seconds)
Lead Material:
Standard: 100% matte tin (Sn) with nickel (Ni) underplate
and steel core ( “TA” designation).
Alternative 1: 60% Tin (Sn)/40% Lead (Pb) finish with copper-
clad steel core (HA” designation).
Alternative 2: 60% Tin (Sn)/40% Lead (Pb) finish with 100%
copper core (available with “HA” termination code with c-spec)
Solderability:
EIA RS-198, Method 301, Solder Temperature: 230°C ±5°C.
Dwell time in solder = 7 ± seconds.
Terminal Strength:
EIA RS-198, Method 303, Condition A (2.2kg)
ELECTRICAL
Capacitance @ 25°C:
Within specifiedtolerance andfollowing test conditions.
C0G – >1000pF with 1.0 vrms @ 1 kHz
1000pF with 1.0 vrms @ 1 MHz
X7R – with 1.0 vrms @ 1 kHz (Referee Time: 1,000 hours)
Z5U – with 1.0 vrms @ 1 kHz
Dissipation Factor @25°C:
Same test conditions as capacitance.
C0G 0.10% maximum
X7R – 2.5% maximum (3.5% for 25V)
Z5U – 4.0% maximum
Insulation Resistance @25°C:
EIA RS-198, Method 104, Condition A <1kV
C0G – 100 G or 1000 M F, whicheveris less.
500V test @ rated voltage, >500V test @ 500V
X7R 100 G or 1000 M F, whichever is less.
500V test @ rated voltage, >500V test @ 500V
Z5U – 10 G or 1000 M F, whichever is less.
Dielectric Withstanding Voltage:
EIA RS-198, Method 103
250Vtest @ 250% ofrated voltage for 5 seconds
with current limited to 50mA.
500Vtest @ 150% of rated voltage for 5 seconds
with current limited to 50mA.
1000Vtest @ 120% of rated voltage for 5 seconds
with current limited to 50mA.
ENVIRONMENTAL
Vibration:
with current limited to 50mA.
ENVIRONMENTAL
Vibration:
EIA RS-198, Method 304, Condition D (10-2000Hz; 20g)
Shock:
EIA RS-198, Method 305, Condition I (100g)
Life Test:
EIA RS-198, Method 201, ConditionD.
<200V
C0G – 200% of rated voltage @ +125°C
X7R 200% of rated voltage @ +125°C
Z5U – 200% of rated voltage @ +85°C
>500V
C0G – rated voltage @ +125°C
X7R – rated voltage @ +125°C
Post Test Limits @ 25°C are:
Capacitance Change:
C0G ( 200V) – ±3% or 0.25pF, whichever is greater.
C0G ( 500V) – ±3% or 0.50pF, whichever is greater.
X7R – ± 20% of initial value (2)
Z5U – ± 30% of initial value (2)
Dissipation Factor:
C0G 0.10% maximum
X7R – 2.5% maximum (3.5% for 25V)
Z5U – 4.0% maximum
Insulation Resistance:
C0G 10 G or 100 M F, whichever is less.
>1kV tested @ 500V.
X7R – 10 G or 100 M F, whichever is less.
>1kV tested @ 500V.
Z5U – 1 G or 100 M F, whichever is less.
Moisture Resistance:
EIA RS-198, Method 204, Condition A (10 cycles
without applied voltage).
Post Test Limits @ 25°C are:
Capacitance Change:
C0G ( 200V) ±3% or ±0.25pF, whichever is greater.
C0G ( 500V) – ±3% or ± 0.50pF,whichever is greater.
X7R – ± 20% of initial value (2)
Z5U – ± 30% of initial value (2)
Dissipation Factor:
C0G 0.10% maximum
X7R – 2.5% maximum (3.5% for 25V)
Z5U – 4.0% maximum
Insulation Resistance:
C0G 10 G or 100 M Fwhichever is less.
500V test @ rated voltage, >500V test @ 500V.
X7R – 10 G or 100 M F, whichever is less.
500V test @ rated voltage, >500V test @ 500V.
Z5U – 1k M or 100 M F, whichever is less.
Thermal Shock:
EIA RS-198, Method 202, Condition B (C0G & X7R:
-55°C to 125°C); Condition A (Z5U: -55°C to 85°C)
(1) +53 PPM -30 PPM/ °C from +25°C to -55°C, + 60 PPM below 10pF.
(2) X7R and Z5U dielectrics exhibitaging characteristics; therefore,it is highly
recommended that capacitors be deaged for 2 hours at 150°C and stabilized
at room temperature for 48 hours before capacitance measurements are made.
©KEMET Electronics Corporation, P.O. Box 5928, Greenville, S.C. 29606, (864) 963-6300 11
CAPACITOR OUTLINE DRAWING
MAXIMUM DIMENSIONS — INCHES (MILLIMETERS)
ORDERING INFORMATION
MARKING INFORMATION
CAPACITOR OUTLINE DRAWING
K5R
104K
AB
0814
Manufacturer
(KEMET) Rated Voltage Dielectric
Capacitance
Tolerance
Capacitance
Code
Lot
Code Date
Code
Multlayer Ceramic
Capacitors
CERAMIC CONFORMALLY COATED/AXIAL
AXIMAX”
Style
L
Max
D
Max
LD (Nominal)
+.001,-.003
(+.025,-.076)
LL
Min
C410 .170 (4.32) .100 (2.54) .020 (.51) 1.0 (25.4)
C412 .170 (4.32) .120 (3.05) .020 (.51) 1.0 (25.4)
C420 .260 (6.60) .100 (2.54) .020 (.51) 1.0 (25.4)
C430 .290 (7.37) .150 (3.81) .020 (.51) 1.0 (25.4)
C440 .400 (10.16) .150 (3.81) .020 (.51) 1.0 (25.4)
C 410 C 104 K 5 R 5 T A
CERAMIC
CASE SIZE
See Table Above
SPECIFICATION
C Standard
CAPACITANCE PICOFARAD CODE
Expressed in picofarads (pF). First two
digits represent significant figures. Third
digit specifies number of zeros. Use 9 for
1.0 through 9.9pF. Example 2.2pF = 229
CAPACITANCE TOLERANCE
C–±0.25pF; D – ±0.5pF; F – ±1.0%;
G ±2.0%; J – ±5%; K – ±10%; M – ±20%;
Z -20% +80%
RATED VOLTAGE (DC)
A – 250V; 2 – 200V; 1 – 100V; 5 – 50V; 3 – 25V
FAILURE RATE
A – Not Applicable
LEAD MATERIAL
T 100% Tin (Sn)
H–60/40% Tin/Lead (SnPb)
INTERNAL CONSTRUCTION
5 Multilayer
DIELECTRIC
EIA Designation
G–C0G (NP0) - Ultra Stable
R X7R - Stable
U Z5U - General Purpose
©KEMET Electronics Corporation, P.O. Box 5928, Greenville, S.C. 29606, (864) 963-630012
CERAMIC CONFORMALLY COATED/AXIAL
AXIMAX”
ULTRA-STABLE TEMPERATURE CHARACTERISTIC — C0G/NP0
RATINGS & PART NUMBER REFERENCE
For packaging information, see pages 46 and 48.
50 100 200 50 100 200 50 100 200 50 100 200 50 100 200
1.0pF 109 C,D
1.5 159 C,D
1.8 189 C,D
2.2 229 C,D
2.7 279 C,D
3.3 339 C,D
3.9 399 C,D
4.7 479 C,D
5.6 569 C,D
6.8 689 C,D
8.2 829 C,D
10 100 J,K,M
12 120 J,K,M
15 150 J,K,M
18 180 J,K,M
22 220 J,K,M
27 270 J,K,M
33 330 J,K,M
39 390 J,K,M
47 470 J,K,M
56 560 J,K,M
68 680 J,K,M
82 820 J,K,M
100 101 J,K,M
120 121 J,K,M
150 151 J,K,M
180 181 J,K,M
220 221 J,K,M
270 271 J,K,M
330 331 J,K,M
390 391 J,K,M
470 471 J,K,M
560 561 J,K,M
680 681 J,K,M
820 821 J,K,M
1000 102 J,K,M
1200 122 J,K,M
1500 152 J,K,M
1800 182 J,K,M
2200 222 J,K,M
2700 272 J,K,M
3300 332 J,K,M
3900 392 J,K,M
4700 472 J,K,M
5600 562 J,K,M
6800 682 J,K,M
8200 822 J,K,M
.010uF 103 J,K,M
.012 123 J,K,M
.015 153 J,K,M
Cap Cap
Code Cap
Tol
Style WVDCWVDC WVDC WVDC WVDC C440C412C410 C430C420
©KEMET Electronics Corporation, P.O. Box 5928, Greenville, S.C. 29606, (864) 963-6300 13
STABLE TEMPERATURE CHARACTERISTIC — X7R
For packaging information, see pages 46 and 48.
RATINGS & PART NUMBER REFERENCE
Aximax
CERAMIC CONFORMALLY COATED/AXIAL
AXIMAX”
Cap 25 50 100 200 250 25 50 100 200 250 25 50 100 200 250 25 50 100 200 250 25 50 100 200 250
10 100 J, K,M
12 120 J, K,M
15 150 J, K,M
18 180 J, K,M
22 220 J, K,M
27 270 J, K,M
33 330 J, K,M
39 390 J, K,M
47 470 J, K,M
56 560 J, K,M
68 680 J, K,M
82 820 J, K,M
100 101 J, K,M
120 121 J, K,M
150 151 J, K,M
180 181 J, K,M
220 221 J, K,M
270 271 J, K,M
330 331 J, K,M
390 391 J, K,M
470 471 J, K,M
560 561 J, K,M
680 681 J, K,M
820 821 J, K,M
1000 102 J, K,M
1200 122 J, K,M
1500 152 J, K,M
1800 182 J, K,M
2200 222 J, K,M
2700 272 J, K,M
3300 332 J, K,M
3900 392 J, K,M
4700 472 J, K,M
5600 562 J, K,M
6800 682 J, K,M
8200 822 J, K,M
.010uF 103 J, K,M
.012 123 J, K,M
.015 153 J, K,M
.018 183 J, K,M
.022 223 J, K,M
.027 273 J, K,M
.033 333 J, K,M
.039 393 J, K,M
.047 473 J, K,M
.056 563 J, K,M
.068 683 J, K,M
.082 823 J, K,M
.10 104 J, K,M
.12 124 J, K,M
.15 154 J, K,M
.18 184 J, K,M
.22 224 J, K,M
.27 274 J, K,M
.33 334 J, K,M
.39 394 J, K,M
.47 474 J, K,M
.56 564 J, K,M
.68 684 J, K,M
.82 824 J, K,M
1.0 105 J, K,M
1.2 125 J, K,M
1.5 155 J, K,M
1.8 185 J, K,M
2.2 225 J, K,M
2.7 275 J, K,M
3.3 335 J, K,M
3.9 395 J, K,M
4.7 475 J, K,M
5.6 565 J, K,M
6.8 685 J, K,M
Style C440C420 C430C412C410 WVDC
Cap
Code Cap
Tol WVDCWVDC WVDC
WVDC
©KEMET Electronics Corporation, P.O. Box 5928, Greenville, S.C. 29606, (864) 963-630014
CERAMIC CONFORMALLY COATED/AXIAL
AXIMAX”
50 100 20050100 20050 100 20050100 20050100 200
1000pF 102 M,Z
1200 122 M,Z
1500 152 M,Z
1800 182 M,Z
2200 222 M,Z
2700 272 M,Z
3300 332 M,Z
3900 392 M,Z
4700 472 M,Z
5600 562 M,Z
6800 682 M,Z
8200 822 M,Z
.010uF 103 M,Z
.012 123 M,Z
.015 153 M,Z
.018 183 M,Z
.022 223 M,Z
.027 273 M,Z
.033 333 M,Z
.039 393 M,Z
.047 473 M,Z
.056 563 M,Z
.068 683 M,Z
.082 823 M,Z
.10 104 M,Z
.12 124 M,Z
.15 154 M,Z
.18 184 M,Z
.22 224 M,Z
.27 274 M,Z
.33 334 M,Z
.39 394 M,Z
.47 474 M,Z
.56 564 M,Z
.68 684 M,Z
.82 824 M,Z
1.0 105 M,Z
1.2 125 M,Z
1.5 155 M,Z
1.8 185 M,Z
2.2 225 M.Z
C440
WVDC WVDC WVDC WVDC WVDC
C410 C412 C420 C430
Cap
Style
Cap
Code
Cap
Tol
RATINGS & PART NUMBER REFERENCE
GENERAL PURPOSE TEMPERATURE CHARACTERISTIC — Z5U
For packaging information, see pages 46 and 48.
©KEMET Electronics Corporation, P.O. Box 5928, Greenville, S.C. 29606, (864) 963-630046
CERAMIC LEADED
PACKAGING INFORMATION
Ceramic Axial
Lead Tape and Reel Packaging
KEMET offers standard reeling of Molded and Conformally
Coated Axial Leaded Ceramic Capacitors for automatic insertion
orlead forming machines per EIA specification RS-296. KEMET’s
internal specification four-digit suffix, 7200, is placed at the end of
the part number to designate tape and reel packaging, ie:
C410C104Z5U5CA7200.
Paper (50 lb.) test minimum is inserted between the layers of
capacitors wound on reels for component pitch 0.400”.
Capacitor lead length may extend only a maximum of .0625”
(1.59mm) beyond the tapes’ edges. Capacitors are centered in a
row between the two tapes and will deviate only ± 0.031
(0.79mm) from the row center. A minimum of 36” (91.5 cm) leader
tape is provided at each end of the reel capacitors. Universal
splicing clips are used to connect the tape. Standard reel
quantities are shown on page 48.
©KEMET Electronics Corporation, P.O. Box 5928, Greenville, S.C. 29606, (864) 963-6300 47
Tape and Reel Packaging
CERAMIC LEADED
PACKAGING INFORMATION
©KEMET Electronics Corporation, P.O. Box 5928, Greenville, S.C. 29606, (864) 963-630048
CERAMIC LEADED
PACKAGING INFORMATION
KEMET
Series
Military
Style
Military
Specification
Standard (1)
Bulk
Quantity
Ammo Pack
Quantity
Maximum
Maximum
Reel
Quantity
Reel
Size
C114C-K-G CK12, CC75 MIL-C-11015/ 200/Box 5000 12"
C124C-K-G CK13, CC76 MIL-PRF-20 200/Box 5000 12"
C192C-K-G CK14, CC77 100/Box 3000 12"
C202C-K CK15 25/Box 500 12"
C222C-K CK16 10/Tray 300 12"
C052C-K-G CK05, CC05 100/Bag 2000 2000 12"
C062C-K-G CK06, CC06 100/Bag 1500 1500 12"
C114G CCR75 MIL-PRF-20 200/Box 5000 12"
C124G CCR76 200/Box 5000 12"
C192G CCR77 100/Box 3000 12"
C202G CC78-CCR78 25/Box 500 12"
C222G CC79-CCR79 10/Tray 300 12"
C052/56G CCR05 100/Bag 1700 12"
C062/66G CCR06 100/Bag 1500 12"
C512G CC07-CCR07 Footnote (2) N/A N/A
C522G CC08-CCR08 Footnote (2) N/A N/A
C114T CKR11 MIL-PRF-39014 200/Box 5000 12"
C124T CKR12 200/Box 5000 12"
C192T CKR14 100/Box 3000 12"
C202T CKR15 25/Box 500 12"
C222T CKR16 10/Tray 300 12"
C052/56T CKR05 100/Bag 1700 12"
C062/66T CKR06 100/Bag 1500 12"
C31X 500/Bag 2500 2500 12"
C32X 500/Bag 2500 2500 12"
C33X 250/Bag 1500 1500 12"
C340 100/Bag 1000 1000 12"
C350 50/Bag N/A 500 12"
C410 300/Box 4000 5000 12"
C412 200/Box 4000 5000 12"
C420 300/Box 4000 5000 12"
C430 200/Box 2000 2500 12"
C440 200/Box 2000 2500 12"
C512 N/A N/A Footnote (2) N/A N/A
C522 N/A N/A Footnote (2) N/A N/A
C617 250/Bag 1000 12"
C622/C623 100/Bag 500 12"
C627/C628 100/Bag 500 12"
C630/C631 100/Bag 500 12"
C637/C638 50/Bag 500 12"
C640/C641 50/Bag 500 12"
C642/C643 50/Bag 500 12"
C647/C648 50/Bag 500 12"
C657/C658 50/Bag 500 12"
C667/C668 50/Bag 500 12"
CERAMIC PACKAGING
NOTE: (1) Standard packaging refers to number of pieces per bag, tray or vial.
(2) Quantity varies. For further details, please consult the factory.