-150
-140
-130
-120
-110
-100
-90
-80
-70
-60
100.0E+0 1.0E+3 10.0E+3 100.0E+3 1.0E+6
PSA3180C
Digital Radio Equipment
Fixed Wireless Access
Satellite Communication Systems
5
35
3157
-70
-108
-12
3
3
-40 to 85
Frequency Range
Harmonic Suppression (2nd, typ.)
Sideband Spurs (typ.)
Switching Speed (typ., adjacent channel)
Startup Lock Time (typ.)
Operating Temperature Range
Package Style PLL-24H
MHz
dBc
dBc
mSec
mSec
°C
Vdc
mA
Supply Voltage (Vcc, nom.)
Supply Current (Icc, typ.)
All specifications are typical unless otherwise noted and subject to change without notice.
PHASE NOISE (1 Hz BW, typical)
© Z-Communications, Inc. All rights reserved
Page 1
PHASE LOCKED LOOP
FEATURES
APPLICATIONS
PERFORMANCE SPECIFICATIONS VALUE UNITS
POWER SUPPLY REQUIREMENTS
APPLICATION NOTES
3157
MHz
• Step Size: 125 KHz
- Style Package
PLL-24H
•
•
•
•
A1
Rev
• AN-107 : How to Solder Z-COMM VCOs / PLLs
• AN-200 : Mounting and Grounding of Z-COMM PLLs
• AN-201 : PLL Fundamentals AN-202 : PLL Functional Description
NOTES:
Reference Oscillator Signal: 5 MHz<fosc<100 MHz Prescaler: 32
Fre
q
uenc
y
S
y
nthesizer: Analo
g
Devices - ADF4106
9939 Via Pasar • San Diego, CA 92126
TEL (858) 621-2700 FAX (858) 621-2722
Power Output 0±3 dBm
Load Impedance 50
Step Size 125 KHz
5000
3190
-
• Frequency Range:
-3190
Ω
Charge Pump Output Current µΑ
Phase Noise @ 10 kHz offset (1 Hz BW, typ.) dBc/Hz
3110
3120
3130
3140
3150
3160
3170
3180
3190
3200
3210
3220
0 0.5 1 1.5 2 2.5 3 3.5 4
-5
-4
-3
-2
-1
0
1
2
3
4
5
3125 3138 3150 3161 3172 3183 3193 3202 3210
LOW COST - HIGH PERFORMANCE
PHASE LOCKED LOOP
© Z-Communications, Inc. Page 2 Printed in the U.S.A.
PSA3180C
VCO POWER CURVE, typ.
PAGE 2
PHYSICAL DIMENSIONS
17
19
15
13
1
2
3
4
810 12
24 22 20
5
6
7
911
14
16
18
21
23
TOP
P1 RF OUTPUT
P2-4 GROUND
P5 REFERENCE OSCILLATOR INPUT
P6 GROUND
P7 CLOCK
P8 DATA
P9 GROUND
P10 LOAD ENABLE
P11 GROUND
P12 LOCK DETECT
P13 VCC
P14 GROUND
P15 GROUND
P16 GROUND
P17 NO CON NECTION
P18-24 GROUND
TABS RANGE:
SEE NOTE 5
(4 PLACES)
DETAIL A
.015
.030
.055
DETAIL B (TYP)
(8 PLACES)
1. The inside radius of a l l 2 4 h a l f ho l e s at t h e p erim eter of
the board are plated to provide a surface for the
attachment of the PLL Module to the PCB. 16 pads are
for grounding, 8 pads are for signal interface.
2. The surface of the shield is tin-plated and may be
soldered to. The shield’s base metal is cold-rolled steel.
3. The ground plane on the bottom side is ground and
attaches to a ground track on t he top side of the board
as well as to the shield.
4. Unless otherwise noted all dimensions are in inches.
5. Unless otherwise noted all tolerances are as f ollows:
.xxx = ± .010.
SEE DETAIL A
SEE DETAIL B
PIN 1
BOTTOM
.000
.153
.238
.323
.408
.493
.578
.663
-.025
.841
.000
.115
.200
.285
.370
.455
.580
-.026
.605
.816
0.220
.032
SIDE VIEW
°c
25
VCO TUNING CURVE, typ.
FREQUENCY (MHz)
TUNING VOLTAGE (Vdc)
°c
25 °c
85
°c
-40
FREQUENCY (MHz)
OUTPUT POWER (dBm)
