© 2011 Microchip Technology Inc. DS22257B-page 1
MCP6441/2/4
Features:
• Low Quiescent Current: 450 nA (typical)
• Gain Bandwidth Product: 9 kHz (typical)
• Supply Voltage Range: 1.4V to 6.0V
• Rail-to-Rail Input and Output
• Unity Gain Stable
• Slew Rate: 3V/ms (typical)
• Extended Temperature Range: -40°C to +125°C
• No Phase Reve rsal
• Small Packages
Applications:
• Port ab le Equi pm ent
• Battery Powered System
• Data Acquisition Equipment
• Sensor C onditioning
• Battery Current Sensing
• Analog Active Filters
Design Aids:
• SPICE Ma cr o Models
•FilterLab
® Software
• Microchip Advanced Part Selector (MAPS)
• Analog Demonstration and Evaluation Boards
• Application Notes
Description:
The MCP6441/2/4 device is a single nanopower
operational amplifier (op amp), which has low
quiescent current (450 nA, typical) and rail-to-rail input
and output operation. This op amp is unity gain stable
and has a gain bandwidth product of 9 kHz (typical).
These devices operate with a single supply voltage as
low as 1.4V. These features make the family of op
amps well suited for single-supply, battery-powered
applications.
The MC P6441/2/4 op amp is designed with Mic rochip’ s
advanced CMOS process and offered in single
(MCP6441), dual (MCP6442), and quad (MCP6444)
configurations. All devices are available in the
extended temperature range, with a power supply
range of 1.4V to 6.0V.
Typical Application
Package Types
V
DD
I
DD
100 k
Ω
1M
Ω
1.4V V
OUT
Battery Current Sensing
10
Ω
to
6.0V
IDD
VDD VOUT
–
10 V/V()10
Ω
()
⋅
------------------------------------------=
To load
MCP6441
5
4
1
2
3
VDD
VIN–
VIN+
VSS
VOUT
SC70-5, SOT-23-5
MCP6441
5
1
2
3
VDD
VIN–
VIN+
VSS
VOUTA
SOIC, MSOP SOIC, TSSOP
MCP6442 MCP6444
8
7
6VOUTB
4VINB+
VINA–
5
1
2
3
VDD
VIND+
VIN+VSS
VOUTA
8
7
6VOUTC
4
VINB+
VINA–
9
10
14
12
11
13
VINB–
VOUTB VINC–
VINC+
VIND–
VOUTD
450 nA, 9 kHz Op Amp
MCP6441/2/4
DS22257B-page 2 © 2011 Microchip Technology Inc.
NOTES:
© 2011 Microchip Technology Inc. DS22257B-page 3
MCP6441/2/4
1.0 ELECTRICAL CHARACTERISTICS
1.1 Absolute Maximum Ratings †
VDD – VSS ........................................................................7.0V
Current at Input Pins.....................................................±2 mA
Analog Inputs (VIN+, VIN-)†† .......... VSS – 1.0V to VDD + 1.0V
All Other Inputs and Outputs ......... VSS – 0.3V to VDD + 0.3V
Difference Input Voltage ...................................... |VDD – VSS|
Output Sh o rt-Circuit Cu r ren t ................................Continuous
Current at Output and Supply Pins ............................ ±30 mA
Storage Temperature ............ .... .. .. ....... .... .. .. .-65°C to +150°C
Maximum Junction Temperature (TJ)..........................+150°C
ESD Protection on All Pins (HBM; MM)............... ≥ 4 kV; 200V
† Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of
the device at those or any other conditions above those
indicated in the operational listings of this specification is not
implied. Exposure to maximum rating conditions for extended
periods may affect device reliability.
†† See Section 4.1.2 “Input Voltage Limits”.
DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherw ise indic at ed, VDD = +1.4V to +6 .0V, VSS= GND, TA= +2 5°C, VCM = VDD/2,
VOUT ≈VDD/2, VL = VDD/2 and RL = 1 MΩ to VL. (Refer to Figure 1-1).
Parameters Sym Min Typ Max Units Conditions
Input Offset
Input Offset Voltage VOS -4.5 — +4.5 mV VCM = VSS
Input Offset Drift with Temperature ΔVOS/ΔTA—±2.5—µV/°CT
A= -40°C to +125°C,
VCM = VSS
Power Supply Rejection Ratio PSRR 65 86 — dB VCM = VSS
Input Bias Current and Impedance
Input Bias Current IB—±1—pA
—20—pAT
A = +85°C
—400—pAT
A = +125°C
Input Offset Current IOS —±1—pA
Common Mode Input Impedance ZCM —10
13||6 — Ω||pF
Differential Input Impedance ZDIFF —10
13||6 — Ω||pF
Common Mode
Common Mode Input Voltage Range VCMR VSS-0.3 — VDD+0.3 V
Common Mode Rejection Ratio CMRR 60 76 — dB VCM = -0.3V to 6.3V,
VDD = 6.0V
Open-Loop Gain
DC Open-Loop Gain
(Large Signal) AOL 90 110 — dB VOUT = 0.1V to VDD-0.1V
RL = 10 kΩ to VL
Output
Maximum Outp ut Voltage Swi ng VOL, VOH VSS+20 — VDD–20 mV VDD = 6.0V, RL = 10 kΩ
0.5V input overdrive
Output Short -Circ uit Curren t ISC —±3—mAV
DD = 1.4V
—±22—mAV
DD = 6.0V
Power Supply
Supply Voltage VDD 1.4 — 6.0 V
Quies cen t Curr ent per Amp lif ier IQ250 450 650 nA IO = 0, VDD = 5.0V
MCP6441/2/4
DS22257B-page 4 © 2011 Microchip Technology Inc.
1.2 Test Circuits
The circuit used for most DC and AC tests is shown in
Figure 1-1. This circuit can independently set VCM and
VOUT (see Equation 1-1). Note that V
CM is not the
circuit ’s Comm on Mode volt age ((VP+V
M)/2), and that
VOST includes VOS plus t h e e ffects ( on t he i n pu t o ffset
error, VOST) of the temperature, CMRR, PSRR and
AOL.
EQUATION 1-1:
FIGURE 1-1: AC and DC Test Circuit for
Most Spe cific ations.
AC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +1.4V to +6.0V, VSS = GND,
VCM = VDD/2, VOUT ≈VDD/2, VL = VDD/2 , RL = 1 MΩ to VL and CL = 60 pF. (Refer to Figure 1-1).
Parameters Sym Min Typ Max Units Conditions
AC Response
Gain Bandwidth Product GBWP — 9 — kHz
Phase Margin PM — 65 — ° G = +1 V/V
Slew Rate SR — 3 — V/ms
Noise
Input Noise Voltage Eni — 5 — µVp-p f = 0.1 Hz to 10 Hz
Input Noise Voltage Density eni —190—nV/√Hz f = 1 kHz
Input Noise Current Density ini —0.6—fA/√Hz f = 1 kHz
TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, VDD = +1.4V to +6.0V and VSS = GND.
Parameters Sym Min Typ Max Units Conditions
Temperature Ranges
Operati ng Tempe ratu r e Range TA-40 — +125 °C Note 1
Storage Temperature Range TA-65 — +150 °C
Thermal Package Resistances
Thermal Resistance, 5L-SC70 θJA — 331 — °C/W
Thermal Resistance, 5L-SOT-23 θJA —220.7—°C/W
Thermal Resistance, 8L-SOIC θJA —149.5—°C/W
Thermal Resistance, 8L-MSOP θJA —20—°C/W
Thermal Resistance, 14L-SOIC θJA —95.3—°C/W
Thermal Resistance, 14L-TSSOP θJA — 100 — °C/W
Note 1: The internal junction temperature (TJ) must not exceed the absolute maximum specification of +150°C.
GDM RFRG
⁄
=
VCM VPVDD 2
⁄
+()2
⁄
=
VOUT VDD 2
⁄
()VPVM
–()VOST 1G
DM
+()++=
Where:
GDM = Differential Mode Gain (V/V)
VCM = Op Amp’s Common Mode
Input Voltage (V)
VOST = Op Amp’s Total Input Offset
Voltage (mV)
VOST VIN– VIN+
–=
VDD
RGRF
VOUT
VM
CB2
CL
RL
VL
CB1
100 kΩ
100 kΩ
RGRF
VDD/2
VP100 kΩ
100 kΩ
60 pF
1MΩ
1µF100 nF
VIN–
VIN+
CF
6.8 pF
CF
6.8 pF
MCP6441
© 2011 Microchip Technology Inc. DS22257B-page 5
MCP6441/2/4
2.0 TYPICAL PERFORMANCE CURVES
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.4V to +6.0V, VSS = GND, VCM = VDD/2 , VOUT ≈VDD/2,
VL = VDD/2, RL = 1 MΩ to VL and CL = 60 pF.
FIGURE 2-1: Input Offset Voltage.
FIGURE 2-2: Input Offset Voltage Drift.
FIGURE 2-3: Input Offset Voltage vs.
Common Mode Input Voltage with VDD = 6.0V.
FIGURE 2-4: Input Offset Voltage vs.
Common Mode Input Voltage with VDD = 1.4V.
FIGURE 2-5: Input Offset Voltage vs.
Output Voltage.
FIGURE 2-6: Input Offset Voltage vs.
Power Supply Voltage.
Note: The g r ap hs and t ables prov ided follow i ng thi s n ote are a st a tis tic al s umm ar y based on a limite d n um ber of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
0%
5%
10%
15%
20%
25%
30%
35%
-4.5
-3.5
-2.5
-1.5
-0.5
0.5
1.5
2.5
3.5
4.5
Input Offset Voltage (mV)
Percentage of Occurences
1700 Samples
VCM = VSS
0%
5%
10%
15%
20%
25%
30%
-10
-8
-6
-4
-2
0
2
4
6
8
10
Input Offset Voltage Drift (µV/°C)
Percentage of Occurences
1700 Samples
VCM = VSS
TA = -40°C to +125°C
-500
0
500
1000
1500
2000
2500
3000
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
Common Mode Input Voltage (V)
Input Offset Voltage (µV)
VDD = 6.0V
Representative Part
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
-500
0
500
1000
1500
2000
2500
3000
3500
4000
-0.3
-0.1
0.1
0.3
0.5
0.7
0.9
1.1
1.3
1.5
1.7
Common mode input voltage (V)
Input Offset Voltage (µV)
VDD = 1.4V
Representative Part
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
-1000
-800
-600
-400
-200
0
200
400
600
800
1000
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Output Voltage (V)
Input Offset Voltage (µV)
VDD = 6.0V
VDD = 1.4V
Representative Part
-2000
-1600
-1200
-800
-400
0
400
800
1200
1600
2000
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
Power Supply Voltage (V)
Input Offset Voltage (µV)
Representative Part
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
MCP6441/2/4
DS22257B-page 6 © 2011 Microchip Technology Inc.
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.4V to +6.0V, VSS = GND, VCM = VDD/2 , VOUT ≈VDD/2,
VL = VDD/2, RL = 1 MΩ to VL and CL = 60 pF.
FIGURE 2-7: Input Noise Voltage Density
vs. Frequency.
FIGURE 2-8: Input Noise Voltage Density
vs. Common Mode Input Voltage.
FIGURE 2-9: CMRR, PSRR vs.
Frequency.
FIGURE 2-10: CMRR, PSRR vs. Ambient
Temperature.
FIGURE 2-11: Input Bias, Offset Current
vs. Ambient Temperature.
FIGURE 2-12: Input Bias Current vs.
Common Mode Input Voltage.
100
1,000
0.1 1 10 100 1000 10000
Frequency (Hz)
Input Noise Voltage Density
(nV/Hz)
0.1 1 10 100 1k 10k
0
50
100
150
200
250
300
350
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
Common Mode Input Voltage (V)
Input Noise Voltage Density
(nV/Hz)
f = 1 kHz
VDD = 6.0 V
20
30
40
50
60
70
80
90
100
0.1 1 10 100 1000
Frequency (Hz)
CMRR, PSRR (dB)
CMRR
PSRR-
PSRR+
c
Representative Part
50
55
60
65
70
75
80
85
90
95
100
-50 -25 0 25 50 75 100 125
Ambient Temperature (°C)
CMRR,PSRR (dB)
PSRR (VDD = 1.4V to 6.0V, VCM = VSS)
CMRR (VDD = 6.0V, VCM = -0.3V to 6.3V)
CMRR (VDD = 1.4V, VCM = -0.3V to 1.7V)
1
10
100
1000
25 45 65 85 105 125
Ambient Temperature (°C)
Input Bias and Offset Currents
(pA)
Input Bias Current
VDD = 6.0V
Input Offset Current
1
10
100
1000
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Common Mode Input Voltage (V)
Input Bias Current (pA)
VDD = 6.0V
TA = +125°C
TA = +85°C
© 2011 Microchip Technology Inc. DS22257B-page 7
MCP6441/2/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.4V to +6.0V, VSS = GND, VCM = VDD/2 , VOUT ≈VDD/2,
VL = VDD/2, RL = 1 MΩ to VL and CL = 60 pF.
FIGURE 2-13: Quiescent Current vs.
Ambient Temperature.
FIGURE 2-14: Quiescent Current vs.
Power Supply Voltage.
FIGURE 2-15: Open-Loop Gain, Phase vs.
Frequency.
FIGURE 2-16: DC Open-Loop Gain vs.
Power Supply Voltage.
FIGURE 2-17: DC Open-Loop Gain vs.
Output Voltage Headroom.
FIGURE 2-18: Gain Bandwidth Product,
Phase Margin vs. Ambient Temperature.
200
250
300
350
400
450
500
550
600
-50 -25 0 25 50 75 100 125
Ambient Temperature (°C)
Quiescent Current
(nA/Amplifier)
V
DD = 6.0V
VDD = 1.4V
0
100
200
300
400
500
600
700
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
7.0
Power Supply Voltage (V)
Quiescent Current
(nA/Amplifier)
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
-20
0
20
40
60
80
100
120
1.0E-03 1.0E-02 1.0E-01 1.0E+00 1.0E+01 1.0E+02 1.0E+03 1.0E+04 1.0E+05
Frequency (Hz)
Open-Loop Gain (dB)
-210
-180
-150
-120
-90
-60
-30
0
Open-Loop Phase (°)
Open-Loop Gain
Open-Loop Phase
VDD = 6.0V
1m 10m 0.1 1 10 100 1k 10k 100k
60
70
80
90
100
110
120
130
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Power Supply Voltage (V)
DC Open-Loop Gain (dB)
RL = 10 kΩ
VSS + 0.1V < VOUT < VDD - 0.1V
60
70
80
90
100
110
120
130
0.00 0.05 0.10 0.15 0.20 0.25
Output Voltage Headroom (V)
DC Open-Loop Gain (dB)
RL = 10k
Large Signal AOL
VDD = 6.0V
VDD = 1.4V
Ω
0
2
4
6
8
10
12
14
16
18
-50 -25 0 25 50 75 100 125
Ambient Temperature (°C)
Gain Bandwidth Product
(kHz)
0
10
20
30
40
50
60
70
80
90
Phase Margin (°)
Gain Bandwidth Product
Phase Margin
VDD = 6.0V
MCP6441/2/4
DS22257B-page 8 © 2011 Microchip Technology Inc.
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.4V to +6.0V, VSS = GND, VCM = VDD/2 , VOUT ≈VDD/2,
VL = VDD/2, RL = 1 MΩ to VL and CL = 60 pF.
FIGURE 2-19: Gain Bandwidth Product,
Phase Margin vs. Ambient Temperature.
FIGURE 2-20: Output Short Circuit Current
vs. Power Supply Voltage.
FIGURE 2-21: Output Voltage Swing vs.
Frequency.
FIGURE 2-22: Output Voltage Headroom
vs. Output Current.
FIGURE 2-23: Output Voltage Headroom
vs. Ambient Temperature.
FIGURE 2-24: Slew Rate vs. Ambien t
Temperature.
0
2
4
6
8
10
12
14
16
18
-50 -25 0 25 50 75 100 125
Ambient Temperature (°C)
Gain Bandwidth Product
(kHz)
0
10
20
30
40
50
60
70
80
90
Phase Margin (°)
Gain Bandwidth Product
Phase Margin
VDD = 1.4V
0
5
10
15
20
25
30
35
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Power Supply Voltage (V)
Output Short Circuit Current
(mA)
TA = -40°C
TA = +25°C
TA = +85°C
TA = +125°C
0.1
1
10
10 100 1000 10000
Frequency (Hz)
Output Voltage Swing (VP-P)
VDD = 1.4V
VDD = 6.0V
10 100 1k 10k
0.1
1
10
100
1000
10 100 1000 10000
Output Current (mA)
Output Voltage Headroom (mV)
VDD - VOH @ VDD = 1.4V
VOL - VSS @ VDD = 1.4V
VDD - VOH @ VDD = 6.0V
VOL - VSS @ VDD = 6.0V
RL = 10 kΩ
0.01 0.1 1 10
0
5
10
15
20
25
-50 -25 0 25 50 75 100 125
Ambient Temperature (°C)
Output Voltage Headroom
VDD - VOH or VOL - VSS (mV)
VDD - VOH @ VDD = 1.4V
VOL - VSS @ VDD = 1.4V
VDD - VOH @ VDD = 6.0V
VOL - VSS @ VDD = 6.0V
0
1
2
3
4
5
6
-50 -25 0 25 50 75 100 125
Ambient Temperature (°C)
Slew Rate (V/ms)
Falling Edge, VDD = 6.0V
Rising Edge, VDD = 6.0V
Falling Edge, VDD = 1.4V
Rising Edge, VDD = 1.4V
© 2011 Microchip Technology Inc. DS22257B-page 9
MCP6441/2/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.4V to +6.0V, VSS = GND, VCM = VDD/2 , VOUT ≈VDD/2,
VL = VDD/2, RL = 1 MΩ to VL and CL = 60 pF.
FIGURE 2-25: Small Signal Non-Inverting
Pulse Response.
FIGURE 2-26: Small Signal Inverting Pulse
Response.
FIGURE 2-27: Large Signal Non-Inverting
Pulse Response.
FIGURE 2-28: Large Signal Inverting Pulse
Response.
FIGURE 2-29: The MCP6441/2/4 Device
Shows No Phase Reversal.
FIGURE 2-30: Closed Loop Output
Impedance vs. Frequency.
Time (200 µs/div)
Output Voltage (20 mv/div)
VDD = 6.0V
G = +1 V/V
Time (200 µs/div)
Output Voltage (20 mv/div)
VDD = 6.0V
G = -1 V/V
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Time (2 ms/div)
Output Voltage (V)
VDD = 6.0V
G = +1 V/V
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Time (2 ms/div)
Output Voltage (V)
VDD = 6.0V
G = -1 V/V
-1.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
Time (2 ms/div)
Input,Output Voltage (V)
VDD = 6.0V
G = +2 V/V
VOUT
VIN
1
10
100
1000
10000
100000
1000000
1 10 100 1000 10000
Frequency (Hz)
Closed Loop Output
Impedance (Ω)
1 10 100 1k 10k
1
10
100
1k
10k
100k
1M
GN:
101 V/V
11 V/V
1 V/V
MCP6441/2/4
DS22257B-page 10 © 2011 Microchip Technology Inc.
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.4V to +6.0V, VSS = GND, VCM = VDD/2 , VOUT ≈VDD/2,
VL = VDD/2, RL = 1 MΩ to VL and CL = 60 pF.
FIGURE 2-31: Measured Input Current vs.
Input Voltage (below VSS). FIGURE 2-32: Channel-to-Channel
Separation vs. Frequency (MCP6442/4 only).
1.E-12
1.E-11
1.E-10
1.E-09
1.E-08
1.E-07
1.E-06
1.E-05
1.E-04
1.E-03
-1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0
Input Voltage (V)
-IIN (A)
1m
100
µ
10µ
1µ
100n
10n
1n
100
p
10p
1p
TA = -40°C
TA = +25°C
TA = +85°C
TA = +125°C
60
70
80
90
100
110
120
130
140
150
100 1000 10000
C
h
a
n
n
e
l
t
o
C
h
a
n
n
e
l
S
e
p
a
r
a
t
i
o
n
(
d
B
)
Frequency (Hz)
1
00
1k
Input Referred
Channel to Channel Separation
(dB)
1k
100 10k
© 2011 Microchip Technology Inc. DS22257B-page 11
MCP6441/2/4
3.0 PIN DESCRIPTIONS
Descrip tions of the pins are listed in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLE
3.1 Analog Output (VOUT)
The output pin is a low-impedance voltage source.
3.2 Power Supply Pins (VDD, VSS)
The pos iti ve po we r s upp ly (VDD) is 1. 4V to 6. 0V h igh er
than the negative power supply (VSS). For normal
operation, the other pins are at voltages between VSS
and VDD.
Typically, these parts are used in a single (positive)
supply configuration. In this case, VSS is connected to
ground and VDD is connected to the supply. VDD will
need bypass capacitors.
3.3 Analog Inputs (VIN+, VIN-)
The non-inverting and inverting inputs are high-
impedance CMOS inputs with low bias currents.
MCP6441 MCP6442 MCP6444 Symbol Description
SC70-5, SOT-23-5 SOIC, MSOP SOIC, TSSOP
111V
OUT, VOUTA Analog Output (op amp A)
422V
IN–, VINA– Inverting Input (op amp A)
333V
IN+, VINA+ Non-inverting Input (op amp A)
584V
DD Positive Power Supply
—55V
INB+ Non-inverting Input (op amp B)
—66V
INB- Inverting Input (op amp B)
—77V
OUTB Analog Output (op amp B)
——8V
OUTC Analog Output (op amp C)
——9V
INC- Inverting Input (op amp C)
——10V
INC+ Non-inverting Input (op amp C)
2411V
SS Negative Power Supply
——12V
IND+ Non-inverting Input (op amp D)
——13V
IND- Inverting Input (op amp D)
——14V
OUTD Analog Output (op amp D)
MCP6441/2/4
DS22257B-page 12 © 2011 Microchip Technology Inc.
NOTES:
© 2011 Microchip Technology Inc. DS22257B-page 13
MCP6441/2/4
4.0 APPLICATION INFORMATION
The MCP6441/2/4 op amp is manufactured using
Microc hip’s s tate-of-the -art CMOS proce ss, specifica lly
designed for low power applications.
4.1 Rail-to-Rail Input
4.1.1 PHASE REVERSAL
The MCP6441/2/4 op amp is designed to prevent
phase reversal, when the input pins exceed the supply
voltages. Figure 2-29 shows the input voltage
exceeding the supply voltage with no phase reversal.
4.1.2 INPUT VOLTAGE LIMITS
In order to prevent damage and/or improper operation
of the am plifie r, the circuit m ust li mit the volt a ges at th e
input pins (see Section 1.1 “Absolute Maximum
Ratings †”).
The Electrostatic Discharge (ESD) protection on the
inputs can be depicted as shown in Figure 4-1. This
structure was chosen to protect the input transistors
against many, but not all, over-voltage conditions, and
to minimize the input bias current (IB).
FIGURE 4-1: Simplified Analog Input ESD
Structures.
The input ESD diodes clamp the inputs when they try
to go more than one diode drop below VSS. They also
clamp any voltages that go well above VDD; their
breakdown voltage is high enough to allow normal
operation, but not low enough to protect against slow
over-voltage (beyond VDD) events. Very fast ESD
events that meet the spec are limited so that damage
does not occur.
In some applications, it may be necessary to prevent
excessive voltages from reaching the op amp inputs;
Figure 4-2 shows one approach to protecting these
inputs.
FIGURE 4-2: Protecting the Analog
Inputs.
A significant amount of current can flow out of the
input s when t he Common M ode volt age (VCM) is below
ground (VSS); see Figure 2-31.
4.1.3 INPUT CURRENT LIMITS
In order to prevent damage and/or improper operation
of the amplifier, the circuit must limit the currents into
the input pins (see Section 1.1 “Absolute Maximum
Ratings †”).
Figure 4-3 shows one approach to protecting these
inputs. The resistors R1 and R2 limit the possible
current s in or out of the input pin s (and the ESD dio des,
D1 and D2). The diode currents will go through either
VDD or VSS.
FIGURE 4-3: Protecting the Analog
Inputs.
Bond
Pad
Bond
Pad
Bond
Pad
VDD
VIN+
VSS
Input
Stage Bond
Pad VIN–
V1
VDD
D1
V2
D2
MCP644X
VOUT
V1R1
VDD
D1
min(R1,R2)> VSS –min(V
1, V2)
2mA
V2R2
D2
MCP644X
VOUT
min(R1,R2)> max(V1,V2)–V
DD
2mA
MCP6441/2/4
DS22257B-page 14 © 2011 Microchip Technology Inc.
4.1.4 NORMAL OPERATION
The input stage of the MCP6441/2/4 op amp uses two
differential input stages in parallel. One operates at a
low Com mon Mode inpu t voltage (VCM), while the other
operates at a high VCM. With this topology, the device
operates with a VCM up to 300 mV above VDD and
300 mV below VSS. The input offset voltage is
measured at VCM =V
SS – 0.3V and VDD + 0.3V, to
ensure proper operation.
The transition between the input stages occurs when
VCM is near VDD –0.6V (see Figures 2-3 and 2-4). For
the best distortion performance and gain linearity, with
non-inverting gains, avoid this region of operation.
4.2 Rail-to-Rail Output
The output voltage range of the MCP6441/2/4 op amp
is VSS + 20 mV (minimum) and VDD – 20 mV (maxi-
mum) when RL=10kΩ is connected to VDD/2 and
VDD = 6.0V. Refer to Figures 2-22 and 2-23 for more
information.
4.3 Capacitive Loads
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases, and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response. While a unity-gain buffer (G = +1 V/V) is the
most sensitive to the capacitive loads, all gains show
the same general behavior.
When driving large capacitive loads with the
MCP6441/2/4 op amp (e.g., > 100 pF when
G = +1 V/V ), a small series resistor at the output (RISO
in Figure 4-4) improves the fe edback loop’s phase mar-
gin (stability) by making the output load resistive at
higher frequencies. The bandwidth will be generally
lower than the bandwidth with no capacitance load.
FIGURE 4-4: Output Resistor, RISO
Stabilizes Large Capacitive Loads.
Figure 4-5 gives th e rec om mende d RISO valu es for the
different capacitive loads and gains. The x-axis is the
normalized load capacitance (CL/GN), where GN is the
circuit 's noise gain. For non-inverti ng gains, GN an d the
Signal Gain are equal. For inverting gains, GN is
1+|Signal Gain| (e.g., -1 V/V gives GN = +2 V/V).
FIGURE 4-5: Recommended RISO Values
for Capacitive Loads.
After selecting RISO for your circuit, double-check the
resulting frequency response peaking and step
response overshoot. Modify RISO’s value until the
response is reasonable. Bench evaluation and
simulations with the MCP6441/2/4 SPICE macro
model are very helpful.
4.4 Supply Bypass
The MCP6 441 /2/ 4 op am p’s power s upp ly pin (VDD for
single-supply) should have a local bypass capacitor
(i.e., 0.01 µF to 0.1 µF) within 2 mm for good high
frequency performance. It can use a bulk capacitor
(i.e., 1 µF or larger) within 100 mm to provide large,
slow currents. This bulk capacitor can be shared with
other analog part s .
4.5 PCB Surface Leakage
In applications where low input bias current is critical,
Printed Circuit Board (PCB) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
betwee n nearby traces i s 1012Ω. A 5V dif ference would
cause 5 pA of current to flow, which is greater than the
MCP6441/2/4 op amp’s bias current at +25°C (±1 pA,
typical).
VIN
RISO VOUT
CL
–
+
MCP644X
1000
10000
100000
1000000
1.E-11 1.E-10 1.E-09 1.E-08 1.E-07 1.E-06
Normalized Load Capacitance; CL/GN (F)
Recommended RISO (Ω)
GN:
1 V/V
2 V/V
≥ 5 V/V
10p 100p 1n 10n 0.1µ 1µ
1k
10k
100k
1M
© 2011 Microchip Technology Inc. DS22257B-page 15
MCP6441/2/4
The easiest way to reduce surface leakage is to use a
guard ring around se nsi tiv e p ins (or t rac es). The gua rd
ring is biased at the same voltage as the sensitive pin.
An example of this type of layout is shown in
Figure 4-6.
FIGURE 4-6: Example Guard Ring Layout
for Inverting Gain.
1. Non-inverting Gain and Unity-Gain Buffer:
a) Connect the non-inverting pin (VIN+) to the
input with a wire that does not touch the
PCB surface.
b) Connect the guard ring to the inverting input
pin (VIN–). This b iases th e g uard ri ng to the
Common Mode input voltage.
2. Inverting Gain and Transimpedance Gain
Amplifiers (convert current to voltage, such as
photo detectors):
a) Connect the guard ring to the non-inverting
input pin (VIN+). This biases the guard ring
to the same reference voltage as the op
amp (e.g., VDD/2 or ground).
b) Connect the inverting pin (VIN–) to the inp ut
with a wire that does not touch the PCB
surface.
4.6 Application Circuits
4.6.1 BATTERY CURRENT SENSING
The MCP6441/2/4 op amp’s Common Mode Input
Range, which goes 0.3V beyond both supply rails,
supports their use in high-side and low-side battery
current sensing applications. The low quiescent current
(450 nA, typical) helps prolong battery life, and the
rail-to-rail output supports detection of low currents.
Figure 4-7 shows a high side battery current sensor
circuit. The 10Ω resistor is sized to minimize power
losses. The battery current (IDD) through the 10Ω
resistor causes its top terminal to be more negative
than the bottom terminal. This keeps the Common
Mode input voltage of the op amp below VDD, w hic h is
with in i ts al lowe d r ange. Th e ou tput of t he op am p wi ll
also be below VDD, within its Maxim um O utp ut Voltage
Swing specification.
FIGURE 4-7: Battery Current Sensing.
Guard Ring VIN–V
IN+ VSS
VDD
IDD
100 kΩ
1MΩ
1.4V VOUT
10Ω
to
6.0V
IDD VDD VOUT
–
10 V/V()10
Ω
()
⋅
------------------------------------------=
To load
MCP6441
MCP6441/2/4
DS22257B-page 16 © 2011 Microchip Technology Inc.
4.6.2 PRECISION HALF-WAVE
RECTIFIER
The precision half-wave rectifier, which is also known
as a super diode, is a configuration obtained with an
operatio nal amplif ier in o rder to have a circuit beha vin g
like an ideal diod e and rectifier . It ef fectively cancels the
forward volt age drop of th e diode in such way th at very
low level signals can still be rectified, with minimal
error. This can be useful for high-precision signal
processing. The MCP6441/2/4 op amp has high input
impedance, low input bias current and rail-to-rail
input/output, which makes this device suitable for
precision rectifier applications.
Figure 4-8 shows a pre ci sio n ha lf-w a ve rect ifi er an d its
transfer characteristic. The rectifier’s input impedance
is determined by the input resistor R1. To avoid the
loading effect, it must be driven from a low-impedance
source.
When VIN is greater than zero, D1 is OFF , D2 is ON, and
VOUT is zero. When VIN is less than zero, D1 is ON, D2
is OFF, and VOUT is the VIN with an amplification of
-R2/R1.
The rectifi er ci rcuit sho wn in Figure 4-8 has the benef it
that the op amp never goes in saturation, so the only
thing affecting its frequency response is the
amplification and the gain bandwidth product.
FIGURE 4-8: Precision Half-Wave
Rectifier.
4.6.3 INSTRUMENTATION AMPLIF IER
The MCP6441/2/4 op amp is well suited for condition-
ing sensor signals in battery-powered applications.
Figure 4-9 shows a two op amp instrumentation
amplifier, using the MCP6441/2/4 device, that works
well for applications requiring rejection of Common
Mode noise at higher gains. The reference voltage
(VREF) is supplied by a low-impedance source. In sin-
gle supply applications, VREF is typically VDD/2.
FIGURE 4-9: Two Op Amp
Instrumentation Amplifier.
VOUT
R2
D1
D2
R1
VIN
VOUT
VIN
-R2/R1
Transfer Characteristic
Precision Half-Wave Rectifier
MCP6441
VOUT V1V2
–()1R1
R2
------2R1
RG
---------++
⎝⎠
⎛⎞
VREF
+=
VREF R1R2R2R1VOUT
RG
V2
V1
1/2 MCP6442 1/2 MCP6442
© 2011 Microchip Technology Inc. DS22257B-page 17
MCP6441/2/4
5.0 DESIGN AIDS
Microchip provides the basic design tools needed for
the MCP6441/2/4 op amp.
5.1 SPICE Macro Model
The latest SPICE macro model for the MCP6441/2/4
op amp is available on the Microchip web site at
www.microchip.com. The model was wr itten and teste d
in the official OrCAD (Cadence®) owned PSpice®. For
the other simulators, translation may be required.
The model covers a wide aspect of the op amp's
electric al speci fication s. Not onl y does the mod el cover
voltage, current and resistance of the op amp, but it
also covers the temperature and the noise effects on
the behavior of the op amp. The model has not been
verified outside of the specification range listed in the
op amp data sheet. The model behaviors under these
conditions cannot ensure it will match the actual op
amp performance.
Moreover, the model is intended to be an initial design
tool. Bench testing is a very important part of any
design and cannot be replaced with simulations. Also,
simulation results using this macro model need to be
validated by comparing them to the data sheet
specifications and characteristic curves.
5.2 FilterLab® Software
Microchip’s FilterLab software is an innova tive software
tool that simplifies analog active filter design using op
amp s. Availab le at no cost from the Mic roc hip we b si te
at www.microchip.com/filterlab, the FilterLab design
tool prov ides f ull sche matic diagra ms of th e filte r circu it
with component values. It also outputs the filter circuit
in SPICE format, which can be used with the macro
model to simulate the actual filter performance.
5.3 Microchip Advanced Part Selector
(MAPS)
MAPS is a software tool that helps semiconductor
professionals efficiently identify the Microchip devices
that f i t a part ic u la r d es ig n r e qu i rem en t . Ava ila bl e at no
cost from the Microchip website at
www.microchip.com/maps, the MAPS is an overall
selection tool for Microchip’s product portfolio that
includes Analog, Memory, MCUs and DSCs. Using this
tool, you can define a filter to sort features for a
parametric search of devices and export side-by-side
technical comparison reports. Helpful links are also
provided for Data Sheets, Purchase and Sampling of
Microchi p parts.
5.4 Analog Demonstration and
Evaluation Boards
Microchip offers a broad spectrum of Analog
Demonstration and Evaluation Boards that are
designe d to h elp you a chieve f aster tim e to market. F or
a complete listing of these boards and their
correspo nding user’s guides and tech nical info rmatio n,
visit the Microchip web site at
www.microchip.com/analogtools.
Some boards that are especially useful are:
• MCP6XXX Amplifier Evaluation Board 1
• MCP6XXX Amplifier Evaluation Board 2
• MCP6XXX Amplifier Evaluation Board 3
• MCP6XXX Amplifier Evaluation Board 4
• Active Filter Demo Board Kit
• 5/6-Pin SOT-23 Evaluation Board, P/N VSUPEV2
MCP6441/2/4
DS22257B-page 18 © 2011 Microchip Technology Inc.
5.5 Application Notes
The following Microchip Analog Design Note and
Application Notes are available on the Microchip web
site at www.microchip.com/appnotes, and are
recommended as supplemental reference resources.
•ADN003 – “Se lect th e Right Opera tional Ampl ifier
for your Filtering Circuits”, DS21821
•AN722 – “Operational Amplifier Topologies and
DC Specifications”, DS00722
•AN723 – “Operationa l Amplifi er AC Speci fications
and Applications”, DS00723
•AN884 – “Driving Capacitive Loads With Op
Amps”, DS00884
•AN990 – “Analog Sensor Conditioning Circuits –
An Overview”, DS00990
•AN1177 – “Op Am p Precision Des ign: DC Errors”,
DS01177
•AN1228 – “Op Amp Precision Design: Random
Noise”, DS01228
• AN1297 – “Microchip’s Op Amp SPICE Macro
Models”, DS01297
• AN1332: “Current Sensing Circuit Concepts and
Fundamentals”’ DS01332
These application notes and others are listed in the
design guide:
•“Signal Chain Design Guide”, DS 218 25
© 2011 Microchip Technology Inc. DS22257B-page 19
MCP6441/2/4
6.0 PACKAGING INFORMATION
6.1 Package Marking Information
Example:
Legend: XX...X Customer-specific information
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
Note: In the event the full Microchip part number cannot be marked on one line, it
will be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
3
e
3
e
Example:
5-Lead SOT-23 (MCP6441)
XXNN DG25
XXNN WU25
5-Lead SC70 (MCP6441)
8-Lead MSOP (MCP6442) Example:
XXXXXX
YWWNNN
6442E
432256
8-Lead SOIC (150 mil) (MCP6442) Example:
XXXXXXXX
XXXXYYWW
NNN
MCP6442E
SN^^0746
256
3
e
MCP6441/2/4
DS22257B-page 20 © 2011 Microchip Technology Inc.
6.2 Package Types
Legend: XX...X Customer-specifi c info rma tio n
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
Note: I n the event the full Mic rochi p part number c annot be marked on on e line, it will
be carried over to the next line, thus limiting the number of available
characte rs for cus tomer-specif ic information.
3
e
3
e
14-Lead TSSOP (MCP6444)Example:
14-Lead SOIC (150 mil) (MCP6444)Example:
XXXXXXXXXX
YYWWNNN
XXXXXX
YYWW
NNN
XXXXXXXXXX MCP6444
0746256
6444E/ST
0432
256
E/SL^^
3
e
© 2011 Microchip Technology Inc. DS22257B-page 21
MCP6441/2/4
D
b
1
23
E1
E
45
ee
c
L
A1
AA2
MCP6441/2/4
DS22257B-page 22 © 2011 Microchip Technology Inc.
5-Lead Plastic Small Outline Transistor (LT) [SC70]
© 2011 Microchip Technology Inc. DS22257B-page 23
MCP6441/2/4
!
φ
N
b
E
E1
D
123
e
e1
A
A1
A2 c
L
L1
MCP6441/2/4
DS22257B-page 24 © 2011 Microchip Technology Inc.
I
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2011 Microchip Technology Inc. DS22257B-page 25
MCP6441/2/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
MCP6441/2/4
DS22257B-page 26 © 2011 Microchip Technology Inc.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2011 Microchip Technology Inc. DS22257B-page 27
MCP6441/2/4
"#$%!&'()*
MCP6441/2/4
DS22257B-page 28 © 2011 Microchip Technology Inc.
"+,-++
D
N
E
E1
NOTE 1
12
e
b
A
A1
A2 c
L1 L
φ
© 2011 Microchip Technology Inc. DS22257B-page 29
MCP6441/2/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
8-Lead Plastic Micro Small Outline Package (MS) [MSOP]
MCP6441/2/4
DS22257B-page 30 © 2011 Microchip Technology Inc.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2011 Microchip Technology Inc. DS22257B-page 31
MCP6441/2/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
MCP6441/2/4
DS22257B-page 32 © 2011 Microchip Technology Inc.
14-Lead Plastic Small Outline (SL) - Narrow, 3.90 mm Body [SOIC]
© 2011 Microchip Technology Inc. DS22257B-page 33
MCP6441/2/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
MCP6441/2/4
DS22257B-page 34 © 2011 Microchip Technology Inc.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2011 Microchip Technology Inc. DS22257B-page 35
MCP6441/2/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
MCP6441/2/4
DS22257B-page 36 © 2011 Microchip Technology Inc.
NOTES:
© 2011 Microchip Technology Inc. DS22257B-page 37
MCP6441/2/4
APPENDIX A: REVISION HISTORY
Revision B (March 2011)
• Added the MCP6442 and MCP6444 package
information.
• Updated the ESD protection value on all pins in
Section 1.1 “Absolute Maximum Ratings †”.
• Added Figure 2-32.
• Updated Table 3-1.
• Updated the package markings information and
drawings.
• Updated the Product Identification System
section.
Revision A (September 2010)
• Original Rel ease of this Document.
MCP6441/2/4
DS22257B-page 38 © 2011 Microchip Technology Inc.
NOTES:
© 2011 Microchip Technology Inc. DS22257B-page 39
MCP6441/2/4
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Device: MCP6441T: Single Op Amp (Tape and Reel)
(SC70, SOT-23)
MCP 6442T: Dual Op Amp (Tape and Reel)
(SOIC, MSOP)
MCP6442 : Dua l Op Amp (Tube)
(SOIC, MSOP)
MCP6444T: Quad Op Amp (Tape and Reel)
(SOIC, TSSOP)
MCP6444: Quad Op Amp (Tube)
(SOIC, TSSOP)
Temperature
Range: E = -40°C to +125°C
Package: LT = Plastic Package (SC70), 5-lead
OT = Plastic Small Outline Transistor (SOT -23), 5-lead
MS = Plastic MSOP, 8-lead
SN = Plastic SOIC, (3.99 mm body), 8-lead
SL = Plastic SOIC, (3.99 mm body), 14-lead
ST = Plastic TSSOP (4.4 mm body), 14-lead
Examples:
a) MCP6441T-E/LT: Tape and Reel,
5LD SC70 Package
b) MCP6441T-E/OT: Tape and Reel,
5LD SOT-23 Package
c) MCP6442T-E/MS: Tape and Reel,
8LD M SOP Package
d) MCP6442-E/MS: Tube,
8LD M SOP Package
e) MCP6442T-E/SN: Tube,
8LD SO IC Pa ck a g e
f) MCP6442-E/SN: Tube,
8LD SO IC Pa ck a g e
g) MCP6444T-E/SL: Tape and Reel,
14LD SOIC Pac kage
h) MCP6444-E/SL: Tube,
14LD SOIC Package
i) MCP6444T- E/ST: Tape and Reel,
14LD TSSOP Package
j) MCP6444-E/ST: Tube,
14LD TSSOP Packag e
PART NO. -X /XX
PackageTemperature
Range
Device
T
Tape and Reel
MCP6441/2/4
DS22257B-page 40 © 2011 Microchip Technology Inc.
NOTES:
© 2011 Microchip Technology Inc. DS22257B-page 41
Information contained in this publication regarding device
applications a nd the lik e is provided only f or yo ur conven ien ce
and may be supers ed ed by u pda t es . It is y our responsibil it y to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PIC START,
PIC32 logo, rfPIC and UNI/O are registered trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MXDEV, MXLAB, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONIT OR, FanSense, HI-TIDE , In-Circuit Seri al
Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified
logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance,
TSHARC, UniWinDriver, WiperLock and ZENA are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip T echnology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2011, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 978-1-61341-021-9
Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
• The re are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is c onstantly evolving. We a t Microc hip are co m mitted to continuously improving the code prot ect ion featur es of our
products. Attempts to break Microchip’ s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperiph erals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS22257B-page 42 © 2011 Microchip Technology Inc.
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