_______________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
MAX5984
Single-Port, 40W, IEEE 802.3af/at PSE
Controller with Integrated MOSFET
19-6142; Rev 0; 12/11
Typical Operating Circuit
General Description
The MAX5984 is a single-port, power-sourcing equip-
ment (PSE) power controller designed for use in IEEE®
802.3af/at-compliant PSE. This device provides powered
device (PD) discovery, classification, current limit, and
DC and AC load-disconnect detections. The MAX5984
operates automatically without the need for any software
programming and features an integrated power MOSFET
and sense resistor. The device also supports new Class 5
and 2-Event classification for detection and classification
of high-power PDs. The MAX5984 provides up to 40W to
a single port (Class 5 enabled) and still provides high-
capacitance detection for legacy PDs.
The MAX5984 provides input undervoltage lockout
(UVLO), input overvoltage lockout, overtemperature
detection, output voltage slew-rate limit during startup,
and LED status indication.
The MAX5984 is available in a space-saving, 28-pin
TQFN (5mm x 5mm) power package, and is rated for the
extended (-40NC to +85NC) temperature range.
Applications
Single-Port PSE End-Point Applications
Single-Port PSE Power Injectors (Midspan
Applications)
PoE Repeaters
Switches/Routers
Industrial Automation Equipment
Wireless LAN Access Point/WiMAX® Base
Stations
Features
S IEEE 802.3af/at Compliant
S Up to 40W for Single-Port PSE Applications
S Integrated 0.5I Power MOSFET and Sense
Resistor
S 2-Event Pin-Select (MAX5984A/MAX5984B)
S PD Detection and Classification
S Programmable Current Limit for Class 5 PDs
S High-Capacitance Detection for Legacy Devices
S Supports Both DC and AC Load Removal
Detections
S Current Foldback and Duty Cycle-Controlled
Current Limit
S LED Indicator for Port Status
S Direct Fast-Shutdown Control Capability
S Space-Saving, 28-Pin TQFN (5mm x 5mm)
Package
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
**Future product—Contact factory for availability.
Ordering Information
IEEE is a registered service mark of the Institute of Electrical and Electronics Engineers, Inc.
WiMAX is a registered service mark of WiMAX Forum Corp.
EVALUATION KIT
AVAILABLE
-54V
AGND
LED
2-EVENT
VEE_DIG
VEE
LEGACY
MIDSPAN
OSC
EN
OUT
OUTP
DET
ILIM1
ILIM2
MAX5984A
PSE OUTPUT
PART PIN-
SELECT TEMP RANGE PIN-
PACKAGE
MAX5984AETI+ 2-EVENT -40NC to +85NC28 TQFN-EP*
MAX5984BETI+** 2-EVENT -40NC to +85NC28 TQFN-EP*
MAX5984CETI+** PWMEN -40NC to +85NC28 TQFN-EP*
MAX5984DETI+ LSCEN -40NC to +85NC28 TQFN-EP*
2 ______________________________________________________________________________________
MAX5984
Single-Port, 40W, IEEE 802.3af/802.3at PSE
Controller with Integrated MOSFET
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
(Voltages referenced to VEE, unless otherwise noted.)
AGND, DET, LED ..................................................-0.3V to +80V
OUT ......................................................-0.3V to (VAGND + 0.3V)
OUTP ....................................................... -6V to (VAGND + 0.3V)
VEE_DIG ............................................................... -0.3V to +0.3V
OSC .........................................................................-0.3V to +6V
EN, 2-EVENT/PWMEN/LSCEN, MIDSPAN,
LEGACY, ILIM1, ILIM2..........................................-0.3V to +4V
Maximum Current Into LED ................................................40mA
Maximum Current Into OUT .........................Internally regulated
Continuous Power Dissipation (TA = +70NC)
TQFN (derate 34.5mW/NC above +70NC)...............2758.6mW
Operating Temperature Range .......................... -40NC to +85NC
Storage Temperature Range ............................ -65NC to +150NC
Junction Temperature .....................................................+150NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
ELECTRICAL CHARACTERISTICS
(VAGND - VEE = 32V to 60V, TA = -40NC to +85NC, all voltages are referenced to VEE, unless otherwise noted. Typical values are at
VAGND - VEE = 54V, TA = +25NC. Currents are positive when entering the pin and negative otherwise.) (Note 2)
ABSOLUTE MAXIMUM RATINGS
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
TQFN
Junction-to-Ambient Thermal Resistance .......................29NC
Junction-to-Case Thermal Resistance ..............................2NC
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
POWER SUPPLIES
Operating Voltage Range VAGND VAGND - VEE 32 60 V
Supply Current IEE VOUT = VEE, all logic inputs unconnected,
measured at AGND in power mode 2.5 4 mA
CURRENT LIMIT
Current Limit ILIM
Maximum
ILOAD
allowed
during
current-limit
conditions,
VOUT = 0V
(Note 3)
Class 0, 1, 2, 3 400 420 441
mA
Class 4 684 720 756
Class 5 if ILIM1 = VEE, ILIM2
= unconnected 807 850 893
Class 5 if ILIM1 =
unconnected, ILIM2 = VEE 855 900 945
Class 5 if ILIM1 = VEE, ILIM2
= VEE 902 950 998
Foldback Initial OUT Voltage VFLBK_ST VAGND - VOUT below which the current
limit starts folding back 27 V
Foldback Final OUT Voltage VFLBK_END VAGND - VOUT below which the current
limit reaches ITH_FB 10 V
Minimum Foldback Current Limit
Threshold ITH_FB VOUT = VAGND 166 mA
_______________________________________________________________________________________ 3
MAX5984
Single-Port, 40W, IEEE 802.3af/802.3at PSE
Controller with Integrated MOSFET
ELECTRICAL CHARACTERISTICS (continued)
(VAGND - VEE = 32V to 60V, TA = -40NC to +85NC, all voltages are referenced to VEE, unless otherwise noted. Typical values are at
VAGND - VEE = 54V, TA = +25NC. Currents are positive when entering the pin and negative otherwise.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
OVERCURRENT
Overcurrent Threshold ICUT
Overcurrent
threshold
allowed for
t P tFAULT,
VOUT = 0V
(Note 3)
Class 0, 1, 2, 3 351 370 389
mA
Class 4 602 634 666
Class 5 if ILIM1 = VEE,
ILIM2 = unconnected 710 748 785
Class 5 if ILIM1 =
unconnected, ILIM2 = VEE 752 792 832
Class 5 if ILIM1 = VEE,
ILIM2 = VEE 794 836 878
INTERNAL POWER
DMOS On-Resistance RDS(ON)
Measured
from OUT to
VEE, IOUT =
100mA
TA = +25NC0.5 0.9
I
TA = +85NC0.6 1.3
Power-Off OUT Leakage Current IOUT_LEAK VEN = VEE, VOUT = VAGND 10 FA
SUPPLY MONITORS
VEE Undervoltage Lockout VEE_UVLO VAGND - VEE, VAGND increasing 28.5 V
VEE Undervoltage Lockout
Hysteresis VEE_UVLOH Port is shutdown if: VAGND - VEE < VEE_
UVLO - VEE_UVLOH 3 V
VEE Overvoltage Lockout VEE_OV VAGND - VEE > VEE_OV, VAGND increasing 62.5 V
VEE Overvoltage Lockout
Hysteresis VEE_OVH 1 V
Thermal Shutdown Threshold TSHD
Port is shutdown and device resets if the
junction temperature exceeds this limit,
temperature increasing
+150 NC
Thermal Shutdown Hysteresis TSHDH Temperature decreasing 20 NC
OUTPUT MONITOR
OUT Input Current IBOUT VOUT = VAGND, probing phases 6FA
Idle Pullup Current at OUT IDIS
OUTP discharge current, detection and
classification off, port shutdown,
VOUTP = VAGND - 2.8V
200 265 FA
Short to VEE Detection
Threshold DCNTH VOUT - VEE, VOUT decreasing, enabled
during detection 1.5 2.0 2.5 V
Short to VEE Detection
Threshold Hysteresis DCNHY 220 mV
LOAD DISCONNECT
DC Load-Disconnect Threshold IDCTH
Minimum load current allowed before
disconnect (DC disconnect active),
VOUT = 0V
5 7.5 10 mA
AC Load-Disconnect Threshold IACTH Current into DET, for IDET < IACTH the
port powers off (AC disconnect active) 115 130 145 FA
4 ______________________________________________________________________________________
MAX5984
Single-Port, 40W, IEEE 802.3af/802.3at PSE
Controller with Integrated MOSFET
ELECTRICAL CHARACTERISTICS (continued)
(VAGND - VEE = 32V to 60V, TA = -40NC to +85NC, all voltages are referenced to VEE, unless otherwise noted. Typical values are at
VAGND - VEE = 54V, TA = +25NC. Currents are positive when entering the pin and negative otherwise.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Triangular Wave Peak-to-Peak
Voltage Amplitude AMPTRW Measured at DET, referred to AGND 3.85 4 4.2 V
OSC Pullup/Pulldown Currents IOSC Measured at OSC 26 32 39 FA
ACD_EN Threshold VACD_EN VOSC - VEE > VACD_EN to activate AC
disconnect 270 330 380 mV
Load Disconnect Timer tDISC
Time from IRSENSE < IDCTH (DC
disconnect active) or IDET < IACTH (AC
disconnect active) to gate shutdown
300 400 ms
DETECTION
Detection Probe Voltage
(First Phase) VDPH1 VAGND - VDET during the first detection
phase 3.8 4 4.2 V
Detection Probe Voltage
(Second Phase) VDPH2 VAGND - VDET during the second
detection phase 9 9.3 9.6 V
Current-Limit Protection IDLIM VDET = VAGND during detection, measure
current through DET 1.50 1.75 2.00 mA
Short-Circuit Threshold VDCP
If VAGND - VOUT < VDCP after the first
detection phase, a short circuit to AGND
is detected
1 V
Open-Circuit Threshold ID_OPEN First point measurement current threshold
for open condition 8FA
Resistor Detection Window RDOK (Note 4) 19 26.5 kI
Resistor Rejection Window RDBAD Detection rejects lower values 15.5 kI
Detection rejects higher values 32
CLASSIFICATION
Classification Probe Voltage VCL VAGND - VDET during classification 16 20 V
Current-Limit Protection IClLIM VDET = VAGND, during classification
measure current through DET 65 80 mA
Classification Current
Thresholds ICL
Classification
current
thresholds
between
classes
Class 0, Class 1 5.5 6.5 7.5
mA
Class 1, Class 2 13.0 14.5 16.0
Class 2, Class 3 21 23 25
Class 3, Class 4 31 33 35
Class 4 upper limit (Note 5) 45 48 51
Mark Event Voltage VMARK VAGND - VDET during mark event 8 10 V
Mark Event Current Limit IMARK_LIM VDET = VAGND, during mark event
measure current through DET 55 80 mA
_______________________________________________________________________________________ 5
MAX5984
Single-Port, 40W, IEEE 802.3af/802.3at PSE
Controller with Integrated MOSFET
Note 2: This device is production tested at TA = +25NC. Limits at TA = -40NC and TA = +85NC are guaranteed by design.
Note 3: If ILIM1 and ILIM2 are both unconnected, Class 5 detection is disabled. See the Class 5 PD Classification section and Table 3 for
details and settings.
Note 4: RDOK = (VOUT2 - VOUT1)/(IDET2 - IDET1). VOUT1, VOUT2, IDET2, and IDET1 represent the voltage at OUT and the current at
DET during phase 1 and 2 of the detection, respectively.
Note 5: If Class 5 is enabled, this is the classification current thresholds from Class 4 to Class 5.
ELECTRICAL CHARACTERISTICS (continued)
(VAGND - VEE = 32V to 60V, TA = -40NC to +85NC, all voltages are referenced to VEE, unless otherwise noted. Typical values are at
VAGND - VEE = 54V, TA = +25NC. Currents are positive when entering the pin and negative otherwise.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DIGITAL INPUTS/OUTPUTS (Voltages referenced to VEE)
Digital Input Low VIL 0.8 V
Digital Input High VIH 2.4 V
Internal Input Pullup Current IPU Pullup current to internal digital supply to
set default values 3 5 7 FA
LED Output Low Voltage VLED_LOW ILED = 10mA, PWM disabled, port power-on 0.8 V
LED Output Leakage ILED_LEAK PWM disabled, shutdown mode,
VLED = 60V 10 FA
PWM Frequency 25 kHz
PWM Duty Cycle 6.25 %
TIMING
Startup Time tSTART
Time during which a current limit set to
420mA is allowed, starts when power is
turned on
50 60 70 ms
Fault Time tFAULT Maximum allowed time for an overcurrent
condition set by ICUT after startup 50 60 70 ms
Detection Reset Time tME Time allowed for the port voltage to reset
before detection starts 80 90 ms
Detection Time tDET Maximum time allowed before detection is
completed 330 ms
Midspan Mode Detection Delay tDMID 2 2.2 2.4 s
Classification Time tCLASS Time allowed for classification 19 23 ms
Mark Event Time Time allowed for mark event 7 9 11 ms
VEEUVLO Turn-On Delay tDLY Time VAGND must be above the VEEUVLO
thresholds before the device operates 5.2 ms
Restart Timer tRESTART Time the device waits before turning on
after an overcurrent fault
16 x
tFAULT ms
6 ______________________________________________________________________________________
MAX5984
Single-Port, 40W, IEEE 802.3af/802.3at PSE
Controller with Integrated MOSFET
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
DC DISCONNECT THRESHOLD
vs. TEMPERATURE
MAX5984 toc07
TEMPERATURE (°C)
DC DISCONNECT THRESHOLD (mA)
603510-15
6.6
6.8
7.0
7.2
7.4
6.4
-40 85
FOLDBACK CURRENT-LIMIT THRESHOLD
vs. OUTPUT VOLTAGE
MAX5984 toc06
VAGND - VOUT (V)
IRSENSE (mA)
302010
100
200
300
400
500
600
700
800
0
0 40
CLASS 4
CLASS 0, 1, 2, 3
INTERNAL FET RESISTANCE
vs. TEMPERATURE
MAX5984 toc05
TEMPERATURE (°C)
FET RESISTANCE (mΩ)
603510-15
400
600
800
1000
200
-40 85
VEE OVERVOLTAGE LOCKOUT
vs. TEMPERATURE
MAX5984 toc04
TEMPERATURE (°C)
OVERVOLTAGE LOCKOUT (V)
6035-15 10
60.5
61.0
61.5
62.0
63.0
62.5
63.5
64.0
60.0
-40 85
VEE UNDERVOLTAGE LOCKOUT
vs. TEMPERATURE
MAX5984 toc03
TEMPERATURE (°C)
UNDERVOLTAGE LOCKOUT (V)
603510-15
27.5
28.0
28.5
29.0
29.5
30.0
27.0
-40 85
ANALOG SUPPLY CURRENT
vs. TEMPERATURE
MAX5984 toc02
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
603510-15
2.4
2.5
2.6
2.7
2.3
-40 85
MEASURED AT AGND
ANALOG SUPPLY CURRENT
vs. INPUT VOLTAGE
MAX5984 toc01
VAGND - VEE (V)
SUPPLY CURRENT (mA)
565248444036
2.4
2.5
2.6
2.7
2.3
32 60
MEASURED AT AGND
_______________________________________________________________________________________ 7
MAX5984
Single-Port, 40W, IEEE 802.3af/802.3at PSE
Controller with Integrated MOSFET
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
ZERO-CURRENT DETECTION WAVEFORM
WITH AC DISCONNECT ENABLED
MAX5984 toc13
40ms/div
0V
0mA
VAGND - VOUT
20V/div
IOUT
100mA/div
ZERO-CURRENT DETECTION WAVEFORM
WITH DC DISCONNECT ENABLED
MAX5984 toc12
40ms/div
0V
0mA
VAGND - VOUT
20V/div
IOUT
100mA/div
EN TO OUT TURN-OFF DELAY
MAX5984 toc11
100µs/div
0V
0V
0mA
VAGND - VOUT
20V/div
IOUT
200mA/div
VEN
5V/div
SHORT-CIRCUIT TRANSIENT RESPONSE
MAX5984 toc10
10µs/div
0V
0mA
VAGND - VOUT
20V/div
IOUT
5A/div
SHORT-CIRCUIT RESPONSE TIME
MAX5984 toc09
20ms/div
0V
0mA
VAGND - VOUT
20V/div
IOUT
200mA/div
OVERCURRENT TIMEOUT (240Ω TO 138Ω)
MAX5984 toc08
20ms/div
0V
0mA
VAGND - VOUT
20V/div
IOUT
200mA/div
8 ______________________________________________________________________________________
MAX5984
Single-Port, 40W, IEEE 802.3af/802.3at PSE
Controller with Integrated MOSFET
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
DETECTION WITH INVALID PD (OPEN CIRCUIT)
MAX5984 toc16d
100ms/div
0V
0mA
VAGND - VOUT
5V/div
IOUT
1mA/div
DETECTION WITH INVALID PD (33kΩ)
MAX5984 toc16c
100ms/div
0V
0mA
VAGND - VOUT
5V/div
IOUT
1mA/div
DETECTION WITH INVALID PD (15kΩ)
MAX5984 toc16b
100ms/div
0V
0mA
VAGND - VOUT
5V/div
IOUT
1mA/div
DETECTION WITH INVALID PD (25kΩ TO 10µF)
MAX5984 toc16a
40ms/div
0V
0mA
VAGND - VOUT
1V/div
IOUT
1mA/div
STARTUP WITH A VALID PD
MAX5984 toc15
100ms/div
0V
0mA
VAGND - VOUT
20V/div
IOUT
100mA/div
OVERCURRENT RESTART DELAY
MAX5984 toc14
400ms/div
0V
0mA
VAGND - VOUT
20V/div
IOUT
200mA/div
_______________________________________________________________________________________ 9
MAX5984
Single-Port, 40W, IEEE 802.3af/802.3at PSE
Controller with Integrated MOSFET
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
CLASSIFICATION WITH DIFFERENT PD CLASSES
(4 AND 5)
MAX5984 toc20b
40ms/div
0V
0mA
VAGND - VOUT
10V/div
IOUT
20mA/div
CLASS 5
CLASS 4
CLASSIFICATION WITH DIFFERENT PD CLASSES
(0 TO 3)
MAX5984 toc20a
40ms/div
0V
0mA
VAGND - VOUT
10V/div
IOUT
10mA/div
CLASS 3
CLASS 2
CLASS 1
CLASS 0
DETECTION IN OUTPUT SHORTED TO AGND
MAX5984 toc19
40ms/div
0V
0mA
VAGND - VOUT
5V/div
IOUT
1mA/div
DETECTION IN MIDSPAN WITH INVALID PD (33kΩ)
MAX5984 toc18b
400ms/div
0V
0mA
VAGND - VOUT
5V/div
IOUT
1mA/div
DETECTION IN MIDSPAN WITH INVALID PD (15kΩ)
MAX5984 toc18a
400ms/div
0V
0mA
VAGND - VOUT
5V/div
IOUT
1mA/div
STARTUP IN MIDSPAN WITH A VALID PD
MAX5984 toc17
100ms/div
0V
0mA
VAGND - VOUT
20V/div
IOUT
100mA/div
10 _____________________________________________________________________________________
MAX5984
Single-Port, 40W, IEEE 802.3af/802.3at PSE
Controller with Integrated MOSFET
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
LED PWM TIMING AND DUTY CYCLE
MAX5984 toc24
10µs/div
0V
0V
0mA
VAGND - VOUT
50V/div
VAGND - VLED
20V/div
IOUT
500mA/div
LED OVERCURRENT FAULT WITH PWM DISABLED
MAX5984 toc23b
200ms/div
0V
0V
0mA
VAGND - VOUT
50V/div
VAGND - VLED
20V/div
IOUT
500mA/div
LED OVERCURRENT FAULT WITH PWM ENABLED
MAX5984 toc23a
200ms/div
0V
0V
0mA
VAGND - VOUT
50V/div
VAGND - VLED
20V/div
IOUT
500mA/div
LED DETECTION FAULT WITH PWM DISABLED
MAX5984 toc22b
200ms/div
0V
0V
0mA
VAGND - VOUT
10V/div
VAGND - VLED
20V/div
IOUT
500mA/div
LED DETECTION FAULT WITH PWM ENABLED
MAX5984 toc22a
200ms/div
0V
0V
0mA
VAGND - VOUT
10V/div
VAGND - VLED
20V/div
IOUT
500mA/div
STARTUP USING 2-EVENT CLASSIFICATION
WITH A VALID PD
MAX5984 toc21
100ms/div
0V
0mA
VAGND - VOUT
20V/div
IOUT
100mA/div
______________________________________________________________________________________ 11
MAX5984
Single-Port, 40W, IEEE 802.3af/802.3at PSE
Controller with Integrated MOSFET
Pin Description
Pin Configuration
26
27
25
24
10
9
11
VEE
ILIM1
ILIM2
2-EVENT/PWMEN/LSCEN
MIDSPAN
12
VEE
N.C.
N.C.
LED
AGND
N.C.
I.C.
12
OUTP
4567
2021 19 17 16 15
OUT
OUT
VEE_DIG
I.C.
I.C.
I.C.
MAX5984
VEE OSC
3
18
28 8
N.C. I.C.
N.C.
23 13 LEGACY
DET
22 14 EN
*EXPOSED PAD, CONNECT TO AGND.
*EP
N.C.
THIN QFN
TOP VIEW
+
PIN NAME FUNCTION
1, 2, 3 VEE Analog Low-Side Supply Input. Bypass with an external 100V, 47FF capacitor in parallel with a
100V, 0.1FF ceramic capacitance between AGND and VEE.
4 ILIM1
Class 5 Current-Limit Digital Adjust 1. Referenced to VEE. ILIM1 is internally pulled up to the digital
supply. Use ILIM1 with ILIM2 to enable Class 5 operation and to adjust the Class 5 current-limit
value. See the Electrical Characteristics table and Table 3 for details.
5 ILIM2
Class 5 Current-Limit Digital Adjust 2. Referenced to VEE. ILIM2 is internally pulled up to the digital
supply. Use ILIM2 with ILIM1 to enable Class 5 operation and to adjust the Class 5 current-limit
value. See the Electrical Characteristics table and Table 3 for details.
6
2-EVENT
(MAX5984A/
MAX5984B)
2-Event Classification Select. Referenced to VEE. 2-EVENT is internally pulled up to the digital
supply. Leave unconnected to disable 2-Event classification. Force low to enable the 2-Event
classification. See the 2-Event PD Classification section for more details. Change status of this
bit only when the part is in reset state. The MAX5984C/MAX5984D are enabled.
PWMEN
(MAX5984C)
PWM Control Logic Input. Referenced to VEE. PWMEN is internally pulled up to the digital supply.
Leave unconnected to enable the internal PWM to drive the LED pin. Force low to disable the
internal PWM. The MAX5984A/MAC5984B/MAX5984D are enabled.
LSCEN
(MAX5984D)
Load Stability Check Function Select. Referenced to VEE. LSCEN is internally pulled up to the
digital supply. Leave unconnected to enable the load stability check function. Force low to disable
the load stability check function. Change status of this bit only when the part is in reset state.
The MAX5984A is disabled but the MAX5984B/MAX5984C are enabled.
12 _____________________________________________________________________________________
MAX5984
Single-Port, 40W, IEEE 802.3af/802.3at PSE
Controller with Integrated MOSFET
Pin Description (continued)
PIN NAME FUNCTION
7 MIDSPAN
Detection Collision Avoidance Logic Input. Referenced to VEE. MIDSPAN is internally pulled up
to the digital supply. Leave unconnected to activate the detection collision avoidance circuitry
for midspan PSE systems. Force low to disable this function for an end-point PSE system. The
MIDSPAN logic level latches after the device is powered up or after a reset condition.
8–11, 15 I.C. Internally Connected. Connect I.C. to VEE.
12 VEE_DIG Digital Low-Side Supply Input. Connect to VEE externally.
13 LEGACY
Legacy Detection Logic Input. Referenced to VEE. LEGACY is internally pulled up to the digital
supply. Leave unconnected to activate the legacy PD detection. Force low to disable this function.
The LEGACY logic level latches after the device is powered up or after a reset condition.
14 EN
Enable Input. Referenced to VEE. EN is internally pulled up to the digital supply. Leave
unconnected to enable the device. Force low for at least 40Fs to reset the device. The MIDSPAN,
OSC, and LEGACY states latch-in when the reset condition is removed (low-to-high transition).
16, 18,
20, 22,
24, 28
N.C. No Connection. Not internally connected. Leave N.C. unconnected.
17 LED
LED Indicator Open-Drain Output. Referenced to VEE. LED can sink 10mA and can drive an
external LED directly. Blinking functionality is provided to signal different conditions (see the PWM
and LED Signals section). Connect LED to AGND externally or to an external supply (if available)
through a series resistance (Figures 6 and 7).
19 OSC
AC Disconnect Triangular Wave Output. Bypass with a 100nF (Q10% tolerance) external capacitor
to VEE to enable the AC disconnect function. Connect OSC to VEE to disable the AC disconnect
function and to activate the DC disconnect function. The OSC state latches after the device is
powered up or after a reset condition.
21 AGND High-Side Supply Input
23 DET
Detection/Classification Voltage Output. DET is used to set the detection mark event and
classification probe voltages and for the AC current sensing when using the AC disconnect
function. To use the AC disconnect function, place a 1kI and 0.47FF RC series in parallel with the
external protection diode to OUTP (Figure 7).
25 OUTP
Port Pullup Output. OUTP is used to pull up the port voltage to AGND when needed. If AC
disconnect is used, connect OUTP to the anode of the AC-blocking diode. If AC disconnect is
not used, connect OUTP to OUT (Figures 6 and 8). Bypass OUTP to AGND with a 100V, 0.1FF
ceramic capacitor.
26, 27 OUT
Integrated MOSFET Output. If DC disconnect is used, connect the port output to OUTP (Figures
6 and 8). If the AC disconnect function is used, connect OUT to the cathode of the AC-blocking
diode (Figure 7).
— EP Exposed Pad. Connect EP to VEE externally. See the Layout Procedure section for details.
______________________________________________________________________________________ 13
MAX5984
Single-Port, 40W, IEEE 802.3af/802.3at PSE
Controller with Integrated MOSFET
Simplified Diagram
Detailed Description
The MAX5984 is a single-port, PSE power controller
designed for use in IEEE 802.3af/IEEE 802.3at-compliant
PSE. This device provides PD discovery, classification,
current limit, and DC and AC load-disconnect detec-
tions. The MAX5984 operates automatically without the
need for any software programming and features an inte-
grated power MOSFET and sense resistor. The device
also supports new Class 5 and 2-event classification
for detection and classification of high-power PDs. The
MAX5984 provides up to 40W to a single port (Class 5
enabled) and still provides high-capacitance detection
for legacy PDs.
The MAX5984 provides input UVLO, input overvoltage
lockout, overtemperature detection, output voltage slew-
rate limit during startup, and LED status indication.
Reset
The MAX5984 is reset by any of the following conditions:
1) Power-up. Reset condition is cleared once VEE rises
above the UVLO threshold.
2) Hardware reset. Reset occurs once the EN input is
driven low (> 40µs typ) any time after power-up. The
device exits the reset condition once the EN input is
driven high again.
3) Thermal shutdown. The device enters thermal shut-
down at +150NC. The device exits thermal shutdown
and is reset once the temperature drops below 130NC.
OSC STATUS
MONITOR
OSC
LEGACY
EN
MIDSPAN PORT STATE
MACHINE (SM)
REGISTER FILE
ANALOG
BIAS AND
SUPPLY
MONITOR
VOLTAGE
PROBING AND
CURRENT-LIMIT
CONTROL
DETECTION AND
CLASSIFICATION
CONTROL
CENTRAL LOGIC
UNIT (CLU)
AC DETECTOR
2-EVENT/PWMEN/LSCEN
AC DISCONNECT
SIGNAL (ACD)
THRESHOLD
SETTINGS
ACD
REFERENCE
CURRENT
INTERNAL
MOSFET
INTERNAL
RSENSE
VOLTAGE
SENSING
GATE
DRIVE
CURRENT LIMIT,
OVERCURRENT, AND OPEN-
CIRCUIT SENSING,
AND FOLDBACK CONTROL
CLASS 5 ENABLE/DISABLE,
OVERCURRENT AND
CURRENT LIMIT CONTROL
ILIM12-EVENT/PWMEN/LSCEN
LED
VEE
AGND
ILIM2
9-BIT ADC
AGND
OUTP
OUT
FOLDBACK
CONTROL
DET
TRIANGLE
WAVE
GENERATOR
AC DISCONNECT
ENABLE
A = 1
VOLTAGE
REFERENCES
CURRENT
REFERENCES
INTERNAL
SUPPLIES
CURRENT SENSING
MAX5984
14 _____________________________________________________________________________________
MAX5984
Single-Port, 40W, IEEE 802.3af/802.3at PSE
Controller with Integrated MOSFET
During a reset, the MAX5984 latches in the state of
MIDSPAN, LEGACY, and OSC. During normal operation,
changes to these inputs are ignored.
Midspan Mode
In midspan mode, the device adopts cadence timing
during the detection phase. When cadence timing is
enabled and a failed detection occurs, the port waits
between 2s and 2.4s before attempting to detect again.
Midspan mode is activated by setting MIDSPAN high
and then powering or resetting the device. By default,
the MIDSPAN input is internally pulled high. Force
MIDSPAN low to disable this function.
Automatic Operation
The MAX5984 operates automatically after the reset
condition is cleared. The device performs detection and
classification, and powers up the port automatically once
a valid PD is detected at the port. If a valid PD is not con-
nected at the port, the MAX5984 repeats the detection
routine continuously until a valid PD is connected.
PD Detection
During normal operation, the MAX5984 probes the output
for a valid PD. A valid PD has a 25kI discovery signature
characteristic as specified in the IEEE 802.3af/802.3at
standard. Table 1 shows the IEEE 802.3at specification
for a PSE detecting a valid PD signature.
During detection, the MAX5984 keeps the internal
MOSFET off and forces two probe voltages through DET.
The current through DET is measured as well as the volt-
age at OUT. A two-point slope measurement is used, as
specified by the IEEE 802.3af/802.3at standard, to verify
the device connected to the port.
An external diode, in series with the DET input, restricts
PD detection to the first quadrant as specified by the
IEEE 802.3af/802.3at standard. To prevent damage to
non-PD devices, and to protect itself from an output short
circuit, the MAX5984 limits the current into DET to less
than 2mA maximum during PD detection.
In midspan mode, the MAX5984 waits at least 2.0s
before attempting another detection cycle after every
failed detection. The first detection, however, happens
immediately after exiting a reset condition.
High-Capacitance Detection
The status of the LEGACY input is latched during power-
up or after reset condition is cleared. The LEGACY
input is internally pulled high enabling high-capacitance
detection. Unless high-capacitance detection is needed,
connect LEGACY to VEE to disable this function. If high-
capacitance detection is enabled, PD signature capaci-
tances up to 47FF (typ) are accepted.
Table 1. PSE PD Detection Modes Electrical Requirements (IEEE 802.3at)
PARAMETER SYMBOL MIN MAX UNITS ADDITIONAL INFORMATION
Open-circuit voltage VOC 30 V In detection mode only
Short-circuit current ISC 5 mA In detection mode only
Valid test voltage VVALID 2.8 10 V
Voltage difference between test points DVTEST 1 V
Time between any two test points tBP 2 ms This timing implies a 500Hz
maximum probing frequency
Slew rate VSLEW 0.1 V/Fs
Accept signature resistance RGOOD 19 26.5 kI
Reject signature resistance RBAD < 15 > 33 kI
Open-circuit resistance ROPEN 500 kI
Accept signature capacitance CGOOD 150 nF
Reject signature capacitance CBAD 10 FF
Signature offset voltage tolerance VOS 0 2.0 V
Signature offset current tolerance IOS 0 12 FA
______________________________________________________________________________________ 15
MAX5984
Single-Port, 40W, IEEE 802.3af/802.3at PSE
Controller with Integrated MOSFET
PD Classification
During the PD classification mode, the MAX5984 forces
a probe voltage (-18V typ) at DET and measures the
current into DET. The measured current determines the
class of the PD. If the ILIM1 and ILIM2 pins are both left
unconnected, the MAX5984 classifies the PD based on
Table 33.9 of the IEEE 802.3at standard (Table 2). If the
measured current exceeds 51mA, the MAX5984 does
not power the PD, but returns to the idle state before
attempting a new detection cycle.
Class 5 PD Classification
The MAX5984 supports high power beyond the IEEE
802.3at standard by providing an additional classifica-
tion (Class 5) if needed. To enable Class 5 detection
and select the corresponding current-limit/overcurrent
thresholds, ILIM1 and ILIM2 must be set based on
the combinations detailed in Table 3. Once Class 5 is
enabled, during classification, if the MAX5984 detects
currents in excess of the Class 4 upper limit threshold,
the PD is classified as a Class 5 PD. The PD is guar-
anteed to be classified as a Class 5 device for any
classification current from 51mA up to the classification
current-limit threshold.
The Class 5 overcurrent threshold and current limit is
set with ILIM1 and ILIM2. ILIM1 and ILIM2 are both
referenced to VEE and are internally pulled up to the
digital supply. Leave ILIM1 and ILIM2 unconnected to
disable Class 5 detection and to be fully compliant to
IEEE 802.3at standard classification. Class 5 detection
is enabled, and the corresponding overcurrent threshold
and current limit is adjusted, by connecting one or both
to VEE (Table 3).
2-Event PD Classification
If the result of the first classification event is Class 0
through Class 3, then only a single classification event
occurs, as shown in Figure 1. However, if the result is
Class 4 or Class 5 (when enabled), the device performs
a second classification event, as shown in Figure 2.
Between the classification cycles, the MAX5984 per-
forms a first and second mark event as required by the
IEEE 802.3at standard, forcing a -9.0V probing voltage
at DET. The 2-Event function is disabled by default in the
MAX5984A/MAX5984B/MAX5984E. However, it is not
pin-selectable in the MAX5984E.
Powered State
When the MAX5984 enters a powered state, the tFAULT
and tDISC timers are reset. When the startup timer has
timed out, the device enters a normal powered condition,
allowing power delivery to the PD.
Table 2. PSE Classification of a PD (Table
33.9 of the IEEE 802.3at Standard)
Table 3. Class 5 Overcurrent Threshold and Current-Limit Settings
MEASURED ICLASS (mA) CLASSIFICATION
0 to 5 Class 0
> 5 and < 8 Can be Class 0 or 1
8 to 13 Class 1
> 13 and < 16 Either Class 1 or 2
16 to 21 Class 2
> 21 and < 25 Either Class 2 or 3
25 to 31 Class 3
> 31 and < 35 Either Class 3 or 4
35 to 45 Class 4
> 45 and < 51 Either Class 4 or Invalid
ILIM1
CONFIGURATION
ILIM2
CONFIGURATION
OVERCURRENT
THRESHOLD (mA)
CURRENT
LIMIT (mA)
Unconnected Unconnected Class 5 disabled Class 5 disabled
VEE Unconnected 748 850
Unconnected VEE 792 900
VEE VEE 836 950
16 _____________________________________________________________________________________
MAX5984
Single-Port, 40W, IEEE 802.3af/802.3at PSE
Controller with Integrated MOSFET
Figure 1. Detection, Classification, and Port Power-Up Sequence
Figure 2. Detection, 2-Event Classification, and Port Power-Up Sequence
VOUT
t
0V
-4V
-9.3V
-18V
-48V
tDET(1) tDET(2) tCLASS
80ms 150ms 150ms 19ms
VOUT
t
0V
-4V
-9.3V
-18V
-48V
tDET(1) tDET(2) tCLASS(1) tCLASS(2)
80ms 150ms 150ms 19ms 19ms
9ms 9ms
______________________________________________________________________________________ 17
MAX5984
Single-Port, 40W, IEEE 802.3af/802.3at PSE
Controller with Integrated MOSFET
Overcurrent Protection
The MAX5984 has an internal sense resistor, RSENSE
(see the Simplified Diagram), connected between the
source of the internal MOSFET and VEE to monitor the
load current. Under normal operating conditions, the
current through RSENSE (IRSENSE) never exceeds the
threshold ILIM. If IRSENSE exceeds ILIM, an internal
current-limiting circuit regulates the gate voltage of the
internal MOSFET, limiting the current. During transient
conditions, if IRSENSE exceeds ILIM by more than 2A, a
fast pulldown circuit activates to quickly recover from the
current overshoot.
In the normal powered state, the MAX5984 checks for
overcurrent conditions, as determined by ICUT = ~88%
of ILIM. The tFAULT counter sets the maximum allowed
continuous overcurrent period. This timer is incremented
both in startup and in normal powered state, but under
different conditions. During startup, the counter increas-
es when IRSENSE exceeds ILIM, while in the normal pow-
ered state the counter increases when IRSENSE exceeds
ICUT. It decreases at a slower pace when IRSENSE
drops below ILIM or ICUT. A slower decrement for the
tFAULT counter allows for detection of repeated short-
duration overcurrent events. When the counter reaches
the tFAULT limit, the MAX5984 powers down the port. For
a continuous overstress, a fault occurs exactly after a
period of tFAULT.
After a power-off due to an overcurrent fault, the tFAULT
timer is not immediately reset but starts decrementing.
The MAX5984 allows the port to be powered on only
when the tFAULT counter reaches zero. This feature sets
an automatic port power duty-cycle protection to the
internal MOSFET to avoid overheating.
In the normal powered state, the ILIM and ICUT thresh-
olds are set automatically according to the classification
result (see Table 2 for classification results based on
detection current and the Electrical Characteristics table
for the corresponding thresholds). During startup, ILIM is
always set to 420mA regardless of the detected class.
Foldback Current
During startup and normal operation, an internal circuit
senses the port voltage and reduces the current-limit
value and the overcurrent threshold when (VAGND -
VOUT) < 27V. The foldback function helps to reduce the
power dissipation on the internal MOSFET. The current
limit eventually reduces down to ITH_FB when (VAGND -
VOUT) < 10V (Figure 3).
Figure 3. Foldback Current Characteristics
VAGND - VOUT
ILIM
ITH_FB
10V 27V
IRSENSE
18 _____________________________________________________________________________________
MAX5984
Single-Port, 40W, IEEE 802.3af/802.3at PSE
Controller with Integrated MOSFET
Digital Logic
The MAX5984 internally generates digital supplies (ref-
erenced to VEE) to power the internal logic circuitry. All
logic inputs and outputs are referenced to VEE. See the
Electrical Characteristics table for digital input thresh-
olds. If digital logic inputs are driven externally, the
nominal digital logic level is 3.3V.
Undervoltage and Overvoltage Protection
The MAX5984 contains undervoltage and overvoltage
protection features. An internal VEE undervoltage lockout
(VEE_UVLO) circuit keeps the port off and the MAX5984 in
reset until VAGND - VEE exceeds 28.5V (typ) for more than
2.5ms. An internal VEE overvoltage (VEE_OV) circuit shuts
down the port when (VAGND - VEE) exceeds 62.5V (typ).
DC Disconnect Monitoring
Force OSC to VEE and power or reset the device to acti-
vate DC load-disconnect monitoring. If IRSENSE (the cur-
rent across RSENSE) falls below the DC load-disconnect
threshold, IDCTH, for more than tDISC, the device turns
off port power.
AC Disconnect Monitoring
The MAX5984 features AC load-disconnect monitoring.
Bypass OSC with a 100nF (Q10% tolerance) external
capacitor to VEE and power or reset the device to
enable AC disconnect. When AC disconnect is enabled,
a blocking diode in series to OUT and an RC circuit in
parallel to the DET diode must be used, as shown in
Figure 7.
The AC disconnect uses an internal triangle wave gen-
erator to supply the probing signal. Then the resulting
4VP-P amplitude wave is forced on DET. The common
mode of the output signal probed on DET is 5V below
AGND. If the AC current peak into DET falls below IACTH
for more than tDISC, the device powers down the port.
PWM and LED Signals
The MAX5984 includes a multifunction LED driver to
inform the user of the port status. LED is an open-drain,
multifunction output referenced to VEE and can sink up
to 10mA (typ) while driving an external LED. The LED is
turned on when the port is connected to a valid PD and
powered. If the port is not powered or is disconnected,
the LED will be off.
For two other conditions, the MAX5984 blinks a code to
communicate the port status. A series of two flashes indi-
cates an overcurrent fault occurred during port power-on,
and has a timing characteristic detailed by Figure 4. A
series of five flashes indicates that during detection an
invalid low or high discovery signature resistance was
detected and has a timing characteristic detailed by
Figure 5.
Figure 4. LED Code Timing for Overcurrent Fault During Port Power-On
Figure 5. LED Code Timing for Detection Fault Due to High- or Low-Discovery Signature Resistance
LED OFFLED ON
223ms
LED ON LED ON LED ONLED OFFLED OFF
74ms 74ms223ms
PORT POWERED DOWN, DUE TO OVERCURRENT FAULT
PORT POWERED ON PORT POWERED ON AGAIN
LED
OFF
LED
ON
223ms74ms
LED
OFF
LED
ON
223ms74ms
LED
OFF
LED
ON
223ms74ms
LED
OFF
LED
ON
223ms74ms
LED
ON
74ms
LED
OFF
1.4s
SEQUENCE REPEATS
INVALID HIGH OR LOW DISCOVERY SIGNATURE RESISTANCE DETECTED
______________________________________________________________________________________ 19
MAX5984
Single-Port, 40W, IEEE 802.3af/802.3at PSE
Controller with Integrated MOSFET
The MAX5984 also contains an internal square wave,
PWM signal generator. The PWM runs at a typical fre-
quency of 25kHz with an approximate typical duty cycle
of 6.25%. PWMEN is used to enable or disable the PWM.
PWMEN is internally pulled up to the digital supply, and
can be left unconnected to enable the internal PWM.
When enabled, the LED pulses are driven by the PWM
to reduce the power dissipation and increase the system
efficiency. Force PWMEN low to disable the internal
PWM; the LED is then driven directly.
Thermal Shutdown
If the MAX5984 die temperature reaches +150NC, an
overtemperature fault is generated and the device shuts
down. The die temperature must cool down below 130NC
to remove the overtemperature fault condition. After a
thermal shutdown condition clears, the device is reset.
Applications Information
Layout Procedure
Careful PCB layout is critical to achieve high efficiency
and low EMI. Follow these layout guidelines for optimal
performance.
1) Place the input bypass capacitance and the output
bypass capacitor (0.1µF ceramic capacitor from
AGND to OUTP) as close as possible to the MAX5984.
2) Use large SMT component pads for power dissipat-
ing devices such as the MAX5984 and the external
diodes in the high-power path.
3) Use short, wide traces whenever possible for high-
power paths.
4) Use the MAX5971 Evaluation Kit as a design and
layout reference.
5) The exposed pad (EP) must be soldered evenly to the
PCB ground plane for proper operation and power
dissipation. Use multiple vias beneath the exposed
pad for maximum heat dissipation. A 1.0mm to
1.2mm pitch is the recommended spacing for these
vias and they should be plated (1oz copper) with a
small barrel diameter (0.30mm to 0.33mm).
Figure 6. Typical Operating Circuit 1 (DC Load Removal Detection, Internal PWM Enabled for LED Indication, and Class 5
Detection Enabled)
1N4448
1kI
1kI
1nF
-54V
5.1kI
LED
10mH1N4448
0.1µF
100V
47µF
100V
-54V
LED
AGND
EN
VEE
VEE_DIG
LEGACY
MIDSPAN
OSC
OUT
OUTP
DET
ILIM1
ILIM2
PWMEN
MAX5984C
0.1µF
100V
SMJ58A 2.2MI
PSE OUTPUT
20 _____________________________________________________________________________________
MAX5984
Single-Port, 40W, IEEE 802.3af/802.3at PSE
Controller with Integrated MOSFET
Figure 7. Typical Operating Circuit 2 (AC Load Removal Detection, Internal PWM Enabled for LED Indication, and Class 5
Detection Enabled)
Figure 8. Typical Operating Circuit 3 (IEEE 802.3at Compliant, Minimal Application Circuit with DC Load Removal Detection and No
LED Indication)
1N4448
S1B
1kI
1kI
1kI
1nF
0.1µF
-54V
5.1kI
LED
10mH1N4448
0.1µF
100V
47µF
100V
0.47FF
100V
-54V
LED
AGND
EN
VEE
VEE_DIG
LEGACY
MIDSPAN
OSC
OUT
OUTP
DET
ILIM1
ILIM2
PWMEN
MAX5984C
0.1µF
100V
SMJ58A 2.2MI
PSE OUTPUT
1N4448
1nF
-54V
AGND
EN
LED
VEE_DIG
VEE
2-EVENT/
LSCEN
LEGACY
MIDSPAN
OSC
OUT
OUTP
DET
ILIM1
ILIM2
MAX5984A/B/D
0.1µF
100V
SMJ58A 2.2MI
47µF
100V
0.1µF
100V
PSE OUTPUT
______________________________________________________________________________________ 21
MAX5984
Single-Port, 40W, IEEE 802.3af/802.3at PSE
Controller with Integrated MOSFET
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maxim-ic.com/packages. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
Chip Information
PROCESS: BiCMOS
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
28 TQFN-EP T2855+6 21-0140 90-0026
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time.
22 Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2011 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
MAX5984
Single-Port, 40W, IEEE 802.3af/802.3at PSE
Controller with Integrated MOSFET
Revision History
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 12/11 Initial release —
