PIC16HV540 Enhanced PIC16C54 EPROM-Based 8-Bit CMOS Microcontroller With On-Chip Voltage Regulator High-Performance RISC CPU: Device Pins I/O Pin Configurations EPROM RAM RA2 *1 18 RA1 RA3 2 17 RA0 T0CKI 3 16 OSC1/CLKIN MCLR/VPP 4 15 OSC2/CLKOUT VSS 5 14 VDD 13 RB7 12 RB6 RB0 6 RB1 7 RB2 8 11 RB5 RB3 9 10 RB4 *1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 SSOP RA2 RA3 T0CKI MCLR/VPP VSS VSS RB0 RB1 RB2 RB3 PIC16HV540 Peripheral Features: * 8-bit real time clock/counter (TMR0) with 8-bit programmable prescaler * Power-On Reset (POR) * Brown-Out Protection * Device Reset Timer (DRT) with short RC-oscillator start up time * Programmable Watchdog Timer (WDT) with its own on-chip RC oscillator for reliable operation * Sleep Timer * 8 High Voltage I/O * 4 Regulated I/O * Wake up from SLEEP on pin change * Programmable code-protection * Power saving SLEEP mode * Selectable oscillator options: - RC: Low-cost RC oscillator - XT: Standard crystal/resonator - HS: High speed crystal/resonator - LP: Power saving, low frequency crystal * Glitch filtering on MCLR and pin change inputs PDIP, SOIC, Windowed CERDIP PIC16HV540 PIC16HV540 18 12 512 25 * Only 33 single word instructions to learn * All instructions are single cycle (200 ns) except for program branches which are two-cycle * Operating speed: DC - 20 MHz clock input DC - 200 ns instruction cycle * 12-bit wide instructions * 8-bit wide data path * Seven special function hardware registers * Four-level deep hardware stack * Direct, indirect and relative addressing modes for data and instructions RA1 RA0 OSC1/CLKIN OSC2/CLKOUT VDD VDD RB7 RB6 RB5 RB4 CMOS Technology: * Selectable on-chip 3V/5V Regulator * Low-power, high-speed CMOS EPROM technology * Fully static design * Wide-operating voltage range: - 3.5V to 15V * Temperature range: - Commercial: 0C to 70C - Industrial: -40C to 85C * Low-power consumption - < 2 mA typical @ 5V, 4 MHz - 15 A typical @ 3V, 32 kHz - < 4.5 A typical standby current @ 15V (with WDT disabled), 0C to 70C = Enhanced Features 1998 Microchip Technology Inc. Preliminary DS40197A-page 1 PIC16HV540 1.0 GENERAL DESCRIPTION The PIC16HV540 from Microchip Technology is a low-cost, high-performance, 8-bit, fully-static, EPROM-based CMOS microcontroller. It is pin and software compatible with the PIC16C5X family of devices. It employs a RISC architecture with only 33 single word/single cycle instructions. All instructions are single cycle except for program branches which take two cycles. The PIC16HV540 delivers performance an order of magnitude higher than its competitors in the same price category. The 12-bit wide instructions are highly orthogonal resulting in 2:1 code compression over other 8-bit microcontrollers in its class. The easy-to-use and easy-to-remember instruction set reduces development time significantly. The PIC16HV540 is the first One-Time-Programmable (OTP) microcontroller with an on-chip 3 Volt and 5 Volt regulator. This eliminates the need for an external regulator in many applications powered from 9 Volt or 12 Volt batteries or unregulated 6 Volt, 9 Volt or 12 Volt mains adapters. The PIC16HV540 is ideally suited for applications that require very low standby current at high voltages. These typically require expensive low current regulators. The PIC16HV540 is equipped with special features that reduce system cost and power requirements. The Power-On Reset (POR) and Device Reset Timer (DRT) eliminate the need for external reset circuitry. There are four oscillator configurations to choose from, including the power-saving LP (Low Power) oscillator, cost saving RC oscillator, and XT and HS for crystal oscillators. Power saving SLEEP mode, Watchdog Timer and code protection features improve system cost, power and reliability. The UV erasable CERDIP packaged versions are ideal for code development, while the cost-effective OTP versions are suitable for production in any volume. The customer can take full advantage of Microchip's price leadership in OTP microcontrollers while benefiting from the OTP's flexibility. The PIC16HV540 will in future be supported by a full-featured macro assembler, a software simulator, an in-circuit emulator, a `C' compiler, fuzzy logic support tools, a low-cost development programmer, and a full featured programmer. All the tools are supported on IBM PC and compatible machines. Functions that correspond to the PIC16C54 (such as assembly and programming) can utilize existing tools. 1.1 Applications The PIC16HV540 fits perfectly in low-power battery applications such as CO and smoke detection, toys, games, security systems and automobile modules. The EPROM technology makes customizing of application programs (transmitter codes, receiver frequencies, etc.) extremely fast and convenient. The small footprint package, for through hole or surface mounting, make this microcontroller perfect for applications with space limitations. Low-cost, low-power, high-performance, ease of use and I/O flexibility make the PIC16HV540 very versatile even in areas where no microcontroller use has been considered before (e.g., timer functions, replacement of "glue" logic in larger systems, coprocessor applications). DS40197A-page 2 1.2 Enhanced Features 1.2.1 REGULATED I/O PORTA INDEPENDENT OF CORE REGULATOR PORTA I/O pads and OSC2 output are powered by the regulated internal voltage VIO. A maximum of 10mA per output is allowed, or a total of 40mA. The core itself is powered from the independently regulated supply VREG. 1.2.2 HIGH VOLTAGE I/O PORTB All eight PORTB I/Os are high voltage I/O. The inputs will tolerate input voltages as high as the VDD and outputs will swing from VSS to the VDD. The input threshold voltages vary with supply voltage. (See DC characteristics.) 1.2.3 WAKE UP ON PIN CHANGE ON PORTB [0:3] Four of the PORTB inputs latch the status of the pin at the onset of sleep mode. A level change on the inputs resets the device, implementing wake up on pin change (via warm reset). The PC bit in the status register is reset to indicate that a pin change caused the reset condition. Any pin change (glitch insensitive) of the opposite level of the initial value wakes up the device. This option can be enabled/disabled in OPTION2 register. (See OPTION2 register, Figure 4-3.) 1.2.4 WAKE UP ON PIN CHANGE WITH A SLOWLY-RISING VOLTAGE ON PORTB [7] PORTB [7] also implements wake up from sleep, however this input is specifically adapted so that a slowly rising voltage does not cause excessive power consumption. This input can be used with external RC circuits for long sleep periods without using the internal timer and prescaler. This option is also enabled/disabled in OPTION2 register. (The enable/disable bit is shared with the other 4 wake up inputs.) The new wake up status bit in the status register is also shared with the other four wake up inputs. 1.2.5 LOW-VOLTAGE (BROWN-OUT) DETECTION A low voltage (Brown-out) detect circuit optionally resets the device at a voltage level higher than that at which Brown-out events occur. The nominal trip voltages are 3.1 Volt (for 5 Volt operation) and 2.2 Volt (for 3 Volt operation), respectively. The core remains in the reset state as long as this condition holds (as if a MCLR external reset was given). The Brown-out trip level is user selectable, with built-in interlocks. The Brown-out detector is disabled at power-up and is activated by clearing the appropriate bit (BE) in OPTION2 register. 1.2.6 INCREASED STACK DEPTH The stack depth is 4 levels to allow modular program implementation by using functions and subroutines. Preliminary 1998 Microchip Technology Inc. PIC16HV540 1.2.7 ENHANCED WATCHDOG TIMER (WDT) OPERATION The WDT is enabled by setting FUSE 2 in the configuration word. The WDT setting is latched and the fuse disabled during SLEEP mode to reduce current consumption. If the WDT is disabled by FUSE 2, it can be enabled/disabled under program control using bit 4 in OPTION2 (SWE). The software WDT control is disabled at power-up. 2.0 PIC16HV540 DEVICE VARIETIES A variety of frequency ranges and packaging options are available. When placing orders, please use the PIC16HV540 Product Identification System at the back of this data sheet to specify the correct part number. 2.1 UV Erasable Devices The current consumption of the on-chip oscillator (used for the watchdog, oscillator startup timer and sleep timer) is less than 1A (typical) at 3 Volt operation. The UV erasable versions, offered in CERDIP packages, are optimal for prototype development and pilot programs. 1.2.8 UV erasable devices can be programmed for any of the four oscillator configurations. Microchip's PICSTART and PRO MATE programmers both support programming of the PIC16HV540. Third party programmers also are available; refer to Literature Number DS00104 for a list of sources. REDUCED EXTERNAL RC OSCILLATOR STARTUP TIME If the RC oscillator option is selected in the Configuration word (FOSC1=1 and FOSCO=1) the oscillator startup time is 1.0 ms nominal instead of 18 ms nominal. This is applicable after power-up (POR), either WDT interrupt or wake-up, external reset on MCLR, WPC (wake on pin change) and Brown-out. 1.2.9 LOW-VOLTAGE OPERATION OF THE ENTIRE CPU DURING SLEEP The voltage regulator can automatically lower the voltage to the core from 5 Volt to 3 Volt during sleep, resulting in reduced current consumption. This is an option bit in OPTION2 register. 1.2.10 GLITCH FILTERS ON WAKEUP PINS AND MCLR Glitch sensitive inputs for wakeup on pin change are filtered to reduce susceptibility to interference. A similar filter reduces false reset on MCLR. 1.2.11 PROGRAMMABLE CLOCK GENERATOR When used in RC mode the CLKOUT pin can be used as a programmable clock output. The output is connected to TMR0, bit 0 and by setting the prescaler, clock out frequencies of CLKIN/8 to CLKIN/1024 can be generated. The CLKOUT pin can also be used as a general purpose output by modifying to TMR0, bit 0. TABLE 1-1: PIC16HV540 DEVICE PIC16HV540 Clock Maximum Frequency (MHz) 20 Memory EPROM Program Memory 512 RAM Data Memory (bytes) Peripherals Timer Module(s) Packages I/O Pins One-Time-Programmable (OTP) Devices The availability of OTP devices is especially useful for customers expecting frequent code changes and updates. The OTP devices, packaged in plastic packages, permit the user to program them once. In addition to the program memory, the configuration bits must be programmed. 2.3 Quick-Turnaround-Production (QTP) Devices Microchip offers a QTP Programming Service for factory production orders. This service is made available for users who choose not to program a medium to high quantity of units and whose code patterns have stabilized. The devices are identical to the OTP devices but with all EPROM locations and configuration bit options already programmed by the factory. Certain code and prototype verification procedures apply before production shipments are available. Please contact your Microchip Technology sales office for more details. 2.4 Serialized Quick-Turnaround-Production (SQTP) Devices Microchip offers the unique programming service where a few user-defined locations in each device are programmed with different serial numbers. The serial numbers may be random, pseudo-random or sequential. 25 TMR0 12 Voltage Range (Volts) 3.5V-15V Number of Instructions 33 Packages 2.2 18-pin DIP SOIC 20-pin SSOP Serial programming allows each device to have a unique number which can serve as an entry code, password or ID number. All PICmicro devices have Power-on Reset, selectable WDT, selectable code protect and high I/O current capability. 1998 Microchip Technology Inc. Preliminary DS40197A-page 3 PIC16HV540 3.0 ARCHITECTURAL OVERVIEW This section provides information on the architecture of the PIC16HV540. For information on operation of the peripherals, electrical specifications, etc., please refer to the PIC16C5X data sheet (DS30453). FIGURE 3-1: PIC16HV540 BLOCK DIAGRAM VDD 3V/5V Regulator VREG RB7 4 RB3 : RB0 FILTER BOD RL/SL PC (PIN CHANGE) BL/BE WPC 9-11 9-11 EPROM 512 X 12 SWE (OPTION2 REGISTER) T0CKI PIN STACK 1 CONFIGURATION WORD STACK 2 PC "DISABLE" STACK 3 12 WATCHDOG STACK 4 INSTRUCTION REGISTER 9 12 WDT TIME OUT "CODE PROTECT" 2 OSCILLATOR/ TIMING & CONTROL CLKOUT WDT/TMR0 PRESCALER 8 "SLEEP" INSTRUCTION DECODER DIRECT ADDRESS 6 6 OPTION2 OPTION "TRIS 7" FROM W "OPTION" FROM W 5 DIRECT RAM ADDRESS LITERALS 8 OSC1 OSC2 MCLR "OSC SELECT" 5-7 STATUS TMR0 GENERAL PURPOSE REGISTER FILE (SRAM) 25 Bytes FSR 8 W DATA BUS ALU 8 FROM W 4 4 "TRIS 5" TRISA PORTA 8 "TRIS 6" 4 3V/5V Regulator VIO FROM W RA3:RA0 TRISB 8 PORT 8 HIGH VOLTAGE TRANSLATION 8 RB7:RB0 DS40197A-page 4 Preliminary 1998 Microchip Technology Inc. PIC16HV540 TABLE 3-1: Name PINOUT DESCRIPTION - PIC16HV540 DIP, SOIC SSOP I/O/P Input No. No. Type Levels RA0 RA1 RA2 RA3 RB0 RB1 RB2 RB3 RB4 RB5 RB6 RB7 17 18 1 2 6 7 8 9 10 11 12 13 19 20 1 2 7 8 9 10 11 12 13 14 I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O TTL TTL TTL TTL TTL TTL TTL TTL TTL TTL TTL TTL T0CKI 3 3 I ST MCLR/VPP 4 4 I ST OSC1/CLKIN OSC2/CLKOUT 16 15 18 17 I O ST -- VDD 14 15,16 P -- VSS 5 5,6 P -- Legend: I = input, O = output, I/O = input/output, P = power, -- = Not Used, TTL = TTL input, ST = Schmitt Trigger input 1998 Microchip Technology Inc. Description Independently regulated Bi-directional I/O port -- VIO High-voltage Bi-directional I/O port. Sourced from VDD. Wake up on pin change. Wake up on SLOW rising pin change. Clock input to Timer 0. Must be tied to VSS or VDD, if not in use, to reduce current consumption. Master clear (reset) input/programming voltage input. This pin is an active low reset to the device. Voltage on the MCLR/VPP pin must not exceed VDD to avoid unintended entering of programming mode. Oscillator crystal input/external clock source input. Oscillator crystal output. Connects to crystal or resonator in crystal oscillator mode. In RC mode, OSC2 pin outputs CLKOUT which has 1/4 the frequency of OSC1, and denotes the instruction cycle rate. Positive supply. Ground reference. Preliminary DS40197A-page 5 PIC16HV540 4.0 MEMORY ORGANIZATION FIGURE 4-1: FIGURE 4-2: PIC16HV540 PROGRAM MEMORY MAP AND STACK File Address PC<8:0> 9 CALL, RETLW Stack Level 1 Stack Level 2 Stack Level 3 Stack Level 4 000h User Memory Space PIC16HV540 REGISTER FILE MAP 00h INDF(1) 01h TMR0 02h PCL 03h STATUS 04h FSR 05h PORTA 06h PORTB TRISA TRISB 07h On-chip Program Memory 0FFh 100h Reset Vector 1FFh OPTION2 08h 0Fh 10h General Purpose Registers 1Fh Note 1: TABLE 4-1: Address Not a physical register. SPECIAL FUNCTION REGISTER SUMMARY Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on Power-On Reset Value on MCLR and WDT Reset N/A TRIS I/O control registers (TRISA, TRISB) 1111 1111 1111 1111 N/A OPTION Contains control bits to configure Timer0 and Timer0/WDT prescaler --11 1111 --11 1111 N/A OPTION2 Contains control bits to configure pin changes, software enabled WDT, regulation and brown-out 00h INDF 01h TMR0 02h(1) PCL 1111 xx11 1111 Uses contents of FSR to address data memory (not a physical register) xxxx xxxx uuuu uuuu 8-bit real-time clock/counter xxxx xxxx uuuu uuuu Low order 8 bits of PC 1111 1111 1111 1111 1001 1xxx 100q quuu PCF PA1 PA0 TO PD Z DC 03h STATUS 04h FSR 05h PORTA -- -- -- -- RA3 RA2 RA1 06h PORTB RB7 RB6 RB5 RB4 RB3 RB2 RB1 C Indirect data memory address pointer xx11 1xxx xxxx 1uuu uuuu RA0 ---- xxxx ---- uuuu RB0 xxxx xxxx uuuu uuuu Legend: Shaded boxes = unimplemented or unused, - = unimplemented, read as '0' (if applicable) x = unknown, u = unchanged, q = value depends on condition. Note 1: The upper byte of the Program Counter is not directly accessible. See Section 4.5 of the PIC16C5X data sheet (DS30453) for an explanation of how to access these bits. 2: File address 07h is a general purpose register on the PIC16HV540. 3: PCF This bit is set to 1 after power up-reset (POR) or sleep command. 4: PCF This bit is set to 0 after a wake up on pin change event. DS40197A-page 6 Preliminary 1998 Microchip Technology Inc. PIC16HV540 Figure 4-3: U-0 bit7 OPTION2 REGISTER (TRIS 07h) U-0 6 W-1 WPC 5 W-1 SWE 4 W-1 RL 3 W-1 SL 2 W-1 BL 1 W-1 BE 0 W = Writable bit U = Unimplemented bit -n = Value at POR reset bit 7-6: Unimplemented. bit 5: WPC: Wake up on pin change 1 = Disabled 0 = Enabled bit 4: SWE: Software WDT enable 1 = Disabled 0 = Enabled bit 3: RL: Regulated voltage level select bit 1 = 5 Volt 0 = 3 Volt bit 2: SL: Sleep voltage level select bit 1 = RL bit setting 0 = 3 Volt bit 1: BL: Brown-out voltage level select bit 1 = RL bit setting, but SL during sleep 0 = 3 Volt bit 0: BE: Brown-out enabled 1 = Disabled 0 = Enabled 1998 Microchip Technology Inc. Preliminary DS40197A-page 7 PIC16HV540 5.0 INSTRUCTION SET SUMMARY Each PIC16HV540 instruction is a 12-bit word divided into an OPCODE, which specifies the instruction type, and one or more operands which further specify the operation of the instruction. The PIC16HV540 instruction set summary in Table 5-2 groups the instructions into byte-oriented, bit-oriented, and literal and control operations. Table 5-1 shows the opcode field descriptions. For byte-oriented instructions, 'f' represents a file register designator and 'd' represents a destination designator. The file register designator is used to specify which one of the 32 file registers is to be used by the instruction. All instructions are executed within one single instruction cycle, unless a conditional test is true or the program counter is changed as a result of an instruction. In this case, the execution takes two instruction cycles. One instruction cycle consists of four oscillator periods. Thus, for an oscillator frequency of 4 MHz, the normal instruction execution time is 1 s. If a conditional test is true or the program counter is changed as a result of an instruction, the instruction execution time is 2 s. Figure 5-1 shows the three general formats that the instructions can have. All examples in the figure use the following format to represent a hexadecimal number: The destination designator specifies where the result of the operation is to be placed. If 'd' is '0', the result is placed in the W register. If 'd' is '1', the result is placed in the file register specified in the instruction. where 'h' signifies a hexadecimal digit. For bit-oriented instructions, 'b' represents a bit field designator which selects the number of the bit affected by the operation, while 'f' represents the number of the file in which the bit is located. Byte-oriented file register operations 0xhhh FIGURE 5-1: 11 OPCODE FIELD DESCRIPTIONS Field 11 OPCODE b k Bit address within an 8-bit file register Literal field, constant data or label x Don't care location (= 0 or 1) The assembler will generate code with x = 0. It is the recommended form of use for compatibility with all Microchip software tools. TOS PC WDT TO PD dest [ ] ( ) <> italics 4 0 f (FILE #) d = 0 for destination W d = 1 for destination f f = 5-bit file register address Description Register file address (0x00 to 0x7F) Working register (accumulator) label 5 d Bit-oriented file register operations f W d 6 OPCODE For literal and control operations, 'k' represents an 8 or 9-bit constant or literal value. TABLE 5-1: GENERAL FORMAT FOR INSTRUCTIONS 8 7 5 4 b (BIT #) f (FILE #) 0 b = 3-bit bit address f = 5-bit file register address Literal and control operations (except GOTO) Destination select; d = 0 (store result in W) d = 1 (store result in file register 'f') Default is d = 1 Label name 11 8 7 OPCODE 0 k (literal) k = 8-bit immediate value Literal and control operations - GOTO instruction 11 9 8 OPCODE Top of Stack Program Counter Watchdog Timer Counter 0 k (literal) k = 9-bit immediate value Time-Out bit Power-Down bit Destination, either the W register or the specified register file location Options Contents Assigned to Register bit field In the set of User defined term (font is courier) DS40197A-page 8 Preliminary 1998 Microchip Technology Inc. PIC16HV540 TABLE 5-2: INSTRUCTION SET SUMMARY 12-Bit Opcode Mnemonic, Operands ADDWF ANDWF CLRF CLRW COMF DECF DECFSZ INCF INCFSZ IORWF MOVF MOVWF NOP RLF RRF SUBWF SWAPF XORWF f,d f,d f - f, d f, d f, d f, d f, d f, d f, d f - f, d f, d f, d f, d f, d Description Cycles MSb Add W and f AND W with f Clear f Clear W Complement f Decrement f Decrement f, Skip if 0 Increment f Increment f, Skip if 0 Inclusive OR W with f Move f Move W to f No Operation Rotate left f through Carry Rotate right f through Carry Subtract W from f Swap f Exclusive OR W with f LSb Status Affected Notes 1 1 1 1 1 1 1(2) 1 1(2) 1 1 1 1 1 1 1 1 1 0001 0001 0000 0000 0010 0000 0010 0010 0011 0001 0010 0000 0000 0011 0011 0000 0011 0001 11df 01df 011f 0100 01df 11df 11df 10df 11df 00df 00df 001f 0000 01df 00df 10df 10df 10df ffff ffff ffff 0000 ffff ffff ffff ffff ffff ffff ffff ffff 0000 ffff ffff ffff ffff ffff C,DC,Z Z Z Z Z Z None Z None Z Z None None C C C,DC,Z None Z 1,2,4 2,4 4 1 1 1 (2) 1 (2) 0100 0101 0110 0111 bbbf bbbf bbbf bbbf ffff ffff ffff ffff None None None None 2,4 2,4 1 2 1 2 1 1 1 2 1 1 1 1110 1001 0000 101k 1101 1100 0000 1000 0000 0000 1111 kkkk kkkk 0000 kkkk kkkk kkkk 0000 kkkk 0000 0000 kkkk kkkk kkkk 0100 kkkk kkkk kkkk 0010 kkkk 0011 0fff kkkk Z None TO, PD None Z None None None TO, PD None Z 2,4 2,4 2,4 2,4 2,4 2,4 1,4 2,4 2,4 1,2,4 2,4 2,4 BIT-ORIENTED FILE REGISTER OPERATIONS BCF BSF BTFSC BTFSS f, b f, b f, b f, b Bit Clear f Bit Set f Bit Test f, Skip if Clear Bit Test f, Skip if Set LITERAL AND CONTROL OPERATIONS ANDLW CALL CLRWDT GOTO IORLW MOVLW OPTION RETLW SLEEP TRIS XORLW k k k k k k k k - f k AND literal with W Call subroutine Clear Watchdog Timer Unconditional branch Inclusive OR Literal with W Move Literal to W Load OPTION register Return, place Literal in W Go into standby mode Load TRIS register Exclusive OR Literal to W 1 3 Note 1: The 9th bit of the program counter will be forced to a '0' by any instruction that writes to the PC except for GOTO. (See individual device data sheets, Memory Section/Indirect Data Addressing, INDF and FSR Registers) 2: When an I/O register is modified as a function of itself (e.g. MOVF PORTB, 1), the value used will be that value present on the pins themselves. For example, if the data latch is '1' for a pin configured as input and is driven low by an external device, the data will be written back with a '0'. 3: The instruction TRIS f, where f = 5 or 6 causes the contents of the W register to be written to the tristate latches of PORTA or B respectively. A '1' forces the pin to a hi-impedance state and disables the output buffers. 4: If this instruction is executed on the TMR0 register (and, where applicable, d = 1), the prescaler will be cleared (if assigned to TMR0). 1998 Microchip Technology Inc. Preliminary DS40197A-page 9 PIC16HV540 ADDWF Add W and f Syntax: [ label ] ADDWF ANDWF AND W with f Syntax: Operands: [ label ] ANDWF 0 f 31 d [0,1] Operands: 0 f 31 d [0,1] Operation: (W) + (f) (dest) Operation: (W) .AND. (f) (dest) f,d Status Affected: C, DC, Z Encoding: 0001 f,d Status Affected: Z 11df Encoding: ffff 0001 01df ffff Description: Add the contents of the W register and register 'f'. If 'd' is 0 the result is stored in the W register. If 'd' is '1' the result is stored back in register 'f'. Description: The contents of the W register are AND'ed with register 'f'. If 'd' is 0 the result is stored in the W register. If 'd' is '1' the result is stored back in register 'f'. Words: 1 Words: 1 Cycles: 1 Cycles: 1 Example: ADDWF Example: ANDWF FSR, 0 Before Instruction W = FSR = W = FSR = 0x17 0xC2 After Instruction After Instruction W = FSR = W = FSR = 0xD9 0xC2 ANDLW And literal with W Syntax: [ label ] ANDLW Operands: 0 k 255 Operation: (W).AND. (k) (W) k Status Affected: Z Encoding: Description: kkkk 1 Cycles: 1 Example: ANDLW BCF Bit Clear f Syntax: [ label ] BCF Operands: 0 f 31 0b7 Operation: 0 (f<b>) Encoding: Description: = = DS40197A-page 10 0100 1 Cycles: 1 Example: BCF 0x5F bbbf ffff FLAG_REG, 7 Before Instruction FLAG_REG = 0xC7 0xA3 After Instruction After Instruction W f,b Bit 'b' in register 'f' is cleared. Words: Before Instruction W 0x17 0x02 Status Affected: None kkkk The contents of the W register are AND'ed with the eight-bit literal 'k'. The result is placed in the W register. Words: 1 Before Instruction 0x17 0xC2 1110 FSR, FLAG_REG = 0x47 0x03 Preliminary 1998 Microchip Technology Inc. PIC16HV540 BSF Bit Set f Syntax: [ label ] BSF BTFSS Bit Test f, Skip if Set Syntax: Operands: [ label ] BTFSS f,b 0 f 31 0b7 Operands: 0 f 31 0b<7 Operation: 1 (f<b>) Operation: skip if (f<b>) = 1 f,b Status Affected: None Encoding: Description: Status Affected: None 0101 bbbf Encoding: ffff Description: Bit 'b' in register 'f' is set. Words: 1 Cycles: 1 Example: BSF FLAG_REG, 7 Before Instruction FLAG_REG = 0x0A After Instruction FLAG_REG = 0x8A 0111 Words: 1 Cycles: 1(2) Example: HERE FALSE TRUE BTFSC Bit Test f, Skip if Clear Syntax: [ label ] BTFSC f,b Operands: 0 f 31 0b7 Before Instruction Operation: skip if (f<b>) = 0 After Instruction * * PC Status Affected: None Encoding: Description: 0110 bbbf bbbf ffff If bit 'b' in register 'f' is 0 then the next instruction is skipped. ffff If bit 'b' in register 'f' is '1' then the next instruction is skipped. If bit 'b' is '1', then the next instruction fetched during the current instruction execution, is discarded and an NOP is executed instead, making this a 2 cycle instruction. If FLAG<1> PC if FLAG<1> PC BTFSS GOTO * FLAG,1 PROCESS_CODE = address (HERE) = = = = 0, address (FALSE); 1, address (TRUE) If bit 'b' is 0 then the next instruction fetched during the current instruction execution is discarded, and an NOP is executed instead, making this a 2 cycle instruction. Words: 1 Cycles: 1(2) Example: HERE FALSE TRUE BTFSC GOTO FLAG,1 PROCESS_CODE * * * Before Instruction PC = address (HERE) = = = = 0, address (TRUE); 1, address(FALSE) After Instruction if FLAG<1> PC if FLAG<1> PC 1998 Microchip Technology Inc. Preliminary DS40197A-page 11 PIC16HV540 CALL Subroutine Call CLRW Clear W Syntax: [ label ] CALL k Syntax: [ label ] CLRW Operands: 0 k 255 Operands: None Operation: (PC) + 1 Top of Stack; k PC<7:0>; (STATUS<6:5>) PC<10:9>; 0 PC<8> Operation: 00h (W); 1Z Status Affected: Z Encoding: Status Affected: None Encoding: Description: 1001 kkkk kkkk Subroutine call. First, return address (PC+1) is pushed onto the stack. The eight bit immediate address is loaded into PC bits <7:0>. The upper bits PC<10:9> are loaded from STATUS<6:5>, PC<8> is cleared. CALL is a two cycle instruction. 1 Cycles: 2 Example: Words: 1 Cycles: 1 Example: HERE CALL CLRW W address (HERE) address (THERE) address (HERE + 1) CLRF Clear f Syntax: [ label ] CLRF Operands: 0 f 31 Operation: 00h (f); 1Z f 0000 1 Cycles: 1 Example: CLRF Clear Watchdog Timer [ label ] CLRWDT Operands: None Operation: 00h WDT; 0 WDT prescaler (if assigned); 1 TO; 1 PD Encoding: Description: 011f ffff 1 Cycles: 1 Example: 0x5A = = 0x00 1 DS40197A-page 12 0000 0100 CLRWDT Before Instruction FLAG_REG = 0000 The CLRWDT instruction resets the WDT. It also resets the prescaler, if the prescaler is assigned to the WDT and not Timer0. Status bits TO and PD are set. Words: WDT counter = ? After Instruction WDT counter WDT prescale TO PD After Instruction FLAG_REG Z 0x00 1 Syntax: Before Instruction FLAG_REG = = Status Affected: TO, PD The contents of register 'f' are cleared and the Z bit is set. Words: 0x5A CLRWDT Status Affected: Z Encoding: = THERE After Instruction Description: 0000 Before Instruction W Z Before Instruction PC = TOS = 0100 The W register is cleared. Zero bit (Z) is set. After Instruction Words: PC = 0000 Description: Preliminary = = = = 0x00 0 1 1 1998 Microchip Technology Inc. PIC16HV540 COMF Complement f Syntax: [ label ] COMF DECFSZ Decrement f, Skip if 0 Syntax: Operands: [ label ] DECFSZ f,d 0 f 31 d [0,1] Operands: 0 f 31 d [0,1] Operation: (f) (dest) Operation: (f) - 1 d; f,d Status Affected: Z Encoding: Description: 0010 01df Encoding: ffff The contents of register 'f' are complemented. If 'd' is 0 the result is stored in the W register. If 'd' is 1 the result is stored back in register 'f'. Words: 1 Cycles: 1 Example: COMF = REG1,0 0x13 After Instruction REG1 W = = Description: Words: 1 Cycles: 1(2) Example: HERE 0x13 0xEC DECF Decrement f Syntax: [ label ] DECF f,d 0 f 31 d [0,1] Operation: (f) - 1 (dest) Description: Words: PC CNT if CNT PC if CNT PC 11df 1 1 Example: DECF CNT, Before Instruction CNT Z = = = = CNT, 1 LOOP = address (HERE) = = = = CNT - 1; 0, address (CONTINUE); 0, address (HERE+1) GOTO Unconditional Branch Syntax: [ label ] Operands: 0 k 511 Operation: k PC<8:0>; STATUS<6:5> PC<10:9> 1 GOTO k Status Affected: None 0x01 0 After Instruction CNT Z DECFSZ GOTO CONTINUE * * * ffff Decrement register 'f'. If 'd' is 0 the result is stored in the W register. If 'd' is 1 the result is stored back in register 'f'. Cycles: ffff Before Instruction Status Affected: Z 0000 11df After Instruction Operands: Encoding: 0010 The contents of register 'f' are decremented. If 'd' is 0 the result is placed in the W register. If 'd' is 1 the result is placed back in register 'f'. If the result is 0, the next instruction, which is already fetched, is discarded and an NOP is executed instead making it a two cycle instruction. Before Instruction REG1 skip if result = 0 Status Affected: None Encoding: 101k kkkk kkkk Description: GOTO is an unconditional branch. The 9-bit immediate value is loaded into PC bits <8:0>. The upper bits of PC are loaded from STATUS<6:5>. GOTO is a two cycle instruction. Words: 1 Cycles: 2 Example: GOTO THERE 0x00 1 After Instruction PC = 1998 Microchip Technology Inc. Preliminary address (THERE) DS40197A-page 13 PIC16HV540 INCF Increment f IORLW Inclusive OR literal with W Syntax: [ label ] Syntax: [ label ] Operands: 0 f 31 d [0,1] Operands: 0 k 255 Operation: (f) + 1 (dest) (W) .OR. (k) (W) Operation: INCF f,d Status Affected: Z Status Affected: Z Encoding: Description: 10df ffff 1 Cycles: 1 INCF CNT, = = kkkk kkkk The contents of the W register are OR'ed with the eight bit literal 'k'. The result is placed in the W register. Words: 1 Cycles: 1 Example: IORLW 0x35 Before Instruction 1 W Before Instruction CNT Z 1101 Description: The contents of register 'f' are incremented. If 'd' is 0 the result is placed in the W register. If 'd' is 1 the result is placed back in register 'f'. Words: Example: Encoding: 0010 IORLW k = 0x9A After Instruction 0xFF 0 W Z = = 0xBF 0 After Instruction CNT Z = = 0x00 1 INCFSZ Increment f, Skip if 0 Syntax: [ label ] Operands: 0 f 31 d [0,1] Operation: Description: [ label ] Operands: 0 f 31 d [0,1] Operation: (W).OR. (f) (dest) IORWF f,d Status Affected: Z Encoding: Description: Status Affected: None 0011 Inclusive OR W with f Syntax: INCFSZ f,d (f) + 1 (dest), skip if result = 0 Encoding: IORWF 11df ffff The contents of register 'f' are incremented. If 'd' is 0 the result is placed in the W register. If 'd' is 1 the result is placed back in register 'f'. If the result is 0, then the next instruction, which is already fetched, is discarded and an NOP is executed instead making it a two cycle instruction. 0001 00df ffff Inclusive OR the W register with register 'f'. If 'd' is 0 the result is placed in the W register. If 'd' is 1 the result is placed back in register 'f'. Words: 1 Cycles: 1 Example: IORWF RESULT, 0 Before Instruction RESULT = W = 0x13 0x91 After Instruction Words: 1 Cycles: 1(2) Example: HERE INCFSZ GOTO CONTINUE * * * CNT, LOOP 1 RESULT = W = Z = 0x13 0x93 0 Before Instruction PC = address (HERE) After Instruction CNT if CNT PC if CNT PC DS40197A-page 14 = = = = CNT + 1; 0, address (CONTINUE); 0, address (HERE +1) Preliminary 1998 Microchip Technology Inc. PIC16HV540 MOVF Move f Syntax: [ label ] Operands: 0 f 31 d [0,1] Operation: (f) (dest) MOVF f,d 0010 Description: Move W to f Syntax: [ label ] Operands: 0 f 31 Operation: (W) (f) Encoding: 00df ffff Description: The contents of register 'f' is moved to destination 'd'. If 'd' is 0, destination is the W register. If 'd' is 1, the destination is file register 'f'. 'd' is 1 is useful to test a file register since status flag Z is affected. 1 Cycles: 1 Example: MOVF 0000 001f 1 Cycles: 1 Example: MOVWF TEMP_REG W FSR, TEMP_REG = = 0xFF 0x4F = = 0x4F 0x4F After Instruction 0 TEMP_REG W value in FSR register NOP No Operation MOVLW Move Literal to W Syntax: [ label ] Syntax: [ label ] Operands: None Operands: 0 k 255 Operation: No operation Operation: k (W) Status Affected: None MOVLW k Status Affected: None Encoding: 1100 Description: Words: ffff Move data from the W register to register 'f'. Words: After Instruction = f Before Instruction Words: W MOVWF Status Affected: None Status Affected: Z Encoding: MOVWF Encoding: kkkk Description: kkkk 0000 Words: 1 Cycles: 1 1 Example: NOP 1 Example: MOVLW 0000 0000 No operation. The eight bit literal 'k' is loaded into the W register. The don't cares will assemble as 0s. Cycles: NOP 0x5A After Instruction W = 0x5A 1998 Microchip Technology Inc. Preliminary DS40197A-page 15 PIC16HV540 OPTION Load OPTION Register RLF Rotate Left f through Carry Syntax: [ label ] Syntax: [ label ] RLF Operands: None Operands: Operation: (W) OPTION 0 f 31 d [0,1] Operation: See description below OPTION Status Affected: None Encoding: 0000 Description: 0000 0010 Status Affected: C The content of the W register is loaded into the OPTION register. Words: 1 Cycles: 1 Example Encoding: Description: OPTION 0011 = After Instruction 0x07 RETLW Return with Literal in W Syntax: [ label ] Operands: 0 k 255 Operation: k (W); TOS PC Words: 1 Cycles: 1 Example: RLF Encoding: 1000 RETLW k kkkk REG1 C REG1 W C 1 Cycles: 2 Example: CALL TABLE ;W contains ;table offset ;value. * ;W now has table * ;value. * ADDWF PC ;W = offset RETLW k1 ;Begin table RETLW k2 ; * * * RETLW kn ; End of table W = = = = = 1110 0110 1100 1100 1 RRF Rotate Right f through Carry Syntax: [ label ] Operands: 0 f 31 d [0,1] Operation: See description below RRF f,d Status Affected: C Encoding: Description: 0011 00df ffff The contents of register 'f' are rotated one bit to the right through the Carry Flag. If 'd' is 0 the result is placed in the W register. If 'd' is 1 the result is placed back in register 'f'. C Words: 1 Cycles: 1 Example: RRF register 'f' REG1,0 Before Instruction 0x07 REG1 C After Instruction W 1110 0110 0 kkkk Words: Before Instruction = = After Instruction The W register is loaded with the eight bit literal 'k'. The program counter is loaded from the top of the stack (the return address). This is a two cycle instruction. TABLE REG1,0 Before Instruction Status Affected: None Description: ffff register 'f' C 0x07 OPTION = 01df The contents of register 'f' are rotated one bit to the left through the Carry Flag. If 'd' is 0 the result is placed in the W register. If 'd' is 1 the result is stored back in register 'f'. Before Instruction W f,d value of k8 = = 1110 0110 0 After Instruction REG1 W C DS40197A-page 16 Preliminary = = = 1110 0110 0111 0011 0 1998 Microchip Technology Inc. PIC16HV540 SLEEP Enter SLEEP Mode SUBWF Subtract W from f Syntax: [label] Syntax: [label] Operands: None Operands: Operation: 00h WDT; 0 WDT prescaler; 1 TO; 0 PD 0 f 31 d [0,1] Operation: (f) - (W) (dest) SLEEP Status Affected: C, DC, Z Encoding: Status Affected: TO, PD Encoding: Description: 0000 Description: 0000 0011 Time-out status bit (TO) is set. The power down status bit (PD) is cleared. The WDT and its prescaler are cleared. The processor is put into SLEEP mode with the oscillator stopped. See section on SLEEP for more details. Words: 1 Cycles: 1 Example: SLEEP SUBWF f,d 0000 10df ffff Subtract (2's complement method) the W register from register 'f'. If 'd' is 0 the result is stored in the W register. If 'd' is 1 the result is stored back in register 'f'. Words: 1 Cycles: 1 Example 1: SUBWF REG1, 1 Before Instruction REG1 W C = = = 3 2 ? After Instruction REG1 W C = = = 1 2 1 ; result is positive Example 2: Before Instruction REG1 W C = = = 2 2 ? After Instruction REG1 W C = = = 0 2 1 ; result is zero Example 3: Before Instruction REG1 W C = = = 1 2 ? After Instruction REG1 W C 1998 Microchip Technology Inc. Preliminary = = = FF 2 0 ; result is negative DS40197A-page 17 PIC16HV540 SWAPF Swap Nibbles in f XORLW Exclusive OR literal with W Syntax: [ label ] SWAPF f,d Syntax: [label] Operands: 0 f 31 d [0,1] Operands: 0 k 255 (f<3:0>) (dest<7:4>); (f<7:4>) (dest<3:0>) Operation: Operation: (W) .XOR. k (W) Status Affected: Z Encoding: Status Affected: None Encoding: Description: 0011 10df 1111 Description: ffff kkkk kkkk The contents of the W register are XOR'ed with the eight bit literal 'k'. The result is placed in the W register. The upper and lower nibbles of register 'f' are exchanged. If 'd' is 0 the result is placed in W register. If 'd' is 1 the result is placed in register 'f'. Words: 1 Cycles: 1 Words: 1 Example: XORLW Cycles: 1 Example SWAPF 0xAF Before Instruction REG1, W 0 = = 0xB5 After Instruction Before Instruction REG1 XORLW k W 0xA5 = 0x1A After Instruction REG1 W = = 0xA5 0X5A XORWF Exclusive OR W with f Syntax: [ label ] XORWF Operands: 0 f 31 d [0,1] Operation: (W) .XOR. (f) (dest) TRIS Load TRIS Register Syntax: [ label ] TRIS Operands: f = 5, 6 or 7 Status Affected: Z Operation: (W) TRIS register f Encoding: f Status Affected: None Encoding: Description: 0000 Description: 0000 0fff TRIS register 'f' (f = 5, 6, or 7) is loaded with the contents of the W register 0001 1 Words: 1 Cycles: 1 Cycles: 1 Example XORWF TRIS PORTA Before Instruction W = = 0XA5 REG W = = 0xAF 0xB5 After Instruction 0XA5 REG W DS40197A-page 18 REG,1 Before Instruction After Instruction TRISA ffff Exclusive OR the contents of the W register with register 'f'. If 'd' is 0 the result is stored in the W register. If 'd' is 1 the result is stored back in register 'f'. Words: Example 10df f,d Preliminary = = 0x1A 0xB5 1998 Microchip Technology Inc. PIC16HV540 6.0 PIC16HV540 DEVICE VARIETIES 6.3 A variety of frequency ranges and packaging options are available. Depending on application and production requirements, the proper device option can be selected using the information in this section. When placing orders, please use the PIC16HV540 Product Identification System at the back of this data sheet to specify the correct part number. For the PIC16HV540 family of devices, there is one device type, as indicated in the device number: 1. 6.1 HV, as in PIC16HV540A. Refer to PIC16C5X data sheet (DS30453A) for an explanation of how to access these bits. These devices have EPROM program memory and operate over the standard voltage range of 3.5 to 13 volts. UV Erasable Devices The UV erasable versions, offered in CERDIP packages, are optimal for prototype development and pilot programs UV erasable devices can be programmed for any of the four oscillator configurations. Microchip's PICSTART and PRO MATE programmers both support programming of the PIC16HV540. Third party programmers also are available; refer to the Third Party Guide for a list of sources. 6.2 Quick-Turnaround-Production (QTP) Devices Microchip offers a QTP Programming Service for factory production orders. This service is made available for users who choose not to program a medium to high quantity of units and whose code patterns have stabilized. The devices are identical to the OTP devices but with all EPROM locations and configuration bit options already programmed by the factory. Certain code and prototype verification procedures apply before production shipments are available. Please contact your Microchip Technology sales office for more details. 6.4 Serialized Quick-Turnaround-Production (SQTP SM) Devices Microchip offers the unique programming service where a few user-defined locations in each device are programmed with different serial numbers. The serial numbers may be random, pseudo-random or sequential. Serial programming allows each device to have a unique number which can serve as an entry code, password or ID number. One-Time-Programmable (OTP) Devices The availability of OTP devices is especially useful for customers expecting frequent code changes and updates. The OTP devices, packaged in plastic packages, permit the user to program them once. In addition to the program memory, the configuration bits must be programmed. 1998 Microchip Technology Inc. Preliminary DS40197A-page 19 PIC16HV540 7.0 ELECTRICAL CHARACTERISTICS - PIC16HV540 Absolute Maximum Ratings Ambient temperature under bias .............................................................................................................. .-20C to +85C Storage temperature ............................................................................................................................. - 65C to +150C Voltage on VDD with respect to VSS ................................................................................................................... 0 to +16V Voltage on MCLR with respect to VSS(2) ........................................................................................................... 0 to +14V Voltage on all other pins with respect to VSS................................................................................... -0.6V to (VDD + 0.6V) Total power dissipation(1)..................................................................................................................................... 800 mW Max. current out of VSS pin................................................................................................................................... 150 mA Max. current into VDD pin...................................................................................................................................... 100 mA Max. current into an input pin (T0CKI only)......................................................................................................................500 A Input clamp current, IIK (VI < 0 or VI > VDD)......................................................................................................................20 mA Output clamp current, IOK (V0 < 0 or V0 > VDD)...............................................................................................................20 mA Max. output current sunk by any I/O pin................................................................................................................. 25 mA Max. output current sourced by any I/O pin............................................................................................................ 10 mA Max. output current sourced by a single I/O port (PORTA or B)............................................................................. 40 mA Max. output current sunk by a single I/O port (PORTA or B).................................................................................. 50 mA Note 1: Power dissipation is calculated as follows: Pdis = VDD x {IDD - IOH} + {(VDD-VOH) x IOH} + (VOL x IOL) Note 2: Voltage spikes below VSS at the MCLR pin, inducing currents greater than 80mA, may cause latch-up. Thus, a series resistor of 50-100 should be used when applying a "low" level to the MCLR pin rather than pulling this pin directly to VSS NOTICE: Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. DS40197A-page 20 Preliminary 1998 Microchip Technology Inc. PIC16HV540 7.1 DC Characteristics: PIC16HV540-04, 20 (Commercial) PIC16HV540-04I, 20I (Industrial) Standard Operating Conditions (unless otherwise specified) Operating Temperature 0C TA +70C (commercial) -40C TA +85C (industrial) DC Characteristics Power Supply Pins Characteristic Sym Min Typ(1) Max Units Conditions Supply Voltage HS, XT, RC and LP options VDD RAM Data Retention Voltage(2) VDR 1.5* V Device in SLEEP mode VDD start voltage to ensure Power-On Reset VPOR VSS V See section on Power-On Reset for details VDD rise rate to ensure Power-On Reset SVDD Supply Current(3) HS, XT and RC(4) options LP option, Commercial IDD Power Down Current(5)(6) Commercial IPD 3.5 Industrial 15 0.05 VDD V V/ms See section on Power-On Reset for details 0.5 11 27 mA A FOSC = 4.0 MHz, VDD = 15V FOSC = 32 kHz, VDD = 15V, WDT disabled 4 0.25 5 0.3 12 4.0 14 5.0 A A A A VDD = 15V, sleep timer enabled VDD = 15V, sleep timer disabled VDD = 15V, sleep timer enabled VDD = 15V, sleep timer disabled Brown-Out Detector Threshold V 3.1 V 5V Core Brown-Out Detector Threshold V 2.2 V 3V Core * These parameters are characterized but not tested. Note 1: Data in the Typical ("Typ") column is based on characterization results at 25C. This data is for design guidance only and is not tested. 2: This is the limit to which VDD can be lowered in SLEEP mode without losing RAM data. 3: The supply current is mainly a function of the operating voltage and frequency. Other factors such as bus loading, oscillator type, bus rate, internal code execution pattern, and temperature also have an impact on the current consumption. a) The test conditions for all IDD measurements in active operation mode are: OSC1 = external square wave, from rail-to-rail; all I/O pins tristated, pulled to Vss, T0CKI = VDD, MCLR = VDD; WDT enabled/disabled as specified. b) For standby current measurements, the conditions are the same, except that the device is in SLEEP mode. 4: Does not include current through Rext. The current through the resistor can be estimated by the formula: IR = VDD/2Rext (mA) with Rext in k. 5: The power down current in SLEEP mode does not depend on the oscillator type. Power down current is measured with the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to VDD or VSS. 6: The oscillator start-up time can be as much as 8 seconds for XT and LP oscillator selection, if the SLEEP mode is exited or during initial power-up. 1998 Microchip Technology Inc. Preliminary DS40197A-page 21 PIC16HV540 7.2 DC Characteristics: PIC16HV540-04, 20 (Commercial) PIC16HV540-04I, 20I (Industrial) Standard Operating Conditions (unless otherwise specified) Operating Temperature 0C TA +70C (commercial) -40C TA +85C (industrial) DC Characteristics All Pins Except Power Supply Pins Characteristic Sym Input Low Voltage I/O Ports PORTA MCLR (Schmitt Trigger) T0CKI (Schmitt Trigger) OSC1 (Schmitt Trigger) OSC1 I/O Ports PORTB VIL Input High Voltage I/O Ports PORTA MCLR (Schmitt Trigger) T0CKI (Schmitt Trigger) OSC1 (Schmitt Trigger) OSC1 I/O Ports PORTB VIH Hysteresis of Schmitt Trigger inputs VHYS Units VSS VSS VSS VSS VSS VSS 0.15 VIO 0.15 VIO 0.15 VIO 0.15 VIO 0.3 VIO TBD V V V V V V Pin at hi-impedance 0.25 VIO+0.8V 0.85 VIO 0.85 VIO 0.85 VIO 0.7 VIO TBD VIO VDD VDD VDD VIO TBD V V V V V V For all VIO(5) 0.15 VIO* Input Leakage Current(3) IIL I/O Ports -1.0 MCLR -5.0 -3.0 -3.0 T0CKI OSC1 Typ(1) Max Min 0.5 0.5 0.5 0.5 I/O ports RC option only(4) XT and LP options HS, XT and LP options +1.0 A +5.0 +3.0 +3.0 A A A A 0.6 V 0.6 V 0.6 V VSS VPIN VDD, Pin at hi-impedance VPIN = VSS +0.25V(2) VPIN = VDD(2) VSS VPIN VDD VSS VPIN VDD, HS, XT and LP options Sleep mode, WPC enabled VOL OSC2/CLKOUT PORT B Output High Voltage I/O Ports(3) PORTA RC option only(4) HS, XT and LP options V TBD RB7 Output Low Voltage I/O Ports PORTA Conditions VDD = 15V, VIO = 5V, IOL = 8.7 mA VDD = 15V, VIO = 5V, IOL = 5 mA VDD = 15V, VIO = 5V, IOL = 2.8 mA VDD = 15V, VIO = 5V, IOL = 1.5 mA RC option only VDD = 15V, IOL = 8.7 mA, VIO = 5V VOH VIO-0.7 V OSC2/CLKOUT VIO-0.7 V I/O Ports VDD-0.7 V VDD = 15V, VIO = 3V, IOH = -2 mA VDD = 15V, VIO = 5V, IOH = -5.4 mA VDD = 15V, VIO = 3V, IOH =-0.5 mA VDD = 15V, VIO = 5V, IOH = -1.0 mA RC option only VDD = 15V, IOH = -8 mA, VIO = 5V V Slowly rising input detect level PORTB Threshold Voltage I/O Ports PORTB [7] VLEV TBD VDD-1.0 TBD * These parameters are characterized but not tested. Note 1: Data in the Typical ("Typ") column is based on characterization results at 25C. This data is for design guidance only and is not tested. 2: The leakage current on the MCLR/VPP pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions. Higher leakage current may be measured at different input voltage. 3: Negative current is defined as coming out of the pin. 4: For the RC option, the OSC1/CLKIN pin is a Schmitt Trigger input. It is not recommended that the PIC16HV540 be driven with external clock in RC mode. 5: The user may use the better of the two specifications. DS40197A-page 22 Preliminary 1998 Microchip Technology Inc. PIC16HV540 7.3 Timing Parameter Symbology and Load Conditions The timing parameter symbols have been created following one of the following formats: 1. TppS2ppS 2. TppS T F Frequency Lowercase subscripts (pp) and their meanings: pp 2 to ck CLKOUT cy cycle time drt device reset timer io I/O port Uppercase letters and their meanings: S F Fall H High I Invalid (Hi-impedance) L Low FIGURE 7-1: T Time mc osc os t0 wdt MCLR oscillator OSC1 T0CKI watchdog timer P R V Z Period Rise Valid Hi-impedance LOAD CONDITIONS - PIC16HV540 Pin CL = 50 pF for all pins except OSC2 CL VSS 1998 Microchip Technology Inc. 15 pF for OSC2 in XT, HS or LP options when external clock is used to drive OSC1 Preliminary DS40197A-page 23 PIC16HV540 7.4 Timing Diagrams and Specifications FIGURE 7-2: EXTERNAL CLOCK TIMING - PIC16HV540 Q4 Q1 Q3 Q2 Q4 Q1 OSC1 1 3 3 4 4 2 CLKOUT TABLE 7-1: EXTERNAL CLOCK TIMING REQUIREMENTS - PIC16HV540 AC Characteristics Parameter No. Sym FOSC Standard Operating Conditions (unless otherwise specified) Operating Temperature 0C TA +70C (commercial), -40C TA +85C (industrial) Characteristic External CLKIN Frequency(2) Oscillator Frequency(2) 1 TOSC External CLKIN Period(2) Oscillator Period(2) 2 3 4 TCY Instruction Cycle Time(3) TosL, TosH Clock in (OSC1) Low or High Time TosR, TosF Clock in (OSC1) Rise or Fall Time Min Typ(1) Max Units DC -- 4.0 MHz RC osc mode DC -- 20 MHz HS osc mode DC -- 4.0 MHz XT osc mode DC -- 200 kHz LP osc mode DC -- 4.0 MHz RC osc mode 0.1 -- 20 MHz HS osc mode 0.1 -- 4.0 MHz XT osc mode 5 -- 200 kHz LP osc mode 250 -- -- ns RC osc mode 250 -- -- ns HS osc mode 250 -- -- ns XT osc mode 5.0 -- -- s LP osc mode 250 -- -- ns RC osc mode 250 -- 10,000 ns HS osc mode 250 -- 10,000 ns XT osc mode 5.0 -- 200 s LP osc mode -- 4/FOSC -- -- 50 -- -- ns HS osc mode XT oscillator Conditions 50* -- -- ns 2.0* -- -- s LP oscillator -- -- 25* ns HS osc mode -- -- 25* ns XT oscillator -- -- 50* ns LP oscillator * These parameters are characterized but not tested. Note 1: Data in the Typical ("Typ") column is at VIO = 5V, VDD = 9V, 25C unless otherwise stated. These parameters are for design guidance only and are not tested. 2: All specified values are based on characterization data for that particular oscillator type under standard operating conditions with the device executing code. Exceeding these specified limits may result in an unstable oscillator operation and/or higher than expected current consumption. When an external clock input is used, the "max" cycle time limit "DC" (no clock) for all devices. 3: Instruction cycle period (TCY) equals four times the input oscillator time base period. DS40197A-page 24 Preliminary 1998 Microchip Technology Inc. PIC16HV540 FIGURE 7-3: CLKOUT AND I/O TIMING - PIC16HV540 Q1 Q4 Q2 Q3 OSC1 10 11 CLKOUT 13 14 19 12 18 16 I/O Pin (input) 15 17 I/O Pin (output) New Value Old Value 20, 21 Note: All tests must be done with specified capacitive loads 50 pF on I/O pins and CLKOUT. TABLE 7-2: CLKOUT AND I/O TIMING REQUIREMENTS - PIC16HV540 AC Characteristics Parameter No. Sym Standard Operating Conditions (unless otherwise specified) Operating Temperature 0C TA +70C (commercial), -40C TA +85C (industrial). Characteristic Min Typ(1) Max Units 15 30** ns TosH2ckL OSC1 to CLKOUT(2) -- 11 TosH2ckH OSC1 to CLKOUT(2) -- 15 30** ns 12 TckR CLKOUT rise time(2) -- 5.0 15** ns 13 TckF CLKOUT fall time(2) -- 5.0 15** ns 14 TckL2ioV CLKOUT to Port out valid(2) -- -- 40** ns 15 TioV2ckH Port in valid before CLKOUT(2) 0.25 TCY+30* -- -- ns 16 TckH2ioI Port in hold after CLKOUT(2) 0* -- -- ns 17 TosH2ioV OSC1 (Q1 cycle) to Port out valid(3) -- -- 100* ns 18 TosH2ioI OSC1 (Q2 cycle) to Port input invalid (I/O in hold time) TBD -- -- ns 19 TioV2osH Port input valid to OSC1 (I/O in setup time) TBD -- -- ns 20 TioR Port output rise time(3) -- 10 25** ns 21 TioF Port output fall time(3) -- 10 25** ns 10 * These parameters are characterized but not tested. ** These parameters are design targets and are not tested. No characterization data available at this time. Note 1: Data in the Typical ("Typ") column is at VIO = 5V, VDD = 9V, 25C unless otherwise stated. These parameters are for design guidance only and are not tested. 2: Measurements are taken in RC Mode where CLKOUT output is 4 x TOSC. 3: See Figure 7-1 for loading conditions. 1998 Microchip Technology Inc. Preliminary DS40197A-page 25 PIC16HV540 FIGURE 7-4: RESET, WATCHDOG TIMER, AND DEVICE RESET TIMER TIMING - PIC16HV540 VDD MCLR 30 Internal POR 32 32 32 DRT Time-out Internal RESET Watchdog Timer RESET 31 34 34 I/O pin (Note 1) Note 1: I/O pins must be taken out of hi-impedance mode by enabling the output drivers in software. TABLE 7-3: RESET, WATCHDOG TIMER, AND DEVICE RESET TIMER - PIC16HV540 AC Characteristics Standard Operating Conditions (unless otherwise specified) Operating Temperature 0C TA +70C (commercial) -40C TA +85C (industrial) Parameter No. Sym Characteristic 30 TmcL MCLR Pulse Width (low) Min Typ(1) Max Units -- 2 -- s Conditions VDD = 15V, VIO = 5V 31 Twdt Watchdog Timer Time-out Period 9.0* 18* 40* ms VDD = 15V, VIO = 5V 32 TDRT Device Reset Timer Period 9.0* 0.55* 18* 1.1* 30* 2.5 ms VDD = 15V, VIO = 5V, RC mode 34 TioZ I/O Hi-impedance from MCLR Low -- -- 100* ns -- Tpc Pin Change Pulse Width -- 2 -- s * These parameters are characterized but not tested. Note 1: Data in the Typical ("Typ") column is at VIO = 5V, VDD = 9V, 25C unless otherwise stated. These parameters are for design guidance only and are not tested. DS40197A-page 26 Preliminary 1998 Microchip Technology Inc. PIC16HV540 FIGURE 7-5: TIMER0 CLOCK TIMINGS - PIC16HV540 T0CKI 40 41 42 TABLE 7-4: TIMER0 CLOCK REQUIREMENTS - PIC16HV540 AC Characteristics Standard Operating Conditions (unless otherwise specified) Operating Temperature 0C TA +70C (commercial) -40C TA +85C (industrial) Parameter Sym Characteristic No. 40 Min Tt0H T0CKI High Pulse Width - No Prescaler - With Prescaler 41 Tt0L T0CKI Low Pulse Width - No Prescaler - With Prescaler 42 Tt0P T0CKI Period Typ(1) Max Units Conditions 0.5 TCY + 20* -- -- ns 10* -- -- ns 0.5 TCY + 20* -- -- ns 10* -- -- ns 20 or TCY + 40* N -- -- ns Whichever is greater. N = Prescale Value (1, 2, 4,..., 256) * These parameters are characterized but not tested. Note 1: Data in the Typical ("Typ") column is at 3.8V, 25C unless otherwise stated. These parameters are for design guidance only and are not tested. 1998 Microchip Technology Inc. Preliminary DS40197A-page 27 PIC16HV540 8.0 DC AND AC CHARACTERISTICS PIC16HV540 The graphs and tables provided in this section are for design guidance and are not tested or guaranteed. In some graphs or tables the data presented are outside specified operating range (e.g., outside specified VDD range). This is for information only and devices will operate properly only within the specified range. The data presented in this section is a statistical summary of data collected on units from different lots over a period of time. "Typical" represents the mean of the distribution while "max" or "min" represents (mean + 3) and (mean - 3) respectively, where is standard deviation. Not available at this time. DS40197A-page 28 Preliminary 1998 Microchip Technology Inc. PIC16HV540 9.0 PACKAGING INFORMATION Package Type: K04-007 18-Lead Plastic Dual In-line (P) - 300 mil E D 2 n 1 E1 A1 A R L c A2 B1 p B eB Units Dimension Limits PCB Row Spacing Number of Pins Pitch Lower Lead Width Upper Lead Width Shoulder Radius Lead Thickness Top to Seating Plane Top of Lead to Seating Plane Base to Seating Plane Tip to Seating Plane Package Length Molded Package Width Radius to Radius Width Overall Row Spacing Mold Draft Angle Top Mold Draft Angle Bottom INCHES* NOM 0.300 18 0.100 0.013 0.018 0.055 0.060 0.000 0.005 0.005 0.010 0.110 0.155 0.075 0.095 0.000 0.020 0.125 0.130 0.890 0.895 0.245 0.255 0.230 0.250 0.310 0.349 5 10 5 10 MIN n p B B1 R c A A1 A2 L D E E1 eB MAX 0.023 0.065 0.010 0.015 0.155 0.115 0.020 0.135 0.900 0.265 0.270 0.387 15 15 MILLIMETERS NOM MAX 7.62 18 2.54 0.33 0.46 0.58 1.40 1.52 1.65 0.00 0.13 0.25 0.13 0.25 0.38 2.79 3.94 3.94 1.91 2.41 2.92 0.00 0.51 0.51 3.18 3.30 3.43 22.61 22.73 22.86 6.22 6.48 6.73 5.84 6.35 6.86 7.87 8.85 9.83 5 10 15 5 10 15 MIN * Controlling Parameter. Dimension "B1" does not include dam-bar protrusions. Dam-bar protrusions shall not exceed 0.003" (0.076 mm) per side or 0.006" (0.152 mm) more than dimension "B1." Dimensions "D" and "E" do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010" (0.254 mm) per side or 0.020" (0.508 mm) more than dimensions "D" or "E." 1998 Microchip Technology Inc. Preliminary DS40197A-page 29 PIC16HV540 Package Type: K04-051 18-Lead Plastic Small Outline (SO) - Wide, 300 mil E1 p E D 2 B 1 n X 45 L R2 c A R1 Units Dimension Limits Pitch Number of Pins Overall Pack. Height Shoulder Height Standoff Molded Package Length Molded Package Width Outside Dimension Chamfer Distance Shoulder Radius Gull Wing Radius Foot Length Foot Angle Radius Centerline Lead Thickness Lower Lead Width Mold Draft Angle Top Mold Draft Angle Bottom L1 A2 INCHES* NOM 0.050 18 0.099 0.093 0.058 0.048 0.008 0.004 0.456 0.450 0.296 0.292 0.407 0.394 0.020 0.010 0.005 0.005 0.005 0.005 0.011 0.016 0 4 0.010 0.015 0.009 0.011 0.014 0.017 0 12 0 12 MIN p n A A1 A2 D E E1 X R1 R2 L L1 c B A1 MAX 0.104 0.068 0.011 0.462 0.299 0.419 0.029 0.010 0.010 0.021 8 0.020 0.012 0.019 15 15 MILLIMETERS NOM MAX 1.27 18 2.50 2.36 2.64 1.47 1.22 1.73 0.19 0.10 0.28 11.58 11.43 11.73 7.51 7.42 7.59 10.33 10.01 10.64 0.50 0.25 0.74 0.13 0.13 0.25 0.13 0.13 0.25 0.41 0.28 0.53 0 4 8 0.38 0.25 0.51 0.27 0.23 0.30 0.42 0.36 0.48 0 12 15 0 12 15 MIN * Controlling Parameter. Dimension "B" does not include dam-bar protrusions. Dam-bar protrusions shall not exceed 0.003" (0.076 mm) per side or 0.006" (0.152 mm) more than dimension "B." Dimensions "D" and "E" do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010" (0.254 mm) per side or 0.020" (0.508 mm) more than dimensions "D" or "E." DS40197A-page 30 Preliminary 1998 Microchip Technology Inc. PIC16HV540 Package Type: K04-010 18-Lead Ceramic Dual In-line with Window (JW) - 300 mil E D W2 2 n 1 W1 E1 A R A1 L c A2 eB B1 p B Units Dimension Limits PCB Row Spacing Number of Pins Pitch Lower Lead Width Upper Lead Width Shoulder Radius Lead Thickness Top to Seating Plane Top of Lead to Seating Plane Base to Seating Plane Tip to Seating Plane Package Length Package Width Radius to Radius Width Overall Row Spacing Window Width Window Length MIN n p B B1 R c A A1 A2 L D E E1 eB W1 W2 0.098 0.016 0.050 0.010 0.008 0.175 0.091 0.015 0.125 0.880 0.285 0.255 0.345 0.130 0.190 INCHES* NOM 0.300 18 0.100 0.019 0.055 0.013 0.010 0.183 0.111 0.023 0.138 0.900 0.298 0.270 0.385 0.140 0.200 MAX 0.102 0.021 0.060 0.015 0.012 0.190 0.131 0.030 0.150 0.920 0.310 0.285 0.425 0.150 0.210 MILLIMETERS NOM MAX 7.62 18 2.54 2.49 2.59 0.41 0.47 0.53 1.40 1.27 1.52 0.32 0.25 0.38 0.25 0.20 0.30 4.64 4.83 4.45 2.82 2.31 3.33 0.00 0.57 0.76 3.18 3.49 3.81 22.35 22.86 23.37 7.24 7.56 7.87 6.48 6.86 7.24 8.76 9.78 10.80 0.13 0.15 0.14 0.19 0.21 0.2 MIN * Controlling Parameter. 1998 Microchip Technology Inc. Preliminary DS40197A-page 31 PIC16HV540 Package Type: K04-072 20-Lead Plastic Shrink Small Outine (SS) - 5.30 mm E1 E p D B 2 1 n L R2 c A A1 R1 L1 A2 Units Dimension Limits Pitch Number of Pins Overall Pack. Height Shoulder Height Standoff Molded Package Length Molded Package Width Outside Dimension Shoulder Radius Gull Wing Radius Foot Length Foot Angle Radius Centerline Lead Thickness Lower Lead Width Mold Draft Angle Top Mold Draft Angle Bottom INCHES NOM 0.026 20 0.068 0.073 0.026 0.036 0.002 0.005 0.278 0.283 0.205 0.208 0.301 0.306 0.005 0.005 0.005 0.005 0.015 0.020 4 0 0.000 0.005 0.005 0.007 0.010 0.012 0 5 0 5 MIN p n A A1 A2 D E E1 R1 R2 L L1 c B MAX 0.078 0.046 0.008 0.289 0.212 0.311 0.010 0.010 0.025 8 0.010 0.009 0.015 10 10 MILLIMETERS* NOM MAX 0.65 20 1.99 1.86 1.73 1.17 0.91 0.66 0.21 0.13 0.05 7.33 7.20 7.07 5.38 5.29 5.20 7.78 7.90 7.65 0.13 0.25 0.13 0.25 0.13 0.13 0.64 0.38 0.51 0 4 8 0.25 0.00 0.13 0.22 0.13 0.18 0.38 0.25 0.32 0 5 10 0 5 10 MIN * Controlling Parameter. Dimension "B" does not include dam-bar protrusions. Dam-bar protrusions shall not exceed 0.003" (0.076 mm) per side or 0.006" (0.152 mm) more than dimension "B." Dimensions "D" and "E" do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010" (0.254 mm) per side or 0.020" (0.508 mm) more than dimensions "D" or "E." DS40197A-page 32 Preliminary 1998 Microchip Technology Inc. PIC16HV540 9.1 Package Marking Information 18-Lead PDIP Example PIC16HV540 04I/P456 MMMMMMMMMMMMMMMMM MMMMMMMMMMMMMMMMM AABBCDE 9823CBA 18-Lead SOIC Example MMMMMMMMMMMM MMMMMMMMMMMM MMMMMMMMMMMM AABBCDE PIC16HV540 04I/S0218 9818CDK 18-Lead CERDIP Windowed Example MMMMMMMM MMMMMMMM AABBCDE PIC16HV5 40MMMMMM 9801CBA 20-Lead SSOP Example MMMMMMMMMMM MMMMMMMMMMM AABBCDE Legend: MM...M XX...X AA BB C D E Note: * PIC16HV540 04I/218 9820CBP Microchip part number information Customer specific information* Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Facility code of the plant at which wafer is manufactured O = Outside Vendor C = 5" Line S = 6" Line H = 8" Line Mask revision number Assembly code of the plant or country of origin in which part was assembled In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information. Standard OTP marking consists of Microchip part number, year code, week code, facility code, mask rev#, and assembly code. For OTP marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. 1998 Microchip Technology Inc. Preliminary DS40197A-page 33 PIC16HV540 ON-LINE SUPPORT Systems Information and Upgrade Hot Line Microchip provides on-line support on the Microchip World Wide Web (WWW) site. The web site is used by Microchip as a means to make files and information easily available to customers. To view the site, the user must have access to the Internet and a web browser, such as Netscape or Microsoft Explorer. Files are also available for FTP download from our FTP site. The Systems Information and Upgrade Line provides system users a listing of the latest versions of all of Microchip's development systems software products. Plus, this line provides information on how customers can receive any currently available upgrade kits.The Hot Line Numbers are: 1-800-755-2345 for U.S. and most of Canada, and 1-602-786-7302 for the rest of the world. Connecting to the Microchip Internet Web Site The Microchip web site is available by using your favorite Internet browser to attach to: www.microchip.com The file transfer site is available by using an FTP service to connect to: ftp://ftp.futureone.com/pub/microchip The web site and file transfer site provide a variety of services. Users may download files for the latest Development Tools, Data Sheets, Application Notes, User's Guides, Articles and Sample Programs. A variety of Microchip specific business information is also available, including listings of Microchip sales offices, distributors and factory representatives. Other data available for consideration is: * Latest Microchip Press Releases * Technical Support Section with Frequently Asked Questions * Design Tips * Device Errata * Job Postings * Microchip Consultant Program Member Listing * Links to other useful web sites related to Microchip Products * Conferences for products, Development Systems, technical information and more * Listing of seminars and events DS40197A-page 34 Trademarks: The Microchip name, logo, PIC, PICSTART, MPLAB, PICmicro and PRO MATE are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip in the U.S.A. All other trademarks mentioned herein are the property of their respective companies. Preliminary 1998 Microchip Technology Inc. PIC16HV540 PIC16HV540 Product Identification System To order or to obtain information, e.g., on pricing or delivery, please use the listed part numbers, and refer to the factory or the listed sales offices. PIC16HV540 -XX X /XX XXX Pattern: 3-Digit Pattern Code for QTP (blank otherwise) Package: P SO SS JW = = = = Temperature Range: I = 0C to +70C = -40C to +85C Frequency Range: 04 20 = 4 MHz (XT, RC and LP oscs) = 20 MHz (HS osc) Device: PIC16HV540: V PICHV540: (Tape and Reel) PDIP SOIC (Gull Wing, 300 mil body) SSOP (209 mil) Windowed CERDIP Examples: a) PIC16HV540 - 04/P 301 = Commercial temp., PDIP package, 4 MHz, QTP pattern #301 b) PIC16HV540 - 04I/SO = Industrial temp., SOIC package, 4 MHz Sales and Support Products supported by a preliminary Data Sheet may possibly have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1.Your local Microchip sales office (see below) 2.The Microchip Corporate Literature Center U.S. FAX: (602) 786-7277 3.The Microchip Worldwide Web Site at www.microchip.com Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. For latest version information and upgrade kits for Microchip Development Tools, please call 1-800-755-2345 or 1-602-786-7302. 1998 Microchip Technology Inc. Preliminary DS40197A-page 35 WORLDWIDE SALES AND SERVICE AMERICAS AMERICAS (continued) Corporate Office Toronto Singapore Microchip Technology Inc. 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-786-7200 Fax: 480-786-7277 Technical Support: 480-786-7627 Web Address: http://www.microchip.com Microchip Technology Inc. 5925 Airport Road, Suite 200 Mississauga, Ontario L4V 1W1, Canada Tel: 905-405-6279 Fax: 905-405-6253 Microchip Technology Singapore Pte Ltd. 200 Middle Road #07-02 Prime Centre Singapore 188980 Tel: 65-334-8870 Fax: 65-334-8850 Atlanta Microchip Asia Pacific Unit 2101, Tower 2 Metroplaza 223 Hing Fong Road Kwai Fong, N.T., Hong Kong Tel: 852-2-401-1200 Fax: 852-2-401-3431 Microchip Technology Inc. 500 Sugar Mill Road, Suite 200B Atlanta, GA 30350 Tel: 770-640-0034 Fax: 770-640-0307 Boston Microchip Technology Inc. 5 Mount Royal Avenue Marlborough, MA 01752 Tel: 508-480-9990 Fax: 508-480-8575 Chicago Microchip Technology Inc. 333 Pierce Road, Suite 180 Itasca, IL 60143 Tel: 630-285-0071 Fax: 630-285-0075 Dallas Microchip Technology Inc. 4570 Westgrove Drive, Suite 160 Addison, TX 75248 Tel: 972-818-7423 Fax: 972-818-2924 Dayton Microchip Technology Inc. Two Prestige Place, Suite 150 Miamisburg, OH 45342 Tel: 937-291-1654 Fax: 937-291-9175 Detroit Microchip Technology Inc. Tri-Atria Office Building 32255 Northwestern Highway, Suite 190 Farmington Hills, MI 48334 Tel: 248-538-2250 Fax: 248-538-2260 Los Angeles Microchip Technology Inc. 18201 Von Karman, Suite 1090 Irvine, CA 92612 Tel: 949-263-1888 Fax: 949-263-1338 New York Microchip Technology Inc. 150 Motor Parkway, Suite 202 Hauppauge, NY 11788 Tel: 631-273-5305 Fax: 631-273-5335 San Jose Microchip Technology Inc. 2107 North First Street, Suite 590 San Jose, CA 95131 Tel: 408-436-7950 Fax: 408-436-7955 ASIA/PACIFIC Hong Kong ASIA/PACIFIC (continued) Taiwan, R.O.C Microchip Technology Taiwan 10F-1C 207 Tung Hua North Road Taipei, Taiwan, ROC Tel: 886-2-2717-7175 Fax: 886-2-2545-0139 EUROPE Beijing United Kingdom Microchip Technology, Beijing Unit 915, 6 Chaoyangmen Bei Dajie Dong Erhuan Road, Dongcheng District New China Hong Kong Manhattan Building Beijing 100027 PRC Tel: 86-10-85282100 Fax: 86-10-85282104 Arizona Microchip Technology Ltd. 505 Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 5TU Tel: 44 118 921 5858 Fax: 44-118 921-5835 India Denmark Microchip Technology Inc. India Liaison Office No. 6, Legacy, Convent Road Bangalore 560 025, India Tel: 91-80-229-0061 Fax: 91-80-229-0062 Microchip Technology Denmark ApS Regus Business Centre Lautrup hoj 1-3 Ballerup DK-2750 Denmark Tel: 45 4420 9895 Fax: 45 4420 9910 Japan France Microchip Technology Intl. Inc. Benex S-1 6F 3-18-20, Shinyokohama Kohoku-Ku, Yokohama-shi Kanagawa 222-0033 Japan Tel: 81-45-471- 6166 Fax: 81-45-471-6122 Arizona Microchip Technology SARL Parc d'Activite du Moulin de Massy 43 Rue du Saule Trapu Batiment A - ler Etage 91300 Massy, France Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Korea Germany Microchip Technology Korea 168-1, Youngbo Bldg. 3 Floor Samsung-Dong, Kangnam-Ku Seoul, Korea Tel: 82-2-554-7200 Fax: 82-2-558-5934 Arizona Microchip Technology GmbH Gustav-Heinemann-Ring 125 D-81739 Munchen, Germany Tel: 49-89-627-144 0 Fax: 49-89-627-144-44 Shanghai Arizona Microchip Technology SRL Centro Direzionale Colleoni Palazzo Taurus 1 V. Le Colleoni 1 20041 Agrate Brianza Milan, Italy Tel: 39-039-65791-1 Fax: 39-039-6899883 Microchip Technology RM 406 Shanghai Golden Bridge Bldg. 2077 Yan'an Road West, Hong Qiao District Shanghai, PRC 200335 Tel: 86-21-6275-5700 Fax: 86 21-6275-5060 Italy 11/15/99 Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999. The Company's quality system processes and procedures are QS-9000 compliant for its PICmicro(R) 8-bit MCUs, KEELOQ(R) code hopping devices, Serial EEPROMs and microperipheral products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001 certified. All rights reserved. (c) 1999 Microchip Technology Incorporated. Printed in the USA. 11/99 Printed on recycled paper. Information contained in this publication regarding device applications and the like is intended for suggestion only and may be superseded by updates. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip's products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights. The Microchip logo and name are registered trademarks of Microchip Technology Inc. in the U.S.A. and other countries. All rights reserved. All other trademarks mentioned herein are the property of their respective companies. 1999 Microchip Technology Inc.