Wide Bandwidth
Yaw Rate Gyroscope with SPI
Data Sheet ADIS16060
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2008–2012 Analog Devices, Inc. All rights reserved.
FEATURES
Complete angular rate digital gyroscope
14-bit resolution
Scalable measurement range
Initial range: ±80°/sec (typical)
Increase range with external resistor
Z-axis (yaw rate) response
SPI digital output interface
High vibration rejection over wide frequency
2000 g-powered shock survivability
1 kHz bandwidth
Selectable using external capacitor
Externally controlled self-test
Internal temperature sensor output
Dual auxiliary 14-bit ADC inputs
Absolute rate output for precision applications
5 V single-supply operation
8.2 mm × 8.2 mm × 5.2 mm package
−40°C to +105°C operation
RoHS compliant
APPLICATIONS
Platform stabilization
Image stabilization
Guidance and control
Inertial measurement units
Robotics
GENERAL DESCRIPTION
The ADIS16060 is a yaw rate gyroscope with an integrated
serial peripheral interface (SPI). It features an externally
selectable bandwidth response and scalable dynamic range.
The SPI port provides access to the rate sensor, an internal
temperature sensor, and two external analog signals (using
internal ADC). The digital data available at the SPI port is
proportional to the angular rate about the axis that is normal
to the top surface of the package.
An additional output pin provides a precision voltage reference.
A digital self-test function electromechanically excites the sensor
to test the operation of the sensor and the signal-conditioning
circuits.
The ADIS16060 is available in an 8.2 mm × 8.2 mm × 5.2 mm,
16-terminal, peripheral land grid array (LGA) package.
FUNCTIONAL BLOCK DIAGRAM
Figure 1.
RATE
SENSOR
SCLK
FILT RATE
GND
ADIS16060
DIN
DOUT
MSEL1
MUX
MSEL2
14-BIT
ADC DIGITAL
CONTROL
AIN1
AIN2
07103-001
V
CC
TEMPERATURE
SENSOR
ADIS16060 Data Sheet
Rev. A | Page 2 of 12
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Timing Specifications .................................................................. 5
Absolute Maximum Ratings ............................................................ 6
ESD Caution .................................................................................. 6
Pin Configuration and Function Descriptions ............................. 7
Typical Performance Characteristics ............................................. 8
Theory of Operation ........................................................................ 9
Analog-to-Digital Converter Input ............................................ 9
Rate Sensitive Axis ....................................................................... 9
Basic Operation .............................................................................. 10
Serial Peripheral Interface (SPI) ............................................... 10
Output Data Formatting ............................................................ 10
ADC Conversion ........................................................................ 10
Applications Information .............................................................. 11
Supply And Common Considerations .................................... 11
Setting Bandwidth ...................................................................... 11
Increasing Measurement Range ............................................... 11
Dynamic Digital Sensitivity Scaling ........................................ 11
Temperature Measurements ..................................................... 11
Self-Test Function ...................................................................... 11
Outline Dimensions ....................................................................... 12
Ordering Guide .......................................................................... 12
REVISION HISTORY
4/12—Rev. 0 to Rev. A
Updated Format .................................................................. Universal
Changes to Applications Section .................................................... 1
Changes to Note 1 in Figure 4 ......................................................... 7
Changes to Supply and Common Considerations Section,
Setting Bandwidth Section, and Figure 14 Caption ................... 11
1/08—Revision 0: Initial Version
Data Sheet ADIS16060
Rev. A | Page 3 of 12
SPECIFICATIONS
TA = 25°C, VCC = 5 V, angular rate = 0°/sec, COUT = 0.01 μF, ±1 g, unless otherwise noted.
Table 1.
Parameter Test Conditions/Comments Min1 Typ Max Unit
SENSITIVITY
Dynamic Range2 Full-scale range over specifications range ±50 ±80 °/sec
Initial Clockwise rotation is positive output,
TA = −40°C to +85°C
0.0110 0.0122 0.0134 °/sec/LSB
Change Over Temperature3 VCC = 4.75 V to 5.25 V ±3 %
Nonlinearity Best fit straight line 0.1 °/sec
NULL
Initial Nominal 0°/sec output is 8192 LSB −44 +44 °/sec
Change Over Temperature3 VCC = 4.75 V to 5.25 V ±0.11 °/sec/°C
Turn-On Time
Power on to ±0.5°/sec of final value
10
ms
Linear Acceleration Effect Any axis ±0.1 °/sec/g
Voltage Sensitivity VCC = 4.75 V to 5.25 V ±0.5 °/sec/V
NOISE PERFORMANCE
Rate Noise Density @ 25°C 0.04 °/sec/√Hz
FREQUENCY RESPONSE
3 dB Bandwidth (User-Selectable)4 COUT = 0 µF 1 1000 Hz
Sensor Resonant Frequency 14.5 kHz
SELF-TEST RESPONSE
Positive Self-Test5 See Table 5 +6226 LSB
Negative Self-Test5 See Table 5 −6226 LSB
TEMPERATURE SENSOR
Reading at 298 K 7700 8192 8684 LSB
Scale Factor Proportional to absolute temperature 0.034 K/LSB
LOGIC INPUTS
Input High Voltage, VINH 0.7 × VCC V
Input Low Voltage, VINL 0.8 V
Input Current, IIN Typically 10 nA −1 +1 µA
Input Capacitance, CIN (DIN) 8 pF
Input Capacitance, CIN (MSEL1, MSEL2) 5 pF
ANALOG INPUTS For VIN < VCC
Resolution 14 Bits
Integral Nonlinearity Best fit straight line −6 +6 LSB
Differential Nonlinearity No missing codes to 13 bits −1 +6 LSB
Offset Error −10 +10 mV
Offset Error Temperature Drift ±0.3 ppm/°C
Gain Error −40 +40 mV
Gain Error Temperature Drift ±0.3 ppm/°C
Input Voltage Range
0
V
CC
V
Leakage Current 1 nA
DIGITAL OUTPUTS
Output High Voltage, VOH ISOURCE = 500 µA VCC − 0.3 V
Output Low Voltage, VOL ISINK = 500 µA 0.4 V
CONVERSION RATE
Conversion Time 10 µs
Throughput Rate 100 kSPS
ADIS16060 Data Sheet
Rev. A | Page 4 of 12
Parameter Test Conditions/Comments Min1 Typ Max Unit
POWER SUPPLY All at TA = −40°C to +85°C
VCC 4.75 5 5.25 V
VCC Quiescent Supply Current VCC @ 5 V, 50 kSPS sample rate 4.3 6.5 mA
Power Dissipation VCC @ 5 V, 50 kSPS sample rate 22 33 mW
TEMPERATURE RANGE Operation −40 +105 °C
1 All minimum and maximum specifications are guaranteed. Typical specifications are neither tested nor guaranteed.
2 Dynamic range is the maximum full-scale measurement range possible, including output swing range, initial offset, sensitivity, offset drift, and sensitivity drift at 5 V supply.
3 Defined as the output change from ambient to maximum temperature, or ambient to minimum temperature.
4 Frequency at which the response is 3 dB down from dc response. Bandwidth = 1/(2 × π × 200 kΩ × COUT). For COUT = 0.01 μF, bandwidth = 80 Hz.
5 Self-test response varies with temperature.
Data Sheet ADIS16060
Rev. A | Page 5 of 12
TIMING SPECIFICATIONS
TA = 25°C, angular rate = 0°/sec, unless otherwise noted.1
Table 2. Read/Output Sequence
Parameter Figure Reference Symbol Min Typ Max Unit
Serial Clock Frequency 2.9 MHz
Throughput Rate See Figure 2 tCYC 100 kHz
MSEL1 Falling to SCLK Low See Figure 2 tCSD 0 μs
MSEL1 Falling to SCLK Rising See Figure 2 tSUCS 20 ns
SLCK Falling to Data Remains Valid See Figure 2 tHDO 5 16 ns
MSEL1 Rising Edge to DOUT High Impedance See Figure 2 tDIS 14 100 ns
SCLK Falling to Data Valid See Figure 2 tEN 16 50 ns
Acquisition Time See Figure 2 tACQ 400 ns
DOUT Fall Time See Figure 2 tF 11 25 ns
DOUT Rise Time See Figure 2 tR 11 25 ns
Data Setup Time See Figure 3 t5 5 5 ns
SCLK Falling Edge to MSEL2 Rising Edge See Figure 3 t7 0 0 ns
Data Hold Time See Figure 3 t6 4.5 ns
1 Guaranteed by design. All input signals are specified with tR = tF = 5 ns (10% to 90% of VCC) and timed from a voltage level of 1.6 V. The 5 V operating range spans from
4.75 V to 5.25 V.
Timing Diagrams
Figure 2. Serial Interface Timing Diagram—Read/Output Sequence (CPOL = 0, CPHA = 0)
Figure 3. Serial Interface Timing—Input/Configuration Sequence (CPOL = 0, CPHA = 1)
DOUT
SCLK
COMP LE T E CY CL E
POWER DOWN
MSEL1
D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
(MSB) (LSB)
HIGH-Z 0HIGH-Z
0
145
t
CYC
07103-002
NOTE:
A MINIM UM O F 20 CLO CK CY CLES ARE RE Q UIRE D F OR 14-BIT CONV ERS IO N.
t
SUCS
t
CSD
t
EN
t
HDO
t
DIS
t
ACQ
NOTE:
THE LAST EIG HT BITS CLO CKE D IN ARE LAT CHE D WITH THE RIS ING E DGE OF THE M S EL2 LI NE .
DB7
MSEL2
SCLK
DIN DB6 DB5 DB4 DB3 DB2 DB1 DB0
07103-003
t
5
t
6
t
7
ADIS16060 Data Sheet
Rev. A | Page 6 of 12
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Acceleration (Any Axis, Unpowered, 0.5 ms) 2000 g
Acceleration (Any Axis, Powered, 0.5 ms) 2000 g
VCC to GND −0.3 V to +6.0 V
VCC to GND −0.3 V to VCC + 0.3 V
Analog Input Voltage to GND −0.3 V to VCC + 0.3 V
Digital Input Voltage to GND −0.3 V to +7.0 V
Digital Output Voltage to GND −0.3 V to VCC + 0.3 V
Operating Temperature Range
−40°C to +105°C
Storage Temperature Range −65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Drops onto hard surfaces can cause shocks of greater than
2000 g and exceed the absolute maximum rating of the device.
Care should be exercised in handling the device to avoid damage.
ESD CAUTION
Data Sheet ADIS16060
Rev. A | Page 7 of 12
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Figure 4. Pin Configuration
Figure 5. Second-Level Assembly Pad Layout
Table 4. Pin Function Descriptions
Pin No. Mnemonic Type 1 Description
1 DIN I SPI Data Input.
2
SCLK
I
SPI Serial Clock.
3 DOUT O SPI Data Output.
4 NC This pin is not connected internally (see Figure 4).
5 RATE O Buffered Analog Output. Represents the angular rate signal.
6 FILT I External Capacitor Connection to Control Bandwidth.
7 VCC S Power Supply.
8 AIN1 I External Analog Input Channel 1.
9 AIN2 I External Analog Input Channel 2.
10 GND S Ground.
11 GND S Ground.
12 GND S Ground.
13 GND S Ground.
14 VCC S Power Supply.
15 MSEL2 I SPI, Mode Select 2. User for data input functions.
16 MSEL1 I SPI, Mode Select 1. Used for data output functions.
1 I = input; O = output; S = power supply.
NC
DOUT
SCLK
DIN
AIN2
GND
GND
GND
GND
ADIS16060
TOP
“LOOK THROUGH”
VIEW
(Not to Scale)
16 15 14 13
5678
4 3 2 1
910 11 12
PIN 1
INDICATOR
07103-004
NOTES
1. PINS LABELED NC CAN BE ALLOWED TO FLOAT, BUT IT IS BETTER TO CONNECT
THESE PINS TO GROUND. AVOID ROUTING HIGH SPEED SIGNALS THROUGH THESE
PINS BACAUS E NOI S E COUPL ING M AY RE S ULT.
2. THIS IS NOT AN ACTUAL “TOP VIEW,” AS THE PINS ARE NOT VISIBLE FROM THE
TOP. THIS IS A LAYOUT VIEW, WHICH REPRESENTS THE PIN CONFIGURATION, IF
THE PACKAGE IS LOOKED THROUGH FROM THE TOP. THIS CONFIGURATION IS
PROV IDED FOR P CB LAYOUT P URP OSES .
VCC
VCC
AIN1
FILT
RATE
MSEL2
MSEL1
0.6700 BSC
12×
3.6865 BSC
8×
2.5050 BSC
8×
0.5000 BSC
16×
1.000 BSC
16×
5.010 BSC
4×
7.373 BSC
2×
07103-005
ADIS16060 Data Sheet
Rev. A | Page 8 of 12
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 6. Initial Bias Error Distribution, 25°C, VCC = 5 V
Figure 7. Bias Drift Over −40°C to +85°C, VCC = 5 V
Figure 8. Sensitivity Drift vs. Temperature, VCC = 5 V
Figure 9. Positive Self-Test Response vs. Temperature, VCC = 5 V
Figure 10. Negative Self-Test Output Response vs. Temperature, VCC = 5 V
Figure 11. Allen Variance, 25°C, VCC = 5 V
0.18
0
0.02
–44
–40
–36
–32
–28
–24
–20
–16
–12
–8
–4
0
4
8
12
16
20
24
28
32
36
40
44
0.04
0.06
0.08
0.10
0.12
0.14
0.16
PERCENT OF POPULATION (%)
BIAS ( °/sec)
07103-020
0.30
0.25
0.20
0.15
0.10
0.05
0
–0.60
–0.55
–0.50
–0.45
–0.40
–0.35
–0.30
–0.25
–0.20
–0.15
–0.10
–0.05
0
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0.45
0.50
0.55
0.60
PERCENT OF POPULATION (%)
BIAS DRIFT OVER TEMPERATURE (°/sec/°C)
07103-021
–60 60 80 100 1200
SENSITIVI T Y ERROR (%)
TEMPERATURE (°C)
07103-008
0.04
0.03
0.02
0.01
0
–0.01
–0.04
–0.03
–0.02
µ
–40 –20 20 20
µ + 1σ
µ – 1σ
6800
6600
6400
6200
6000
5800
5600
5400
5200
5000
4800–60 –40 –20 20 40 12010080600
DIGITAL RATE OUTPUT RESPONSE (LSB)
TEMPERATURE (°C)
07103-009
–4800
–5000
–5200
–5400
–5600
–5800
–6000
–6200
–6400
–6600
–6800
DIGITAL RATE OUTPUT RESPONSE (LSB)
TEMPERATURE (°C)
07103-010
–60 –40 –20 20 40 12010080600
0.1
0.01
0.001 1100010010
ROOT ALL E N V ARIANCE (°/ sec)
Tau (°C)
07103-011
Data Sheet ADIS16060
Rev. A | Page 9 of 12
THEORY OF OPERATION
The ADIS16060 operates on the principle of a resonator
gyroscope. Two polysilicon sensing structures each contain a
dither frame that is electrostatically driven to resonance. This
generates the necessary velocity element to produce a Coriolis
force while rotating. At two of the outer extremes of each frame,
orthogonal to the dither motion, are movable fingers that are
placed between fixed pickoff fingers to form a capacitive pickoff
structure that senses Coriolis motion.
The resulting signal is fed to a series of gain and demodulation
stages that produce the electrical rate signal output. The rate
signal is then converted to a digital representation of the
output on the SPI pins. The dual-sensor design provides
linear acceleration (vibration, shock) rejection. Fabricating
the sensor with the signal-conditioning electronics preserves
signal integrity in noisy environments.
The electrostatic resonator requires 14 V to 16 V for operation.
Because only 5 V is typically available in most applications, a
charge pump is included on chip. After the demodulation stage,
a single-pole, low-pass filter on the chip is used to limit high
frequency artifacts before final amplification. The frequency
response is dominated by the second low-pass filter, which is
set by adding capacitance across RATE and FILT.
ANALOG-TO-DIGITAL CONVERTER INPUT
Figure 12 shows an equivalent circuit of the input structure of
the ADIS16060 auxiliary ADC.
The two diodes, D1 and D2, provide ESD protection for the
analog inputs, AINx (AIN1 and AIN2). Care must be taken to
ensure that the analog input signal does not exceed the supply
rails by more than 0.3 V, because exceeding this level causes
these diodes to become forward-biased and to start conducting
current. However, these diodes can handle a forward-biased
current of 130 mA maximum. For instance, these conditions
may eventually occur when the input signals exceed either
VCC or GND.
Figure 12. Equivalent Analog Input Circuit
During the acquisition phase, the impedance model for AINx
is a parallel combination of the capacitor CPIN and the network
formed by the series connection of RIN and CIN. CPIN is primarily
the pin capacitance. RIN is typically 600 Ω and is a lumped
component made up of some serial resistors and the on
resistance of the switches. CIN is typically 30 pF and mainly
functions as the ADC sampling capacitor.
During the conversion phase, when the switches are open, the
input impedance is limited to CPIN. RIN and CIN make a 1-pole,
low-pass filter that reduces undesirable aliasing effects and
limits the noise.
When the source impedance of the driving circuit is low, the
ADC input can be driven directly. Large source impedances
significantly affect the ac performance, especially THD. The
dc performances are less sensitive to the input impedance.
RATE SENSITIVE AXIS
Figure 13. Rate Signal Increases with Clockwise Rotation
D1
D2
GND
07103-018
AINx
C
PIN
VDD
R
IN
C
IN
145
8
07103-019
POSITIVE
MEASUREMENT
DIRECTION
RATE
AXIS
LONGITUDINAL
AXIS
LATERAL
AXIS
ADIS16060 Data Sheet
Rev. A | Page 10 of 12
BASIC OPERATION
The ADIS16060 is designed for simple integration into indus-
trial system designs, requiring only a 5 V power supply, two
mode select lines, and three serial communications lines. The
SPI handles all digital I/O communication in the ADIS16060.
SERIAL PERIPHERAL INTERFACE (SPI)
The ADIS16060 SPI port includes five signals: Mode Select 1
(MSEL1), Mode Select 2 (MSEL2), serial clock (SCLK), data
input (DIN), and data output (DOUT). The MSEL1 line is used
when reading data out of the sensor (DOUT), and the MSEL2
line is used when configuring the sensor (DIN).
Selecting Output Data
Refer to Table 5 to determine the appropriate DIN bit sequence
based on the required data source. Table 2 and Table 3 provide
the necessary timing details for the input configuration sequence.
After the MSEL2 goes high, the last eight DIN bits are loaded
into the internal control register, which represents DB0 to DB7
in Table 5.
Output Data Access
Use Table 2 and Figure 2 to determine the appropriate timing
considerations for reading output data.
OUTPUT DATA FORMATTING
All of the output data is in an offset-binary format, which in
this case, means that the ideal output for a zero rate condition is
8192 codes. If the sensitivity is equal to +0.0122°/sec/LSB, a rate
of +10°/sec results in a change of 820 codes, and a digital rate
output of 9012 codes. If an offset error of −20°/sec is introduced,
the output is reduced by 1639 codes (if typical sensitivity is
assumed), resulting in a digital rate output of 6552 codes.
ADC CONVERSION
The internal successive approximation ADC begins the
conversion process on the falling edge of MSEL1 and starts to
place data MSB first on the DOUT line at the 6th falling edge of
SCLK, as shown in Figure 2. The entire conversion process
takes 20 SCLK cycles. After MSEL1 goes high, the acquisition
process starts in preparation for the next conversion cycle.
Table 5. DIN Configuration Bit Assignments
Action DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Measure Angular Rate (Gyro) 0 0 1 0 0 0 0 0
Measure Temperature 0 0 0 1 0 0 0 0
Measure AIN2
1
0
0
0
0
0
0
0
Measure AIN1 0 1 0 0 0 0 0 0
Set Positive Self-Test and Output for Angular Rate 0 0 1 0 0 0 1 0
Set Negative Self-Test and Output for Angular Rate 0 0 1 0 0 0 0 1
Data Sheet ADIS16060
Rev. A | Page 11 of 12
APPLICATIONS INFORMATION
SUPPLY AND COMMON CONSIDERATIONS
Power supply noise and transient behaviors can influence
the accuracy and stability of any sensor-based measurement
system. Power supply stability and source impedance can
influence performance. While the ADIS16060 provides 0.2 µF
of capacitance on the VCC pin, additional capacitors will support
optimum performance.
SETTING BANDWIDTH
External Capacitor COUT is used in combination with the
on-chip ROUT resistor to create a low-pass filter to limit the
bandwidth of the ADIS16060 rate response. The –3 dB
frequency set by ROUT and COUT is
( )
OUTOUT
OUT CR
f×××
=
π
21
and can be well controlled because ROUT has been trimmed
during manufacturing to be 200 kΩ ± 5%. Setting the range
with an external resistor impacts ROUT as follows:
( )
)kΩ200(
kΩ200
EXT
EXT
OUT R
R
R+
×
=
In general, additional filter poles (analog or digital) can
contribute to reducing the noise associated with the
demodulation spikes (~14 kHz) in Figure 14.
INCREASING MEASUREMENT RANGE
Scaling the measurement range requires the addition of a single
resistor, connected across the RATE and FILT pins. The
following equation provides the proper relationship for
selecting the appropriate resistor:
1
kΩ200
−∆
=
EXT
R
where Δ is the increase in range.
Figure 14. Spectral Noise Density, fs = 50 kHz, 80 Hz, Single-Pole Filter
DYNAMIC DIGITAL SENSITIVITY SCALING
This device supports in-system, dynamic, digital sensitivity
scaling.
TEMPERATURE MEASUREMENTS
When using the temperature sensor, an acquisition time of
greater than 40 μs helps to ensure proper setting and measurement
accuracy. See Table 2 and Figure 2 for details on the definition
of acquisition time.
SELF-TEST FUNCTION
Exercising the self-test function is simple, as shown in this
example.
1. Configure using DIN = 00100010 (positive self-test, rate
selected).
2. Read output.
3. Configure using DIN = 00100000 (positive self-test off, rate
selected).
4. Read output.
5. Calculate the difference between Step 2 and Step 4, and
compare this with the specified self-test output changes in
the Specifications section.
Exercising the negative self-test requires changing the sequence
in Step 1 to DIN = 00100001.
1
0.1
0.01
0.001
0.000110 100 100k1k 10k
NOISE DENSITY (°/sec/√Hz)
FRE QUENCY ( Hz )
07103-118
ADIS16060 Data Sheet
Rev. A | Page 12 of 12
OUTLINE DIMENSIONS
Figure 15. 16-Terminal Stacked Land Grid Array [LGA]
(CC-16-1)
Dimensions shown in millimeters
ORDERING GUIDE
Model1 Temperature Range Package Description Package Option
ADIS16060BCCZ −40°C to +105°C 16-Terminal Stacked Land Grid Array (LGA) CC-16-1
ADIS16060/PCBZ Evaluation Board
1 Z = RoHS Compliant Part.
022107-B
SIDE VIEW
TOP VIEW BOTTOM VIEW
PIN 1
INDICATOR
0.873 BSC
(16×)
5.20
MAX
8.20
TYP
1
4
58
9
1213 16
8.35
MAX
5.010
BSC
(4×)
2.505
BSC
(8×)
7.00
TYP
7.373
BSC
(2×)
0.200
MIN
(ALL SIDES)
0.797 BSC
(12×)
0.37 3 BSC
(16×)
©2008–2012 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07103-0-4/12(A)
