S3C9654/C9658/P9658 PRODUCT OVERVIEW
1-1
1PRODUCT OVERVIEW
SAM88RCRI PRODUCT FAMILY
Samsung's SAM88RCRI family of 8-bit single-chip CMOS microcontrollers offer fast and efficient CPU, a wide
range of integrated peripherals, and supports OTP device.
A dual address/data bus architecture and bit- or nibble-configurable I/O ports provide a flexible programming
environment for applications with varied memory and I/O requirements. Timer/counters with selectable operating
modes are included to support real-time operations.
S3C9654/C9658/P9658 MICROCONTROLLER
The S3C9654/C9658/P9658 microcontroller with USB function can be used in a wide range of general purpose
applications. It is especially suitable for mouse or joystick controller and is available in 16, 18, 20-pin DIP and
SOP package.
The S3C9654/C9658/P9658 single-chip 8-bit microcontroller is fabricated using an advanced CMOS process. It is
built around the powerful SAM88RCRI CPU core.
Stop and Idle power-down modes were implemented to reduce power consumption. To increase on-chip register
space, the size of the internal register file was logically expanded. The S3C9654/C9658/P9658 has 4/8 Kbytes of
program memory on-chip (S3C9654/C9658), and 208 bytes of RAM including 16 bytes of working register.
Using the SAM88RCRI design approach, the following peripherals were integrated with the SAM88RCRI core:
—Three configurable I/O ports (14 pin, at 20 pin)
—14-bit programmable pins for external interrupts (at 20 pin)
—8-bit timer/counter with two operating modes
OTP
The S3C9654/C9658 microcontroller is also available in OTP (One Time Programmable) version. S3P9658
microcontroller has an on-chip 4/8 Kbyte one-time-programmable EPROM instead of masked ROM. The
S3P9658 is comparable to S3C9654/C9658, both in function and in pin configuration.
PRODUCT OVERVIEW S3C9654/C9658/P9658
1-2
FEATURES
CPU
•SAM88RCRI CPU core
Memory
•4-K byte internal program memory
(ROM S3C9654)
•8-K byte internal program memory
(ROM S3P9658/C9658)
•208-byte RAM
•16 bytes of working register
Instruction Set
•41 instructions
•IDLE and STOP instructions added for power-
down modes
Instruction Execution Time
•0.66 µs at 6 MHz fOSC
Interrupts
•14 interrupt sources with one vector (20 pin)
•12 interrupt sources with one vector (18 pin)
•10 interrupt sources with one vector (16 pin)
•One level, one vector interrupt structure
Oscillation Circuit Options
•6 MHz crystal/ceramic oscillator
•External clock source
•RC oscillator
•Embedded oscillation capacitor (XI, XO, 33pF)
General I/O
•14 bit-programmable I/O pins (20 pin)
•12 bit-programmable I/O pins (18 pin)
•10 bit-programmable I/O pins (16 pin)
Sub Oscillator
•Internal RC sub oscillator
•Auto interrupt wake-up
Timer/Counter
•One 8-bit basic timer for watchdog function and
programmable oscillation stabilization interval
generation function
•One 8-bit timer/counter with Compare/Overflow
counter
USB Serial Bus
•Compatible to USB low speed (1.5 Mbps) device
1.0 specification.
•Serial bus interface engine (SIE)
—Packet decoding/generation
—CRC generation and checking
—NRZI encoding/decoding and bit-stuffing
•Two 8-byte receive/transmit USB buffer
Operating Temperature Range
•– 0°C to + 85°C
Operating Voltage Range
•4.0 V to 5.25 V
Package Types
•16, 18, 20 pin DIP
•16, 18, 20 pin SOP
Comparator
•6-channel mode, 32 step resolution
•5-channel mode, external reference
•Low EMI design
Low Voltage Reset
•Low voltage Reset
•Power on Reset
High Sink Current Pin for LED
•P0.0 (VOL: 0.4 V, 50mA)
S3C9654/C9658/P9658 PRODUCT OVERVIEW
1-3
BLOCK DIAGRAM
SAM88RCRI CPU
Port I/O and
Interrupt Control
8K (4K)
ROM 208 Byte
RAM
SUB
OSC
Basic
Timer
Timer 0
XIN
XOUT OSC
TEST
RESET
NOTE: 16, 18, 20 DIP and SOP.
LVR USB
SIE
P2.1/D+/INT2
P2.0/D-/INT2
Port 1/
Compa
-rator
P1.0/CIN0/INT1
P1.1/CIN0/INT1
P1.2/CIN0/INT1
P1.3/CIN0/INT1
P1.4/CIN0/INT1
P1.5/CIN0/INT1
Port 0 P0.2/INT0 (note)
P0.3/INT0 (note)
P0.4/INT0 (note)
P0.5/INT0 (note)
P0.0/INT0
P0.1/INT0
Figure 1-1. Block Diagram
PRODUCT OVERVIEW S3C9654/C9658/P9658
1-4
PIN ASSIGNMENTS
S3C9654/
S3C9658
P0.3/INT0
VDD
P2.0/D-/INT2
P2.1/D+/INT2
RESET
XIN
XOUT
TEST
P0.1/INT0
P0.5/INT0
20
19
18
17
16
15
14
13
12
11
P0.2/INT0
VSS
P0.0/INT0
P1.0/COM0/INT1
P1.1/COM1/INT1
P1.2/COM2/INT1
P1.3/COM3/INT1
P1.4/COM4/INT1
P1.5/COM5/INT1
P0.4/INT0
1
2
3
4
5
6
7
8
9
10
P0.2/INT0
VSS
P0.0/INT0
P1.0/COM0/INT1
P1.1/COM1/INT1
P1.2/COM2/INT1
P1.3/COM3/INT1
P1.4/COM4/INT1
P1.5/COM5/INT1
P0.4/INT0
Figure 1-2. Pin Assignment (20 Pin)
S3C9654/C9658/P9658 PRODUCT OVERVIEW
1-5
S3C9654/
S3C9658
P0.3/INT0
VDD
P2.0/D-/INT2
P2.1/D+/INT2
RESET
XIN
XOUT
TEST
P0.1/INT0
18
17
16
15
14
13
12
11
10
P0.2/INT0
VSS
P0.0/INT0
P1.0/COM0/INT1
P1.1/COM1/INT1
P1.2/COM2/INT1
P1.3/COM3/INT1
P1.4/COM4/INT1
P1.5/COM5/INT1
1
2
3
4
5
6
7
8
9
Figure 1-3. Pin Assignment (18 Pin)
S3C9654/
S3C9658
VDD
P2.0/D-/INT2
P2.1/D+/INT2
RESET
XIN
XOUT
TEST
P0.1/INT0
16
15
14
13
12
11
10
9
VSS
P0.0/INT0
P1.0/COM0/INT1
P1.1/COM1/INT1
P1.2/COM2/INT1
P1.3/COM3/INT1
P1.4/COM4/INT1
P1.5/COM5/INT1
1
2
3
4
5
6
7
8
Figure 1-4. Pin Assignment (16 Pin)
PRODUCT OVERVIEW S3C9654/C9658/P9658
1-6
Table 1-1. Signal Descriptions
Pin Names Pin
Type Pin Description Circuit
Number Pin
Numbers Share
Pins
P0.0 I/O Bit-programmable I/O port for Schmitt trigger
input or n-ch open drain output (50 mA).
Pull-up resistor is assignable to input pin by
software and is automatically disabled for
output pin. Port 0 can be individually configured
as external interrupt input.
SK 3INT0
P0.1–P0.5 I/O Bit-programmable I/O port for Schmitt trigger
input or push-pull output. Pull-up resistors
individually assignable to input pins by software
and are automatically disabled for output pins.
Port 0 can be individually configured as
external interrupt inputs.
D1, 10, 11,
12, 20 INT0
P1.0–P1.5 I/O Bit-programmable I/O port for Schmitt trigger
input or push-pull output. Pull-up resistors are
individually assignable to input pins by
software. Port 1 can be configured as
comparator input or external interrupt inputs.
Pull-down resistors are individually assignable.
(in comparator input)
CP 4–9 CIN0-5
INT1
P2.0/D-
–
P2.1/D+
I/O Bit-programmable I/O port for Schmitt trigger
input or n-ch open drain output. Pull-up
resistors are individually assignable to input
pins by software and are automatically disabled
for output pins. Port 2 can be individually
configured as external interrupt inputs. Also it
can be configured as an USB ports.
CP 17, 18 INT2
XOUT, XIN –System clock input and output pin
(crystal/ceramic oscillator, or external clock
source)
–14, 15 –
INT0IExternal interrupt for bit-programmable port 0 D1, 3, 10,
11, 12, 20 Port 0
INT1 IExternal interrupt for bit-programmable port 1 D4–9 Port 1
INT2 IExternal interrupt for bit-programmable port 2 D17, 18 Port 2
VDD –Power input pin – 19 –
VSS –VSS is a ground power for CPU core. –2–
RESET 1Reset input pin (Pull-up register embedded) – 16 –
S3C9654/C9658/P9658 PRODUCT OVERVIEW
1-7
Table 1-2. Pin Circuit Assignments for the S3C9654/C9658/P9658
Circuit Number Circuit Type S3C9654/C9658/P9658 Assignments
CO
DI/O Port 0.1–5, INT0, INT1, INT2
SK I/O Port 0.0
CP I/O Port 1, Port 2
NOTE:Diagrams of circuit types C–D, and F-8 are presented below.
P-Channel
N-Channel
V
DD
Out
Output
DIsable
Data
Figure 1-5. Pin Circuit Type C
I/O
Output
DIsable
Data Circuit
Type C
Pull-up
Enable
VDD
Data
Figure 1-6. Pin Circuit Type D
PRODUCT OVERVIEW S3C9654/C9658/P9658
1-8
VSS
Pull-up
Registor
VDD
I/O
Pull-up Enable
Output
Disable
Output
Data
Mode Input Data
Output
Input
D0
D1
MUX D0
D1
Input
Data
Figure 1-7. Pin Circuit Type SK
I/O
Circuit
Type C
VDD
Output
DIsable
Data
Pull-up
Enable
Data
Input
Enable
Analog/
External VREF
Input D+/D-
Figure 1-8. Pin Circuit Type CP
S3C9654/C9658/P9658 PRODUCT OVERVIEW
1-9
DM1
S3C9654/
S3C9658/S3P9658
XI
XOUT
14
VDD
VSS
19
2
C_BULK
+
-
P0.1/INT0
P0.3/INT0 20
P0.2/INT0 1
15 12
17 P2.1/D+/INT2
18 P2.0/D-/INT2
P1.0/COM0/INT1 4
5
TEST
RESET (note)
13
16
P0.4/INT0
P0.5/INT0
10
11
6
7
8
9
T_Z
3
VDD
P0.0/INT0
VSS
VSS
VSS
SW1
SW3
SW2
Button
Button
Button
T_X
T_Y
VDD
VDD
R_Z
D_Z
To
Host
P1.1/COM1/INT1
P1.2/COM2/INT1
P1.3/COM3/INT1
P1.4/COM4/INT1
P1.5/COM5/INT1
VDD
D_X
D_Y
R_XY
VSS
VDD
D-
D+
XI
NOTE: RESET Pin is connected to internal Pull-up register after power on reset.
If RESET Pin is low, S3C9654/C9658/P9658 goes to reset.
VSS
Figure 1-9. USB Mouse Circuit Diagram
S3C9654/C9658/P9658 ELECTRICAL DATA
15-1
15 ELECTRICAL DATA
OVERVIEW
In this section, the following S3C9654/C9658/P9658 electrical characteristics are presented in tables and graphs:
—Absolute maximum ratings
—D.C. electrical characteristics
—I/O capacitance
—A.C. electrical characteristics
—Oscillator characteristics
—Operating voltage range
—Oscillation stabilization time
—Clock timing measurement points at XIN
—Data retention supply voltage in Stop mode
—Stop mode release timing when initiated by a RESET
—Stop mode release timing when initiated by an external interrupt
—Characteristic curves
—Comparator Electrical Characteristics
ELECTRICAL DATA S3C9654/C9658/P9658
15-2
Table 15-1. Absolute Maximum Ratings
(TA = 25°C)
Parameter Symbol Conditions Rating Unit
Supply voltage VDD –– 0.3 to + 6.5 V
Input voltage VIAll ports – 0.3 to VDD + 0.3 V
Output voltage VOAll output ports – 0.3 to VDD + 0.3 V
Output current high IOH One I/O pin active – 18 mA
All I/O pins active – 60
Output current low IOL One I/O pin active (except P0.0) + 30 mA
Total pin current for ports 0, 1, 2
(except P0.0) + 100
P0.0 + 50
Operating
temperature TA–0 to + 85 °C
Storage
temperature TSTG –– 60 to + 150
S3C9654/C9658/P9658 ELECTRICAL DATA
15-3
Table 15-2. D.C. Electrical Characteristics
(TA = 0°C to + 85°C, VDD = 4.0 V to 5.25 V)
Parameter Symbol Conditions Min Typ Max Unit
Input high voltage VIH1All input pins except VIH2, D+, D– 0.8 VDD –VDD V
VIH2 XIN VDD – 0.5 VDD
Input low voltage VIL1All input pins except VIL2, D+, D– – – 0.2 VDD
VIL2 XIN – – 0.4
Output high voltage VOH VDD = 4.0 V–5.25 V
IOH = – 200 µA
All output ports except D+, D–
VDD – 1.0 – –
Output low voltage VOL VDD = 4.0 V–5.25 V
IOL = 2 mA
All output ports except D+, D–, P0.0
– – 0.4
Output low Current IOL VOL = 0.4 V 50(4) mA
Input high leakage
current ILIH1VIN = VDD
All inputs except ILIH2
except D+, D–, XOUT
– – 3 µA
ILIH2 VIN = VDD, XIN – – 20
Input low leakage
current ILIL1VIN = 0 V
All inputs except ILIL2
except D+, D–, XOUT
– – – 3
ILIL2 VIN = 0 V, XIN – – – 20
Output high leakage
current ILOH VOUT = VDD
All output pins except D+, D– – – 3
Output low leakage
current ILOL VOUT = 0 V
All output pins except D+, D–
XOUT, P0.0
– – – 3
Pull-up resistors RL1 VIN = 0 V, VDD = 5.0 V,
Port 0, Port 1 25 50 100 KΩ
RL2 VIN = 0 V, VDD = 5.0 V,
Port 2 –4.3 –
Supply current IDD1 Normal operation mode,
VDD = 4.0 V–5.25 V
6 MHz, CPU clock
–6.5 15 mA
IDD2 IDLE mode
VDD = 4.0 V–5.25 V
6 MHz, CPU clock
– 2 4
IDD3 Stop mode, oscillator stop
VDD = 4.0 V–5.25 V – 13 25 µA
NOTES:
1. Supply current does not include current drawn through internal pull-up resistors or external output current load.
2. This parameter is guaranteed, but not tested (include D+, D–).
3. Only in 4.0 V to 5.25 V, D+ and D– satisfy the USB spec 1.0.
4. P0.0 designed for direct LED current sink, see the SNKCON resistor and Figure 1-9 (Page 1-9).
ELECTRICAL DATA S3C9654/C9658/P9658
15-4
Table 15-3. Input/Output Capacitance
(TA = 0°C to + 85°C, VDD = 0 V)
Parameter Symbol Conditions Min Typ Max Unit
Input
capacitance CIN f = 1 MHz; unmeasured pins
are connected to VSS – – 10 pF
Output
capacitance COUT Except XIN, XOUT
I/O capacitance CIO
XI/XO capacitance CXI, CXO XIN, XOUT – 33 –
Table 15-4. A.C. Electrical Characteristics
(TA = 0°C to + 85°C, VDD = 4.0 V to 5.25 V)
Parameter Symbol Conditions Min Typ Max Unit
Noise filter tNF1H, tNF1L P1 (RC delay) 100 – 200 ns
0.8 VDD
0.2 VDD
tNF1L tNF1H
0.5 VDD
tNF2
Figure 15-1. Nose Filter Timing Measurement Points
S3C9654/C9658/P9658 ELECTRICAL DATA
15-5
Table 15-5. Oscillator Characteristics
(TA = 0°C + 85°C)
Oscillator Clock Circuit Test Condition Min Typ Max Unit
Main crystal Main
ceramic
(fOSC)
X
IN
X
OUT
Oscillation frequency
VDD = 4.0 V–5.25 V –6.0 –MHz
External clock
X
IN
X
OUT
Oscillation frequency
VDD = 4.0 V–5.25 V –6.0 –MHz
RC oscillator XIN
XOUT
R
Oscillation frequency
VDD = 5.0 V
R = 22.6 K
R = 8.8 K
R = 3.2 K
–
–
–
1.0
2.0
4.0
–
–
–
MHz
Table 15-6. Oscillation Stabilization Time
(TA = 0°C + 85°C, VDD = 4.0 V to 5.25 V)
Oscillator Test Condition Min Typ Max Unit
Main crystal VDD = 4.0 V to 5.25 V, fOSC > 6.0 MHz – – 10 ms
Main ceramic (Oscillation stabilization occurs when VDD is
equal to the minimum oscillator voltage range.)
Oscillator tWAIT stop mode release time by a reset –216/fOSC –
stabilization wait
time tWAIT stop mode release time by an interrupt –––
NOTE: The oscillator stabilization wait time, tWAIT, when it is released by an interrupt, is determined by the setting in the
basic timer control register, BTCON.
ELECTRICAL DATA S3C9654/C9658/P9658
15-6
0.4 V
t
XL
t
XH
X
IN
1/f
OSC
V
DD
- 0.5 V
Figure 15-2. Clock Timing Measurement Points at XIN
Table 15-7. Data Retention Supply Voltage in Stop Mode
(TA = 0°C to + 70°C)
Parameter Symbol Conditions Min Typ Max Unit
Data retention
supply voltage VDDDR Stop mode 2.0 – 6 V
Data retention
supply current IDDDR Stop mode; VDDDR = 2.0 V ––5µA
S3C9654/C9658/P9658 ELECTRICAL DATA
15-7
Data Retention Mode
~
~
~
VDDDR
Execution Of
Stop Instrction
VDD Normal
Operating
Mode
IDLE Mode
(Basic Timer Active)
~
Stop Mode
tWAIT
0.8 VDD
0.2 VDD
External
Interrupt
Figure 15-3. Stop Mode Release Timing When Initiated by an External Interrupt
Table 15-8. Comparator Electrical Characteristics
(TA = 0°C to + 85°C, VDD = 4.0 V to 5.25 V)
Parameter Symbol Conditions Min Typ Max Unit
Conversion time (1) tCON – – 6 × 12
or
6 × 192
–fCPU
Comparator input
voltage VICN –VSS –VDD V
Comparator input
impedance RCN – 2 1000 – MΩ
Comparator
reference voltage VREF –1.8 –VDD V
Comparator input
current ICIN VDD = 5 V– 3 – 3 µA
Reference input
current IREF VDD = 5 V– 3 – 3 µA
Comparator block ICOM VDD = 5.5 V– 1 2 mA
current (2) VDD = 4.5 V0.5 1mA
VDD = 5 V
(when power down mode) 100 500 nA
NOTES:
1. Conversion time is the time required from the moment a conversion operation starts until it ends.
2. ICOM is an operating current during conversion.
ELECTRICAL DATA S3C9654/C9658/P9658
15-8
Table 15-9. Low Speed Source Electrical Characteristics (USB)
(TA = 0°C to + 85°C, Internal Voltage Regulator Output V33OUT = 2.8 V to 3.6 V, typ 3.3 V)
Parameter Symbol Conditions Min Max Unit
Transition Time:
Rise Time Tr CL = 200 pF 75 – ns
CL = 650 pF – 300
Fall Time Tf CL = 200 pF 75 –
CL = 650 pF – 300
Rise/Fall Time Matching Trfm (Tr/Tf) CL = 50 pF 80 125 %
Output Signal Crossover Voltage Vcrs CL = 50 pF 1.3 2.0 V
Internal Voltage Regulator Output
Voltage V33OUT VDD = 4.0 – 5.25 V 2.8 3.6 V
R1 = 15 K
Ω
R2 = 1.5 K
Ω
CL = 200 pF - 650 pF
DM: S/W ON
DP: S/W OFF
D. U. T
Test
Point
S/W
V33OUT
R2
R1 C2
90 % Measurement
Points
10 %
90 %
10 %
Tr Tf
D-/D+
Figure 15-4. USB Data Signal Rise and Fall Time
DM
DP
VCRS
MAX: 2.0 V
MIN: 1.3 V
3.3 V
0 V
Figure 15-5. USB Output Signal Crossover Point Voltage
S3C9654/C9658/P9658 MECHANICAL DATA
16-1
16 MECHANICAL DATA
OVERVIEW
This section contains the following information about the device package:
—Package dimensions in millimeters
—Pad diagram
NOTE: Dimensions are in millimeters.
26.80 MAX
26.40 ± 0.20
(1.77)
20-DIP-300A
6.40 ± 0.20
#20
#1
0.46
±
0.10
1.52
±
0.10
#11
#10
0-15
0.25+ 0.10
- 0.05
7.62
2.54
0.51 MIN
3.30 ± 0.30
3.25 ± 0.20
5.08 MAX
Figure 16-1. 20-DIP 300A Package Dimensions
MECHANICAL DATA S3C9654/C9658/P9658
16-2
28.85
(2.92)
6.48
#20
#1
1.63
#11
#10
0.38
7.62
2.54
0.89 3.43
0.56
3.51 4.06
9.25
20-DIP-300A-SG
Figure 16-2. 20-DIP-300A-SG Package Dimensions
S3C9654/C9658/P9658 MECHANICAL DATA
16-3
NOTE: Dimensions are in millimeters.
20-SOP-300
7.80 ± 0.30
#11#20
#1 #10
14.10 MAX
13.70
± 0.20
(0.66)
0-8
0.203+ 0.10
- 0.05
9.53
5.40 ± 0.20
0.85 ± 0.20
0.05 MIN 2.30 ± 0.10
2.50 MAX
0.40
0.10 MAX
+ 0.10
- 0.05
1.27
Figure 16-3. 20-SOP-300 Package Dimensions
MECHANICAL DATA S3C9654/C9658/P9658
16-4
23.50
(1.53)
6.48
#18
#1
#10
#9
0.38
7.62
10.03
1.63
0.56
2.54
0.89 3.18
3.51 4.06
18-DIP-300A-SG
Figure 16-4. 18-DIP-300A-SG Package Dimensions
S3C9654/C9658/P9658 MECHANICAL DATA
16-5
#1 #9
#10#18
10.41
18.06
0.48
2.64
1.27BSC
18-SOP-BD300-AN
0-8
0.32
7.59
1.02
0.29
Figure 16-5. 18-SOP-BD300-AN Package Dimensions
MECHANICAL DATA S3C9654/C9658/P9658
16-6
19.23
(0.53)
6.48
#16
#1
#9
#8
0.38
7.62
10.03
2.54
1.63
0.56
0.89 3.43
3.51 4.06
16-DIP-300A-SG
Figure 16-6. 16-DIP-300A-SG Package Dimensions
S3C9654/C9658/P9658 MECHANICAL DATA
16-7
#1 #8
#9#16
10.50
10.56
2.65
1.27BSC
0.48
16-SOP-BD300-SG
0-8
0.32
7.60
1.27
0.30
Figure 16-7. 16-SOP-BD300-SG Package Dimensions
S3C9654/C9658/P9658 S3P9658 OTP
17-1
17 S3P9658 OTP
OVERVIEW
The S3P9658 single-chip CMOS microcontroller is the OTP (One Time Programmable) version of the S3P9658
microcontroller. It has an on-chip OTP ROM instead of masked ROM. The EPROM is accessed by serial data
format.
The S3P9658 is fully compatible with the S3P9658, both in function and in pin configuration. Because of its
simple programming requirements, the S3P9658 is ideal for use as an evaluation chip for the S3P9658.
S3P9658
P0.3/INT0
VDD
P2.0/D-/INT2
P2.1/D+/INT2
RESET/RESETRESET
XIN
XOUT
TEST/TEST
P0.1/INT0
P0.5/INT0
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
P0.2/INT0
VSS/VSS
P0.0/INT0
SCLK/P1.0/COM0/INT1
SDAT/P1.1/COM1/INT1
P1.2/COM2/INT1
P1.3/COM3/INT1
P1.4/COM4/INT1
P1.5/COM5/INT1
P0.4/INT0
NOTE: The bold is indicate an OTP pin name.
Figure 17-1. S3P9658 Pin Assignments (20 Pin)
KS86P6504/P6508 OTP S3C9654/C9658/P9658
17-2
S3P9658
P0.3/INT0
VDD/VDD
P2.0/D-/INT2
P2.1/D+/INT2
RESET/RESETRESET
XIN
XOUT
TEST/TEST
P0.1/INT0
18
17
16
15
14
13
12
11
10
P0.2/INT0
VSS/VSS
P0.0/INT0
SCLK/P1.0/COM0/INT1
SDAT/P1.1/COM1/INT1
P1.2/COM2/INT1
P1.3/COM3/INT1
P1.4/COM4/INT1
P1.5/COM5/INT1
1
2
3
4
5
6
7
8
9
NOTE: The bold is indicate an OTP pin name.
Figure 17-2. S3P9658 Pin Assignments (18 Pin)
S3P9658
VDD/VDD
P2.0/D-/INT2
P2.1/D+/INT2
RESET/RESETRESET
XIN
XOUT
TEST/TEST
P0.1/INT0
16
15
14
13
12
11
10
9
VSS/VSS
P0.0/INT0
SCLK/P1.0/COM0/INT1
SDAT/P1.1/COM1/INT1
P1.2/COM2/INT1
P1.3/COM3/INT1
P1.4/COM4/INT1
P1.5/COM5/INT1
1
2
3
4
5
6
7
8
NOTE: The bold is indicate an OTP pin name.
Figure 17-3. S3P9658 Pin Assignments (16 Pin)
S3C9654/C9658/P9658 S3P9658 OTP
17-3
Table 17-1. Descriptions of Pins Used to Read/Write the EPROM
Main Chip During Programming
Pin Name Pin Name Pin Number (20 DIP) I/O Function
P1.0 SDAT 5I/O Serial Data Pin (Output when reading, Input when
writing) Input and Push-pull Output Port can be
assigned
P1.1 SCLK 4I/O Serial Clock Pin (Input Only Pin)
RESET RESET 16 I0 V : OTP write and test mode
5 V : Operating mode
TEST VPP
(TEST) 13 IChip Initialization and EPROM Cell Writing Power
Supply Pin (Indicates OTP Mode Entering) When
writing 12.5 V is applied and when reading.
VDD/VSS VDD/VSS 19/2 ILogic Power Supply Pin.
Table 17-2. Comparison of S3P9658 and S3C9654/C9658 Features
Characteristic S3P9658 S3C9654/C9658
Program Memory 8 K-byte EPROM 4/8 K-byte mask ROM
Operating Voltage (VDD)4.0 V to 5.25 V 4.0 V to 5.25 V
OTP Programming Mode VDD = 5 V, VPP (TEST) = 12.5 V
Pin Configuration 20/18/16 DIP, 20/18/16 SOP 20/18/16 DIP, 20/18/16 SOP, 16SSOP
EPROM Programmability User Program 1 time Programmed at the factory
OPERATING MODE CHARACTERISTICS
When 12.5 V is supplied to the VPP (RESET) pin of the S3P9658, the EPROM programming mode is entered.
The operating mode (read, write, or read protection) is selected according to the input signals to the pins listed in
Table 14-3 below.
Table 17-3. Operating Mode Selection Criteria
VDD VPP (RESETRESET)REG/MEMMEM Address (A15-A0) R/W Mode
5 V 5 V 00000H 1EPROM read
12.5 V 00000H 0EPROM program
12.5 V 00000H 1EPROM verify
12.5 V 10E3FH 0EPROM read protection
NOTE: "0" means Low level; "1" means High level.
