INTEGRATED CIRCUITS DATA SHEET 74HC4066; 74HCT4066 Quad bilateral switches Product specification Supersedes data of 2003 Jun 17 2004 Nov 11 Philips Semiconductors Product specification Quad bilateral switches 74HC4066; 74HCT4066 FEATURES GENERAL DESCRIPTION * Very low ON-resistance: The 74HC4066 and 74HCT4066 are high-speed Si-gate CMOS devices and are pin compatible with the HEF4066B. They are specified in compliance with JEDEC standard no. 7A. - 50 (typical) at VCC = 4.5 V - 45 (typical) at VCC = 6.0 V - 35 (typical) at VCC = 9.0 V. The 74HC4066 and 74HCT4066 have four independent analog switches. Each switch has two input/output pins (pins nY or nZ) and an active HIGH enable input pin (pin nE). When pin nE = LOW the belonging analog switch is turned off. * Complies with JEDEC standard no. 7A * ESD protection: HBM EIA/JESD22-A114-B exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V. The 74HC4066 and 74HCT4066 are pin compatible with the 74HC4016 and 74HCT4016 but exhibit a much lower on-resistance. In addition, the on-resistance is relatively constant over the full input signal range. * Specified from -40 C to +85 C and -40 C to +125 C. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; tr = tf = 6 ns. TYPICAL SYMBOL PARAMETER UNIT CONDITIONS 74HC4066 74HCT4066 tPZH/tPZL turn-on time nE to Vos CL = 15 pF; RL = 1 k; VCC = 5 V 11 12 ns tPHZ/tPLZ turn-off time nE to Vos CL = 15 pF; RL = 1 k; VCC = 5 V 13 16 ns CI input capacitance 3.5 3.5 pF CPD power dissipation capacitance per switch 11 12 pF CS maximum switch capacitance 8 8 pF notes 1 and 2 Notes 1. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi x N + [(CL + CS) x VCC2 x fo] where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; CS = maximum switch capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; [(CL + CS) x VCC2 x fo] = sum of the outputs. 2. For 74HC4066 the condition is VI = GND to VCC. For 74HCT4066 the condition is VI = GND to VCC - 1.5 V. 2004 Nov 11 2 Philips Semiconductors Product specification Quad bilateral switches 74HC4066; 74HCT4066 FUNCTION TABLE See note 1. INPUT nE SWITCH L off H on Note 1. H = HIGH voltage level. L = LOW voltage level. ORDERING INFORMATION PACKAGE TYPE NUMBER TEMPERATURE RANGE PINS PACKAGE MATERIAL CODE 74HC4066N -40 C to 125 C 14 DIP14 plastic SOT27-1 74HCT4066N -40 C to 125 C 14 DIP14 plastic SOT27-1 74HC4066D -40 C to 125 C 14 SO14 plastic SOT108-1 74HCT4066D -40 C to 125 C 14 SO14 plastic SOT108-1 74HC4066DB -40 C to 125 C 14 SSOP14 plastic SOT337-1 74HCT4066DB -40 C to 125 C 14 SSOP14 plastic SOT337-1 74HC4066PW -40 C to 125 C 14 TSSOP14 plastic SOT402-1 74HCT4066PW -40 C to 125 C 14 TSSOP14 plastic SOT402-1 74HC4066BQ -40 C to 125 C 14 DHVQFN14 plastic SOT762-1 74HCT4066BQ -40 C to 125 C 14 DHVQFN14 plastic SOT762-1 PINNING PIN SYMBOL DESCRIPTION 1 1Y independent input/output 2 1Z independent input/output 3 2Z independent input/output 4 2Y independent input/output 5 2E enable input (active HIGH) 6 3E enable input (active HIGH) 7 GND 8 handbook, halfpage 1Y 1 14 VCC 1Z 2 13 1E 2Z 3 12 4E 2Y 4 ground (0 V) 2E 5 10 4Z 3Y independent input/output 3E 6 9 9 3Z independent input/output GND 7 8 3Y 10 4Z independent input/output 11 4Y independent input/output 12 4E enable input (active HIGH) 13 1E enable input (active HIGH) 14 VCC supply voltage 2004 Nov 11 4066 11 4Y 3Z MGR253 Fig.1 3 Pin configuration DIP14, SO14 and (T)SSOP14. Philips Semiconductors Product specification 1 1Y terminal 1 index area 74HC4066; 74HCT4066 14 VCC Quad bilateral switches handbook, halfpage 1Z 2 13 1E 2Z 3 12 4E 2Y 4 11 4Y 1E 5 2E 6 3E 12 4E 10 4Z 9 8 6 3Y 3E VCC(1) 7 5 GND 2E 4066 13 3Z 001aac116 1Y 1 1Z 2 2Y 4 2Z 3 3Y 8 3Z 9 4Y 11 4Z 10 Transparent top view MGR254 (1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input. Fig.2 Pin configuration DHVQFN14. Fig.3 Logic symbol. handbook, halfpage handbook, halfpage 2 1 1 13 # 1 1 2 X1 13 # 4 3 4 5 # 5 # 9 8 8 6 # 6 # 1 1 X1 1 1 9 X1 10 11 11 12 # 12 # MGR255 1 1 X1 MGR256 Fig.4 IEEEC logic symbol. 2004 Nov 11 3 4 10 Philips Semiconductors Product specification Quad bilateral switches 74HC4066; 74HCT4066 nY handbook, halfpage handbook, halfpage13 1E 1 5 4 6 8 12 11 1Y 2E 2Y 3E 3Y 4E 4Y 1Z 2Z 3Z 4Z 2 3 9 10 nE VCC VCC MGR257 GND Fig.5 Functional diagram. 2004 Nov 11 nZ MGR258 Fig.6 Schematic diagram (one switch). 5 Philips Semiconductors Product specification Quad bilateral switches 74HC4066; 74HCT4066 RECOMMENDED OPERATING CONDITIONS 74HC4066 SYMBOL PARAMETER 74HCT4066 CONDITIONS UNIT MIN. TYP. MAX. MIN. TYP. MAX. VCC supply voltage 2.0 5.0 10.0 4.5 5.0 5.5 V VI input voltage GND - VCC GND - VCC V VS switch voltage GND - VCC GND - VCC V Tamb ambient temperature tr, tf input rise and fall times see DC and AC characteristics per device -40 +25 +85 -40 +25 +85 C -40 - +125 -40 - +125 C VCC = 2.0 V - 6.0 1000 - 6.0 500 ns VCC = 4.5 V - - 500 - - - ns VCC = 6.0 V - - 400 - - - ns VCC = 10.0 V - - 250 - - - ns LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL PARAMETER CONDITIONS MIN. -0.5 MAX. VCC supply voltage IIK input diode current VI < -0.5 V or VI > VCC + 0.5 V - 20 mA ISK switch diode current VS < -0.5 V or VS > VCC + 0.5 V - 20 mA IS switch current -0.5 V < VO < VCC + 0.5 V; note 1 - 25 mA ICC, IGND VCC or GND current - 50 mA Tstg storage temperature -65 +150 C Ptot power dissipation - 500 mW PS power dissipation per switch - 100 mW Tamb = -40 C to +125 C; note 2 +11.0 UNIT V Notes 1. To avoid drawing VCC current out of pin nZ, when switch current flows in pin nY, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into pin nZ, no VCC current will flow out of pin nY. In this case there is no limit for the voltage drop across the switch, but the voltages at pins nY and nZ may not exceed VCC or GND. 2. For DIP14 packages: above 70 C derate linearly with 12 mW/K. For SO14 packages: above 70 C derate linearly with 8 mW/K. For SSOP14 and TSSOP16 packages: above 60 C derate linearly with 5.5 mW/K. For DHVQFN14 packages: above 60 C derate linearly with 4.5 mW/K. 2004 Nov 11 6 Philips Semiconductors Product specification Quad bilateral switches 74HC4066; 74HCT4066 DC CHARACTERISTICS Family 74HC4066 Voltages are referenced to GND (ground = 0 V); Vis is the input voltage at pins nY or nZ, whichever is assigned as an input; Vos is the output voltage at pins nY or nZ, whichever is assigned as an output. TEST CONDITIONS SYMBOL PARAMETER OTHER MIN. TYP. MAX. UNIT 2.0 1.5 1.2 - V 4.5 3.15 2.4 - V 6.0 4.2 3.2 - V 9.0 6.3 4.7 - V 2.0 - 0.8 0.50 V 4.5 - 2.1 1.35 V 6.0 - 2.8 1.80 V 9.0 - 4.3 2.70 V 6.0 - - 1.0 A VCC (V) Tamb = -40 C to +85 C; note 1 VIH VIL HIGH-level input voltage LOW-level input voltage ILI input leakage current VI = VCC or GND 10.0 - - 2.0 A IS(OFF) analog switch current OFF-state per channel; VI = VIH or VIL; VS = VCC - GND; see Fig.7 10.0 - - 1.0 A IS(ON) analog switch current ON-state VI = VIH or VIL; VS = VCC - GND; see Fig.8 10.0 - - 1.0 A ICC quiescent supply current VI = VCC or GND; Vis = GND or VCC; Vos = VCC or GND 6.0 - - 20.0 A 10.0 - - 40.0 A 2004 Nov 11 7 Philips Semiconductors Product specification Quad bilateral switches 74HC4066; 74HCT4066 TEST CONDITIONS SYMBOL PARAMETER OTHER MIN. TYP. MAX. UNIT 2.0 1.5 - - V 4.5 3.15 - - V 6.0 4.2 - - V 9.0 6.3 - - V 2.0 - - 0.50 V 4.5 - - 1.35 V 6.0 - - 1.80 V 9.0 - - 2.70 V 6.0 - - 1.0 A 10.0 - - 2.0 A VCC (V) Tamb = -40 C to +125 C VIH VIL ILI HIGH-level input voltage LOW-level input voltage input leakage current VI = VCC or GND IS(OFF) analog switch current OFF-state per channel; VI = VIH or VIL; VS = VCC - GND; see Fig.7 10.0 - - 1.0 A IS(ON) analog switch current ON-state VI = VIH or VIL; VS = VCC - GND; see Fig.8 10.0 - - 1.0 A ICC quiescent supply current VI = VCC or GND; Vis = GND or VCC; Vos = VCC or GND 6.0 - - 40.0 A 10.0 - - 80.0 A Note 1. All typical values are measured at Tamb = 25 C. 2004 Nov 11 8 Philips Semiconductors Product specification Quad bilateral switches 74HC4066; 74HCT4066 Family 74HCT4066 Voltages are referenced to GND (ground = 0 V); Vis is the input voltage at pins nY or nZ, whichever is assigned as an input; Vos is the output voltage at pins nY or nZ, whichever is assigned as an output. TEST CONDITIONS SYMBOL PARAMETER MIN. OTHER TYP. MAX. UNIT VCC (V) Tamb = -40 C to +85 C; note 1 4.5 to 5.5 2.0 1.6 - V 4.5 to 5.5 - 1.2 0.8 V - 1.0 A - - 1.0 A - - 1.0 A VI = VCC or GND; Vis = GND or VCC; Vos = VCC or GND 4.5 to 5.5 - - 20.0 A additional quiescent VI = VCC - 2.1 V; other inputs at VCC supply current per input or GND 4.5 to 5.5 - 100 450 A VIH HIGH-level input voltage VIL LOW-level input voltage ILI input leakage current VI = VCC or GND 5.5 - IS(OFF) analog switch current OFF-state per channel; VI = VIH or VIL; VS = VCC - GND; see Fig.7 5.5 IS(ON) analog switch current ON-state VI = VIH or VIL; VS = VCC - GND; see Fig.8 5.5 ICC quiescent supply current ICC Tamb = -40 C to +125 C VIH HIGH-level input voltage 4.5 to 5.5 2.0 - - V VIL LOW-level input voltage 4.5 to 5.5 - - 0.8 V ILI input leakage current VI = VCC or GND 5.5 - - 1.0 A IS(OFF) analog switch current OFF-state per channel; VI = VIH or VIL; VS = VCC - GND; see Fig.7 10.0 - - 1.0 A IS(ON) analog switch current ON-state VI = VIH or VIL; VS = VCC - GND; see Fig.8 10.0 - - 1.0 A ICC quiescent supply current VI = VCC or GND; Vis = GND or VCC; Vos = VCC or GND 4.5 to 5.5 - - 40.0 A ICC additional quiescent VI = VCC - 2.1 V; other inputs at VCC supply current per input or GND 4.5 to 5.5 - - 490 A Note 1. All typical values are measured at Tamb = 25 C. 2004 Nov 11 9 Philips Semiconductors Product specification Quad bilateral switches handbook, full pagewidth 74HC4066; 74HCT4066 LOW (from enable inputs) nY VI = VCC or GND nZ A A VO = GND or VCC GND MGR260 Fig.7 Test circuit for measuring OFF-state current. handbook, full pagewidth HIGH (from enable inputs) nY VI = VCC or GND nZ A A GND MGR261 Fig.8 Test circuit for measuring ON-state current. 2004 Nov 11 10 VO (open circuit) Philips Semiconductors Product specification Quad bilateral switches 74HC4066; 74HCT4066 Resistance RON for 74HC4066 and 74HCT4066 For 74HC4066: VCC = 2.0, 4.5, 6.0 and 9.0 V; for 74HCT4066: VCC = 4.5 V; note 1; Vis is the input voltage at pins nY or nZ, whichever is assigned as an input; see Fig.9. TEST CONDITIONS SYMBOL PARAMETER OTHER IS (A) MIN. TYP. MAX. UNIT 2.0 - - - VCC (V) Tamb = -40 C to +85 C; note 2 RON(peak) RON(rail) ON-resistance (peak) ON-resistance (rail) VI = VIH or VIL; Vis = VCC to GND maximum variation of ON-resistance between any two channels 4.5 - 54 118 6.0 - 42 105 9.0 - 32 88 100 2.0 - 80 - 1000 4.5 - 35 95 6.0 - 27 82 1000 VI = VIH or VIL; Vis = GND VI = VIH or VIL; Vis = VCC RON 100 VI = VIH or VIL; Vis = VCC to GND 9.0 - 20 70 100 2.0 - 100 - 1000 4.5 - 42 106 6.0 - 35 94 9.0 - 27 78 2.0 - - - 4.5 - 5 - 6.0 - 4 - 9.0 - 3 - 100 2.0 - - - 1000 4.5 - - 142 6.0 - - 126 - Tamb = -40 C to +125 C RON(peak) RON(rail) ON-resistance (peak) ON-resistance (rail) VI = VIH or VIL; Vis = VCC to GND VI = VIH or VIL; Vis = GND VI = VIH or VIL; Vis = VCC 9.0 - - 105 100 2.0 - - - 1000 4.5 - - 115 6.0 - - 100 9.0 - - 85 2.0 - - - 100 1000 4.5 - - 128 6.0 - - 113 9.0 - - 95 Notes 1. At supply voltages approaching 2 V, the analog ON-resistance switch becomes extremely non-linear. Therefore, it is recommended that these devices are being used to transmit digital signals only, when using these supply voltages. 2. All typical values are measured at Tamb = 25 C. 2004 Nov 11 11 Philips Semiconductors Product specification Quad bilateral switches 74HC4066; 74HCT4066 handbook, full pagewidth HIGH (from enable inputs) V nY nZ Vis = 0 to VCC - GND Is GND MGR259 Fig.9 Test circuit for measuring ON-resistance (RON). MGR262 60 handbook, halfpage RON () VCC = 4.5 V 50 6V 40 9V 30 20 10 0 1.8 3.6 5.4 7.2 9 Vis (V) Vis = 0 V to VCC. Fig.10 Typical ON-resistance (RON) as a function of input voltage (Vis). 2004 Nov 11 12 Philips Semiconductors Product specification Quad bilateral switches 74HC4066; 74HCT4066 AC CHARACTERISTICS Type 74HC4066 GND = 0 V; tr = tf = 6 ns; CL = 50 pF; Vis is the input voltage at pins nY or nZ, whichever is assigned as an input; Vos is the output voltage at pins nY or nZ, whichever is assigned as an output. TEST CONDITIONS SYMBOL PARAMETER OTHER MIN. TYP. MAX. UNIT 2.0 - 8 75 ns 4.5 - 3 15 ns 6.0 - 2 13 ns 9.0 - 2 10 ns 2.0 - 36 125 ns 4.5 - 13 25 ns 6.0 - 10 21 ns 9.0 - 8 16 ns VCC (V) Tamb = -40 C to +85 C; note 1 tPHL/tPLH tPZH/tPZL tPHZ/tPLZ propagation delay Vis to Vos turn-on time nE to Vos turn-off time nE to Vos RL = ; see Fig.19 RL = 1 k; see Figs 20 and 21 RL = 1 k; see Figs 20 and 21 2.0 - 44 190 ns 4.5 - 16 38 ns 6.0 - 13 33 ns 9.0 - 16 26 ns 2.0 - - 90 ns 4.5 - - 18 ns 6.0 - - 15 ns 9.0 - - 12 ns 2.0 - - 150 ns 4.5 - - 30 ns 6.0 - - 26 ns 9.0 - - 20 ns Tamb = -40 C to +125 C tPHL/tPLH tPZH/tPZL tPHZ/tPLZ propagation delay Vis to Vos turn-on time nE to Vos turn-off time nE to Vos RL = ; see Fig.19 RL = 1 k; see Figs 20 and 21 RL = 1 k; see Figs 20 and 21 Note 1. All typical values are measured at Tamb = 25 C. 2004 Nov 11 13 2.0 - - 225 ns 4.5 - - 45 ns 6.0 - - 38 ns 9.0 - - 30 ns Philips Semiconductors Product specification Quad bilateral switches 74HC4066; 74HCT4066 Type 74HCT4066 GND = 0 V; tr = tf = 6 ns; CL = 50 pF; Vis is the input voltage at pins nY or nZ, whichever is assigned as an input; Vos is the output voltage at pins nY or nZ, whichever is assigned as an output. TEST CONDITIONS SYMBOL PARAMETER OTHER MIN. TYP. MAX. UNIT VCC (V) Tamb = -40 C to +85 C; note 1 tPHL/tPLH propagation delay Vis to Vos RL = ; see Fig.19 4.5 - 3 15 ns tPZH/tPZL turn-on time nE to Vos RL = 1 k; see Figs 20 and 21 4.5 - 12 30 ns tPHZ/tPLZ turn-off time nE to Vos RL = 1 k; see Figs 20 and 21 4.5 - 20 44 ns Tamb = -40 C to +125 C tPHL/tPLH propagation delay Vis to Vos RL = ; see Fig.19 4.5 - - 18 ns tPZH/tPZL turn-on time nE to Vos RL = 1 k; see Figs 20 and 21 4.5 - - 36 ns tPHZ/tPLZ turn-off time nE to Vos RL = 1 k; see Figs 20 and 21 4.5 - - 53 ns Note 1. All typical values are measured at Tamb = 25 C. 74HC4066 and 74HCT4066 At recommended conditions and typical values; GND = 0 V; tr = tf = 6 ns; Vis is the input voltage at pins nY or nZ, whichever is assigned as an input; Vos is the output voltage at pins nY or nZ, whichever is assigned as an output. CONDITIONS SYMBOL PARAMETER TYP. UNIT OTHER dsin sine wave distortion f = 1 kHz; RL = 10 k; CL = 50 pF; see Fig.17 Vis(p-p) (V) 4.0 4.5 0.04 % 8.0 9.0 0.02 % f = 10 kHz; RL = 10 k; CL = 50 pF; 4.0 see Fig.17 8.0 4.5 0.12 % 9.0 0.06 % 4.5 -50 dB 9.0 -50 dB 4.5 -60 dB 9.0 -60 dB 4.5 110 mV 9.0 220 mV 4.5 180 MHz 9.0 200 MHz - 8 pF OFF(feedthr) switch OFF signal feed-through RL = 600 ; CL = 50 pF; f = 1 MHz; see Figs 11 and 18 note 1 ct(s) crosstalk between any two RL = 600 ; CL = 50 pF; f = 1 MHz; switches see Fig.13 note 1 Vct(p-p) fmax CS crosstalk voltage between any input to any switch (peak-to-peak value) RL = 600 ; CL = 50 pF; f = 1 MHz; see Fig.15 (nE, square wave between VCC and GND, tr = tf = 6 ns) - minimum frequency response (-3 dB) RL = 50 ; CL = 10 pF; see Figs 12 and 16 note 2 - maximum switch capacitance Notes 1. Adjust input voltage Vis is 0 dBM level (0 dBM = 1 mW into 600 ). 2. Adjust input voltage Vis is 0 dBM level at Vos for 1 MHz (0 dBM = 1 mW into 50 ). 2004 Nov 11 VCC (V) 14 Philips Semiconductors Product specification Quad bilateral switches 74HC4066; 74HCT4066 MGR263 0 handbook, full pagewidth (dB) -20 -40 -60 -80 -100 10 102 103 104 105 f (kHz) 106 Test conditions: VCC = 4.5 V; GND = 0 V; RL = 50 ; Rsource = 1 k. Fig.11 Typical switch OFF signal feed-through as a function of frequency. MGR264 5 handbook, full pagewidth (dB) 0 -5 10 102 103 104 Test conditions: VCC = 4.5 V; GND = 0 V; RL = 50 ; Rsource = 1 k. Fig.12 Typical frequency response. 2004 Nov 11 15 105 f (kHz) 106 Philips Semiconductors Product specification Quad bilateral switches 74HC4066; 74HCT4066 VCC handbook, full pagewidth 2RL 0.1 F VI nY/nZ nZ/nY RL 2RL CL channel ON GND MGR265 Fig.13 Test circuit for measuring crosstalk between any two switches; channels ON condition. VCC handbook, full pagewidth VCC 2RL 2RL nY/nZ nZ/nY 2RL 2RL channel OFF Vos CL dB GND MGR266 Fig.14 Test circuit for measuring crosstalk between any two switches; channels OFF condition. 2004 Nov 11 16 Philips Semiconductors Product specification Quad bilateral switches 74HC4066; 74HCT4066 The crosstalk is defined as follows handbook, full pagewidth (oscilloscope output). VCC VCC nE VCC GND 2RL fpage nY/nZ Vct(p-p) 2RL nZ/nY D.U.T. 2RL MGR267 CL 2RL Vos oscilloscope GND MGR268 Fig.15 Test circuit for measuring crosstalk between control and any switch. VCC handbook, full pagewidth 0.1 F sine-wave Vis 2RL nY/nZ nZ/nY 2RL CL Vos dB channel ON GND MGR269 Adjust input voltage to obtain 0 dB at Vos when fi = 1 MHz. After set-up, the frequency of fi is increased to obtain a reading of -3 dB at Vos. Fig.16 Test circuit for measuring minimum frequency response. 2004 Nov 11 17 Philips Semiconductors Product specification Quad bilateral switches 74HC4066; 74HCT4066 VCC handbook, full pagewidth 10 F fi = 1 kHz sine-wave Vis 2RL nY/nZ nZ/nY 2RL CL channel ON Vos DISTORTION METER GND MGR270 Fig.17 Test circuit for measuring sine wave distortion. VCC handbook, full pagewidth 0.1 F Vis 2RL nY/nZ nZ/nY 2RL CL Vos dB channel OFF GND MGR271 Fig.18 Test circuit for measuring switch OFF signal feed-through. 2004 Nov 11 18 Philips Semiconductors Product specification Quad bilateral switches 74HC4066; 74HCT4066 AC WAVEFORMS tr handbook, full pagewidth tf VCC 90% Vis 50% 10% GND Vos 50% tPLH tPHL MGR272 Fig.19 Waveforms showing the input (Vis) to output (Vos) propagation delays. tf tr 90 % nE input VM 10 % t PLZ output LOW - to - OFF OFF - to - LOW t PZL 50 % 10 % t PHZ 90 % output HIGH - to - OFF OFF - to - HIGH MGA846 t PZH 50 % outputs disabled outputs enabled outputs enabled 74HC4066: VM = 50 %; VI = GND to VCC. 74HCT4066: VM = 1.3 V; VI = GND to 3 V. Fig.20 Waveforms showing the turn-on and turn-off times. 2004 Nov 11 19 Philips Semiconductors Product specification Quad bilateral switches 74HC4066; 74HCT4066 TEST CIRCUIT AND WAVEFORMS VCC Vis handbook, full pagewidth PULSE GENERATOR VI VCC VO RL switch open D.U.T. CL RT GND MGR273 TEST SWITCH Vis tPZH GND VCC tPZL VCC GND tPHZ GND VCC tPLZ VCC GND other open pulse Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance ZO of the pulse generator. tf = 6 ns; when measuring fmax, there is no constraint to tr and tf with 50 % duty factor. Fig.21 Test circuit for measuring AC performance. tW handbook, full pagewidth amplitude 90% negative input pulse VM 10% 0V tTHL (tf) tTLH (tr) tTLH (tr) tTHL (tf) amplitude 90% positive input pulse VM 10% 0V tW MGR274 tr and tf FAMILY AMPLITUDE VM fmax; PULSE WIDTH OTHER 74HC4066 VCC 50 % <2 ns 6 ns 74HCT4066 3.0 V 1.3 V <2 ns 6 ns Fig.22 Input pulse definitions. 2004 Nov 11 20 Philips Semiconductors Product specification Quad bilateral switches 74HC4066; 74HCT4066 PACKAGE OUTLINES DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1 ME seating plane D A2 A A1 L c e Z w M b1 (e 1) b MH 8 14 pin 1 index E 1 7 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.2 0.51 3.2 1.73 1.13 0.53 0.38 0.36 0.23 19.50 18.55 6.48 6.20 2.54 7.62 3.60 3.05 8.25 7.80 10.0 8.3 0.254 2.2 inches 0.17 0.02 0.13 0.068 0.044 0.021 0.015 0.014 0.009 0.77 0.73 0.26 0.24 0.1 0.3 0.14 0.12 0.32 0.31 0.39 0.33 0.01 0.087 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT27-1 050G04 MO-001 SC-501-14 2004 Nov 11 21 EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-13 Philips Semiconductors Product specification Quad bilateral switches 74HC4066; 74HCT4066 SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 D E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index Lp 1 L 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 8.75 8.55 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.01 0.019 0.0100 0.35 0.014 0.0075 0.34 0.16 0.15 0.010 0.057 inches 0.069 0.004 0.049 0.05 0.244 0.039 0.041 0.228 0.016 0.028 0.024 0.01 0.01 0.028 0.004 0.012 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT108-1 076E06 MS-012 2004 Nov 11 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 22 o 8 o 0 Philips Semiconductors Product specification Quad bilateral switches 74HC4066; 74HCT4066 SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm D SOT337-1 E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index Lp L 7 1 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 1.4 0.9 8 o 0 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT337-1 2004 Nov 11 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-150 23 o Philips Semiconductors Product specification Quad bilateral switches 74HC4066; 74HCT4066 TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 E D A X c y HE v M A Z 8 14 Q (A 3) A2 A A1 pin 1 index Lp L 1 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.72 0.38 8 o 0 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT402-1 2004 Nov 11 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 MO-153 24 o Philips Semiconductors Product specification Quad bilateral switches 74HC4066; 74HCT4066 DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT762-1 14 terminals; body 2.5 x 3 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 6 y y1 C v M C A B w M C b L 1 7 14 8 Eh e 13 9 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A(1) max. A1 b c D (1) Dh E (1) Eh e e1 L v w y y1 mm 1 0.05 0.00 0.30 0.18 0.2 3.1 2.9 1.65 1.35 2.6 2.4 1.15 0.85 0.5 2 0.5 0.3 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT762-1 --- MO-241 --- 2004 Nov 11 25 EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Philips Semiconductors Product specification Quad bilateral switches 74HC4066; 74HCT4066 DATA SHEET STATUS LEVEL DATA SHEET STATUS(1) PRODUCT STATUS(2)(3) Development DEFINITION I Objective data II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Production This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS DISCLAIMERS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Right to make changes Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 2004 Nov 11 26 Philips Semiconductors - a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. SCA76 (c) Koninklijke Philips Electronics N.V. 2004 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands R44/05/pp27 Date of release: 2004 Nov 11 Document order number: 9397 750 14188