DATA SH EET
Product specification
Supersedes data of 2003 Jun 17 2004 Nov 11
INTEGRATED CIRCUITS
74HC4066; 74HCT4066
Quad bilateral switches
2004 Nov 11 2
Philips Semiconductors Product specification
Quad bilateral switches 74HC4066; 74HCT4066
FEATURES
•Very low ON-resistance:
–50Ω(typical) at VCC = 4.5 V
–45Ω(typical) at VCC = 6.0 V
–35Ω(typical) at VCC = 9.0 V.
•Complies with JEDEC standard no. 7A
•ESD protection:
HBM EIA/JESD22-A114-B exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
•Specified from −40 °C to +85 °C and −40 °C to +125 °C.
GENERAL DESCRIPTION
The 74HC4066 and 74HCT4066 are high-speed Si-gate
CMOS devices and are pin compatible with the
HEF4066B. They are specified in compliance with JEDEC
standard no. 7A.
The 74HC4066 and 74HCT4066 have four independent
analog switches. Each switch has two input/output pins
(pins nY or nZ) and an active HIGH enable input pin
(pin nE).Whenpin nE = LOWthebelonginganalogswitch
is turned off.
The 74HC4066 and 74HCT4066 are pin compatible with
the 74HC4016 and 74HCT4016 but exhibit a much lower
on-resistance. In addition, the on-resistance is relatively
constant over the full input signal range.
QUICK REFERENCE DATA
GND = 0 V; Tamb =25°C; tr=t
f= 6 ns.
Notes
1. CPD is used to determine the dynamic power dissipation (PDin µW).
PD=C
PD ×VCC2×fi×N+Σ[(CL+C
S)×VCC2×fo] where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
CS= maximum switch capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ[(CL+C
S)×VCC2×fo] = sum of the outputs.
2. For 74HC4066 the condition is VI= GND to VCC.
For 74HCT4066 the condition is VI= GND to VCC −1.5 V.
SYMBOL PARAMETER CONDITIONS TYPICAL UNIT
74HC4066 74HCT4066
tPZH/tPZL turn-on time nE to Vos CL= 15 pF; RL=1kΩ; VCC =5V1112ns
tPHZ/tPLZ turn-off time nE to Vos CL= 15 pF; RL=1kΩ; VCC =5V1316ns
CIinput capacitance 3.5 3.5 pF
CPD power dissipation
capacitance per switch notes 1 and 2 11 12 pF
CSmaximum switch
capacitance 88pF
2004 Nov 11 3
Philips Semiconductors Product specification
Quad bilateral switches 74HC4066; 74HCT4066
FUNCTION TABLE
See note 1.
Note
1. H = HIGH voltage level.
L = LOW voltage level.
ORDERING INFORMATION
INPUT nE SWITCH
L off
Hon
TYPE NUMBER PACKAGE
TEMPERATURE RANGE PINS PACKAGE MATERIAL CODE
74HC4066N −40 °C to 125 °C 14 DIP14 plastic SOT27-1
74HCT4066N −40 °C to 125 °C 14 DIP14 plastic SOT27-1
74HC4066D −40 °C to 125 °C 14 SO14 plastic SOT108-1
74HCT4066D −40 °C to 125 °C 14 SO14 plastic SOT108-1
74HC4066DB −40 °C to 125 °C 14 SSOP14 plastic SOT337-1
74HCT4066DB −40 °C to 125 °C 14 SSOP14 plastic SOT337-1
74HC4066PW −40 °C to 125 °C 14 TSSOP14 plastic SOT402-1
74HCT4066PW −40 °C to 125 °C 14 TSSOP14 plastic SOT402-1
74HC4066BQ −40 °C to 125 °C 14 DHVQFN14 plastic SOT762-1
74HCT4066BQ −40 °C to 125 °C 14 DHVQFN14 plastic SOT762-1
PINNING
PIN SYMBOL DESCRIPTION
1 1Y independent input/output
2 1Z independent input/output
3 2Z independent input/output
4 2Y independent input/output
5 2E enable input (active HIGH)
6 3E enable input (active HIGH)
7 GND ground (0 V)
8 3Y independent input/output
9 3Z independent input/output
10 4Z independent input/output
11 4Y independent input/output
12 4E enable input (active HIGH)
13 1E enable input (active HIGH)
14 VCC supply voltage
handbook, halfpage
MGR253
4066
1
2
3
4
5
6
78
14
13
12
11
10
9
1Y
1Z
2Z
2Y
2E
3E
GND 3Y
3Z
4Z
4Y
4E
1E
VCC
Fig.1 Pin configuration DIP14, SO14 and
(T)SSOP14.
2004 Nov 11 4
Philips Semiconductors Product specification
Quad bilateral switches 74HC4066; 74HCT4066
001aac116
4066
Transparent top view
3E 3Z
2E 4Z
2Y 4Y
2Z 4E
1Z 1E
GND
3Y
1Y
VCC
6 9
5 10
4 11
3 12
2 13
7
8
1
14
terminal 1
index area
VCC(1)
Fig.2 Pin configuration DHVQFN14.
(1) The die substrate is attached to this pad using conductive die
attach material. It can not be used as a supply pin or input.
handbook, halfpage
MGR254
13 11Y
21Z
42Y
32Z
83Y
93Z
114Y
104Z
1E
52E
63E
12 4E
Fig.3 Logic symbol.
handbook, halfpage
MGR255
13 #
5#
6#
12 #
12
43
89
11 10
handbook, halfpage
MGR256
13 #
5#
6#
12 #
111
X1
11
X1
11
X1
11
X1
2
43
89
11 10
Fig.4 IEEEC logic symbol.
2004 Nov 11 5
Philips Semiconductors Product specification
Quad bilateral switches 74HC4066; 74HCT4066
handbook, halfpage
MGR257
11
4Y
12
4E
4Z
10
3Z
9
2Z
3
1Z
2
8
3Y
6
3E
4
2Y
5
2E
1
1Y
13
1E
Fig.5 Functional diagram.
handbook, halfpage
MGR258
VCC
GND
nE
nZ
nY
VCC
Fig.6 Schematic diagram (one switch).
2004 Nov 11 6
Philips Semiconductors Product specification
Quad bilateral switches 74HC4066; 74HCT4066
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
Notes
1. To avoid drawing VCC current out of pin nZ, when switch current flows in pin nY, the voltage drop across the
bidirectional switch must not exceed 0.4 V. If the switch current flows into pin nZ, no VCC current will flow out of
pin nY. In this case there is no limit for the voltage drop across the switch, but the voltages at pins nY and nZ may
not exceed VCC or GND.
2. For DIP14 packages: above 70 °C derate linearly with 12 mW/K.
For SO14 packages: above 70 °C derate linearly with 8 mW/K.
For SSOP14 and TSSOP16 packages: above 60 °C derate linearly with 5.5 mW/K.
For DHVQFN14 packages: above 60 °C derate linearly with 4.5 mW/K.
SYMBOL PARAMETER CONDITIONS 74HC4066 74HCT4066 UNIT
MIN. TYP. MAX. MIN. TYP. MAX.
VCC supply voltage 2.0 5.0 10.0 4.5 5.0 5.5 V
VIinput voltage GND −VCC GND −VCC V
VSswitch voltage GND −VCC GND −VCC V
Tamb ambient temperature see DC and AC
characteristics
per device
−40 +25 +85 −40 +25 +85 °C
−40 −+125 −40 −+125 °C
tr,t
finput rise and fall times VCC = 2.0 V −6.0 1000 −6.0 500 ns
VCC = 4.5 V −−500 −−−ns
VCC = 6.0 V −−400 −−−ns
VCC = 10.0 V −−250 −−−ns
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VCC supply voltage −0.5 +11.0 V
IIK input diode current VI<−0.5 Vor VI>V
CC + 0.5 V −±20 mA
ISK switch diode current VS<−0.5 Vor VS>V
CC + 0.5 V −±20 mA
ISswitch current −0.5V<V
O<V
CC + 0.5 V; note 1 −±25 mA
ICC, IGND VCC or GND current −±50 mA
Tstg storage temperature −65 +150 °C
Ptot power dissipation Tamb =−40 °C to +125 °C; note 2 −500 mW
PSpower dissipation per switch −100 mW
2004 Nov 11 7
Philips Semiconductors Product specification
Quad bilateral switches 74HC4066; 74HCT4066
DC CHARACTERISTICS
Family 74HC4066
Voltages are referenced to GND (ground = 0 V); Vis is the input voltage at pins nY or nZ, whichever is assigned as an
input; Vos is the output voltage at pins nY or nZ, whichever is assigned as an output.
SYMBOL PARAMETER TEST CONDITIONS MIN. TYP. MAX. UNIT
OTHER VCC (V)
Tamb =−40 °C to +85 °C; note 1
VIH HIGH-level input
voltage 2.0 1.5 1.2 −V
4.5 3.15 2.4 −V
6.0 4.2 3.2 −V
9.0 6.3 4.7 −V
VIL LOW-level input voltage 2.0 −0.8 0.50 V
4.5 −2.1 1.35 V
6.0 −2.8 1.80 V
9.0 −4.3 2.70 V
ILI input leakage current VI=V
CC or GND 6.0 −−±1.0 µA
10.0 −−±2.0 µA
IS(OFF) analog switch current
OFF-state per channel; VI=V
IH or VIL;
VS=V
CC −GND; see Fig.7 10.0 −−±1.0 µA
IS(ON) analog switch current
ON-state VI=V
IH or VIL; VS=V
CC −GND;
see Fig.8 10.0 −−±1.0 µA
ICC quiescent supply
current VI=V
CC or GND; Vis = GND or VCC;
Vos =V
CC or GND 6.0 −−20.0 µA
10.0 −−40.0 µA
2004 Nov 11 8
Philips Semiconductors Product specification
Quad bilateral switches 74HC4066; 74HCT4066
Note
1. All typical values are measured at Tamb =25°C.
Tamb =−40 °C to +125 °C
VIH HIGH-level input
voltage 2.0 1.5 −−V
4.5 3.15 −−V
6.0 4.2 −−V
9.0 6.3 −−V
VIL LOW-level input voltage 2.0 −−0.50 V
4.5 −−1.35 V
6.0 −−1.80 V
9.0 −−2.70 V
ILI input leakage current VI=V
CC or GND 6.0 −−±1.0 µA
10.0 −−±2.0 µA
IS(OFF) analog switch current
OFF-state per channel; VI=V
IH or VIL;
VS=V
CC −GND; see Fig.7 10.0 −−±1.0 µA
IS(ON) analog switch current
ON-state VI=V
IH or VIL; VS=V
CC −GND; see
Fig.8 10.0 −−±1.0 µA
ICC quiescent supply
current VI=V
CC or GND; Vis = GND or VCC;
Vos =V
CC or GND 6.0 −−40.0 µA
10.0 −−80.0 µA
SYMBOL PARAMETER TEST CONDITIONS MIN. TYP. MAX. UNIT
OTHER VCC (V)
2004 Nov 11 9
Philips Semiconductors Product specification
Quad bilateral switches 74HC4066; 74HCT4066
Family 74HCT4066
Voltages are referenced to GND (ground = 0 V); Vis is the input voltage at pins nY or nZ, whichever is assigned as an
input; Vos is the output voltage at pins nY or nZ, whichever is assigned as an output.
Note
1. All typical values are measured at Tamb =25°C.
SYMBOL PARAMETER TEST CONDITIONS MIN. TYP. MAX. UNIT
OTHER VCC (V)
Tamb =−40 °C to +85 °C; note 1
VIH HIGH-level input
voltage 4.5 to 5.5 2.0 1.6 −V
VIL LOW-level input voltage 4.5 to 5.5 −1.2 0.8 V
ILI input leakage current VI=V
CC or GND 5.5 −−±1.0 µA
IS(OFF) analog switch current
OFF-state per channel; VI=V
IH or VIL;
VS=V
CC −GND; see Fig.7 5.5 −−±1.0 µA
IS(ON) analog switch current
ON-state VI=V
IH or VIL; VS=V
CC −GND; see
Fig.8 5.5 −−±1.0 µA
ICC quiescent supply
current VI=V
CC or GND; Vis = GND or VCC;
Vos =V
CC or GND 4.5 to 5.5 −−20.0 µA
∆ICC additional quiescent
supply current per input VI=V
CC −2.1 V; other inputs at VCC
or GND 4.5 to 5.5 −100 450 µA
Tamb =−40 °C to +125 °C
VIH HIGH-level input
voltage 4.5 to 5.5 2.0 −− V
VIL LOW-level input voltage 4.5 to 5.5 −−0.8 V
ILI input leakage current VI=V
CC or GND 5.5 −−±1.0 µA
IS(OFF) analog switch current
OFF-state per channel; VI=V
IH or VIL;
VS=V
CC −GND; see Fig.7 10.0 −−±1.0 µA
IS(ON) analog switch current
ON-state VI=V
IH or VIL; VS=V
CC −GND; see
Fig.8 10.0 −−±1.0 µA
ICC quiescent supply
current VI=V
CC or GND; Vis = GND or VCC;
Vos =V
CC or GND 4.5 to 5.5 −−40.0 µA
∆ICC additional quiescent
supply current per input VI=V
CC −2.1 V; other inputs at VCC
or GND 4.5 to 5.5 −−490 µA
2004 Nov 11 10
Philips Semiconductors Product specification
Quad bilateral switches 74HC4066; 74HCT4066
handbook, full pagewidth
MGR260
AA nY nZ
VI = VCC or GND VO = GND or VCC
LOW
(from enable inputs)
GND
Fig.7 Test circuit for measuring OFF-state current.
handbook, full pagewidth
MGR261
AA nY nZ
VI = VCC or GND VO (open circuit)
HIGH
(from enable inputs)
GND
Fig.8 Test circuit for measuring ON-state current.
2004 Nov 11 11
Philips Semiconductors Product specification
Quad bilateral switches 74HC4066; 74HCT4066
Resistance RON for 74HC4066 and 74HCT4066
For 74HC4066: VCC = 2.0, 4.5, 6.0 and 9.0 V; for 74HCT4066: VCC = 4.5 V; note 1; Vis is the input voltage at pins nY
or nZ, whichever is assigned as an input; see Fig.9.
Notes
1. At supply voltages approaching 2 V, the analog ON-resistance switch becomes extremely non-linear. Therefore, it is
recommended that these devices are being used to transmit digital signals only, when using these supply voltages.
2. All typical values are measured at Tamb =25°C.
SYMBOL PARAMETER TEST CONDITIONS MIN. TYP. MAX. UNIT
OTHER IS (µA) VCC (V)
Tamb =−40 °C to +85 °C; note 2
RON(peak) ON-resistance
(peak) VI=V
IH or VIL; Vis =V
CC to GND 100 2.0 −−−Ω
1000 4.5 −54 118 Ω
6.0 −42 105 Ω
9.0 −32 88 Ω
RON(rail) ON-resistance
(rail) VI=V
IH or VIL; Vis = GND 100 2.0 −80 −Ω
1000 4.5 −35 95 Ω
6.0 −27 82 Ω
9.0 −20 70 Ω
VI=V
IH or VIL; Vis =V
CC 100 2.0 −100 −Ω
1000 4.5 −42 106 Ω
6.0 −35 94 Ω
9.0 −27 78 Ω
∆RON maximum
variation of
ON-resistance
between any two
channels
VI=V
IH or VIL; Vis =V
CC to GND −2.0 −−−Ω
4.5 −5−Ω
6.0 −4−Ω
9.0 −3−Ω
Tamb =−40 °C to +125 °C
RON(peak) ON-resistance
(peak) VI=V
IH or VIL; Vis =V
CC to GND 100 2.0 −−−Ω
1000 4.5 −−142 Ω
6.0 −−126 Ω
9.0 −−105 Ω
RON(rail) ON-resistance
(rail) VI=V
IH or VIL; Vis = GND 100 2.0 −−−Ω
1000 4.5 −−115 Ω
6.0 −−100 Ω
9.0 −−85 Ω
VI=V
IH or VIL; Vis =V
CC 100 2.0 −−−Ω
1000 4.5 −−128 Ω
6.0 −−113 Ω
9.0 −−95 Ω
2004 Nov 11 12
Philips Semiconductors Product specification
Quad bilateral switches 74HC4066; 74HCT4066
handbook, full pagewidth
MGR259
V
nY nZ
Is
Vis = 0 to VCC − GND
HIGH
(from enable inputs)
GND
Fig.9 Test circuit for measuring ON-resistance (RON).
handbook, halfpage
09
60
10
20
MGR262
30
40
50
1.8 3.6 5.4 7.2 Vis (V)
RON
(Ω)
6 V
9 V
VCC = 4.5 V
Fig.10 Typical ON-resistance (RON) as a function of input voltage (Vis).
Vis =0VtoV
CC.
2004 Nov 11 13
Philips Semiconductors Product specification
Quad bilateral switches 74HC4066; 74HCT4066
AC CHARACTERISTICS
Type 74HC4066
GND = 0 V; tr=t
f= 6 ns; CL= 50 pF; Vis is the input voltage at pins nY or nZ, whichever is assigned as an input; Vos is
the output voltage at pins nY or nZ, whichever is assigned as an output.
Note
1. All typical values are measured at Tamb =25°C.
SYMBOL PARAMETER TEST CONDITIONS MIN. TYP. MAX. UNIT
OTHER VCC (V)
Tamb =−40 °C to +85 °C; note 1
tPHL/tPLH propagation delay
Vis to Vos
RL=∞; see Fig.19 2.0 −875ns
4.5 −315ns
6.0 −213ns
9.0 −210ns
tPZH/tPZL turn-on time nE to Vos RL=1kΩ; see Figs 20 and 21 2.0 −36 125 ns
4.5 −13 25 ns
6.0 −10 21 ns
9.0 −816ns
tPHZ/tPLZ turn-off time nE to Vos RL=1kΩ; see Figs 20 and 21 2.0 −44 190 ns
4.5 −16 38 ns
6.0 −13 33 ns
9.0 −16 26 ns
Tamb =−40 °C to +125 °C
tPHL/tPLH propagation delay
Vis to Vos
RL=∞; see Fig.19 2.0 −−90 ns
4.5 −−18 ns
6.0 −−15 ns
9.0 −−12 ns
tPZH/tPZL turn-on time nE to Vos RL=1kΩ; see Figs 20 and 21 2.0 −−150 ns
4.5 −−30 ns
6.0 −−26 ns
9.0 −−20 ns
tPHZ/tPLZ turn-off time nE to Vos RL=1kΩ; see Figs 20 and 21 2.0 −−225 ns
4.5 −−45 ns
6.0 −−38 ns
9.0 −−30 ns
2004 Nov 11 14
Philips Semiconductors Product specification
Quad bilateral switches 74HC4066; 74HCT4066
Type 74HCT4066
GND = 0 V; tr=t
f= 6 ns; CL= 50 pF; Vis is the input voltage at pins nY or nZ, whichever is assigned as an input; Vos is
the output voltage at pins nY or nZ, whichever is assigned as an output.
Note
1. All typical values are measured at Tamb =25°C.
74HC4066 and 74HCT4066
At recommended conditions and typical values; GND = 0 V; tr=t
f= 6 ns; Vis is the input voltage at pins nY or nZ,
whichever is assigned as an input; Vos is the output voltage at pins nY or nZ, whichever is assigned as an output.
Notes
1. Adjust input voltage Vis is 0 dBM level (0 dBM = 1 mW into 600 Ω).
2. Adjust input voltage Vis is 0 dBM level at Vos for 1 MHz (0 dBM = 1 mW into 50 Ω).
SYMBOL PARAMETER TEST CONDITIONS MIN. TYP. MAX. UNIT
OTHER VCC (V)
Tamb =−40 °C to +85 °C; note 1
tPHL/tPLH propagation delay
Vis to Vos
RL=∞; see Fig.19 4.5 −315ns
tPZH/tPZL turn-on time nE to Vos RL=1kΩ; see Figs 20 and 21 4.5 −12 30 ns
tPHZ/tPLZ turn-off time nE to Vos RL=1kΩ; see Figs 20 and 21 4.5 −20 44 ns
Tamb =−40 °C to +125 °C
tPHL/tPLH propagation delay
Vis to Vos
RL=∞; see Fig.19 4.5 −−18 ns
tPZH/tPZL turn-on time nE to Vos RL=1kΩ; see Figs 20 and 21 4.5 −−36 ns
tPHZ/tPLZ turn-off time nE to Vos RL=1kΩ; see Figs 20 and 21 4.5 −−53 ns
SYMBOL PARAMETER CONDITIONS TYP. UNIT
OTHER Vis(p-p) (V) VCC (V)
dsin sine wave distortion f = 1 kHz; RL=10kΩ; CL=50pF;
see Fig.17 4.0 4.5 0.04 %
8.0 9.0 0.02 %
f = 10 kHz; RL=10kΩ;C
L=50pF;
see Fig.17 4.0 4.5 0.12 %
8.0 9.0 0.06 %
αOFF(feedthr) switch OFF signal
feed-through RL= 600 Ω; CL= 50 pF; f = 1 MHz;
see Figs 11 and 18 note 1 4.5 −50 dB
9.0 −50 dB
αct(s) crosstalk between any two
switches RL= 600 Ω; CL= 50 pF; f = 1 MHz;
see Fig.13 note 1 4.5 −60 dB
9.0 −60 dB
Vct(p-p) crosstalk voltage between
any input to any switch
(peak-to-peak value)
RL= 600 Ω; CL= 50 pF; f = 1 MHz;
see Fig.15 (nE, square wave
between VCC and GND,
tr=t
f= 6 ns)
−4.5 110 mV
9.0 220 mV
fmax minimum frequency
response (−3 dB) RL=50Ω;C
L= 10 pF; see Figs 12
and 16 note 2 4.5 180 MHz
9.0 200 MHz
CSmaximum switch
capacitance −−8pF
2004 Nov 11 15
Philips Semiconductors Product specification
Quad bilateral switches 74HC4066; 74HCT4066
handbook, full pagewidth
−100
0
−80
−60
−40
−20
MGR263
10 102103104105106
(dB)
f (kHz)
Fig.11 Typical switch OFF signal feed-through as a function of frequency.
Test conditions: VCC = 4.5 V; GND = 0 V; RL=50Ω; Rsource =1kΩ.
handbook, full pagewidth
−5
5
0
MGR264
10 102103104105106
(dB)
f (kHz)
Fig.12 Typical frequency response.
Test conditions: VCC = 4.5 V; GND = 0 V; RL=50Ω; Rsource =1kΩ.
2004 Nov 11 16
Philips Semiconductors Product specification
Quad bilateral switches 74HC4066; 74HCT4066
handbook, full pagewidth
0.1 µF
2RL
2RL
RL
VCC
VI
CL
nZ/nYnY/nZ
GND
channel
ON
MGR265
Fig.13 Test circuit for measuring crosstalk between any two switches; channels ON condition.
handbook, full pagewidth
2RL2RL
2RL
Vos
VCC
2RL
VCC
CLdB
nZ/nYnY/nZ
GND
MGR266
channel
OFF
Fig.14 Test circuit for measuring crosstalk between any two switches; channels OFF condition.
2004 Nov 11 17
Philips Semiconductors Product specification
Quad bilateral switches 74HC4066; 74HCT4066
handbook, full pagewidth
D.U.T.
2RL2RL
2RL
Vos
VCC
2RL
VCC VCC
GND
CLoscilloscope
nZ/nYnY/nZ
GND
MGR268
nE
f
page
MGR267
Vct(p-p)
Fig.15 Test circuit for measuring crosstalk between control and any switch.
The crosstalk is defined as follows
(oscilloscope output).
handbook, full pagewidth
0.1 µF
2RL
2RL
Vos
VCC
Vis
CLdB
nZ/nYnY/nZ
GND
MGR269
sine-wave
channel
ON
Fig.16 Test circuit for measuring minimum frequency response.
Adjust input voltage to obtain 0 dB at Vos when fi= 1 MHz. After set-up, the frequency of fi is increased to obtain a reading of -3 dB at Vos.
2004 Nov 11 18
Philips Semiconductors Product specification
Quad bilateral switches 74HC4066; 74HCT4066
handbook, full pagewidth
MGR270
10 µF
2RL
2RL
Vos
VCC
Vis
CLDISTORTION
METER
nZ/nYnY/nZ
GND
fi = 1 kHz
sine-wave
channel
ON
Fig.17 Test circuit for measuring sine wave distortion.
handbook, full pagewidth
0.1 µF
2RL
2RL
Vos
VCC
Vis
CLdB
nZ/nYnY/nZ
GND
channel
OFF
MGR271
Fig.18 Test circuit for measuring switch OFF signal feed-through.
2004 Nov 11 19
Philips Semiconductors Product specification
Quad bilateral switches 74HC4066; 74HCT4066
AC WAVEFORMS
handbook, full pagewidth
MGR272
Vos 50%
Vis
trtf
tPLH tPHL
GND
VCC
90%
50%
10%
Fig.19 Waveforms showing the input (Vis) to output (Vos) propagation delays.
MGA846
tPLZ tPZL
VM
outputs
disabled outputs
enabled
tPZH
90 %
tPHZ
10 %
90 %
tr
tf
outputs
enabled
nE input
output
LOW - to - OFF
OFF - to - LOW
output
HIGH - to - OFF
OFF - to - HIGH 50 %
50 %
10 %
Fig.20 Waveforms showing the turn-on and turn-off times.
74HC4066: VM= 50 %; VI= GND to VCC.
74HCT4066: VM= 1.3 V; VI= GND to 3 V.
2004 Nov 11 20
Philips Semiconductors Product specification
Quad bilateral switches 74HC4066; 74HCT4066
TEST CIRCUIT AND WAVEFORMS
handbook, full pagewidth
open
GND
RL
Vis VCC
VIVO
MGR273
D.U.T.
CL
RT
PULSE
GENERATOR
VCC
switch
Fig.21 Test circuit for measuring AC performance.
TEST SWITCH Vis
tPZH GND VCC
tPZL VCC GND
tPHZ GND VCC
tPLZ VCC GND
other open pulse
Definitions for test circuit:
RL= Load resistance.
CL= Load capacitance including jig and probe capacitance.
RT= Termination resistance should be equal to the output impedance ZOof the pulse generator.
tf= 6 ns; when measuring fmax, there is no
constraint to tr and tf with 50 % duty factor.
handbook, full pagewidth
MGR274
tTHL (tf)t
TLH (tr)
VM
tW
positive
input pulse
negative
input pulse
0 V
amplitude
90%
10%
tTLH (tr)t
THL (tf)
VM
tW
0 V
amplitude
90%
10%
Fig.22 Input pulse definitions.
FAMILY AMPLITUDE VM
tr and tf
fmax; PULSE
WIDTH OTHER
74HC4066 VCC 50 % <2ns 6ns
74HCT4066 3.0 V 1.3 V <2ns 6ns
2004 Nov 11 21
Philips Semiconductors Product specification
Quad bilateral switches 74HC4066; 74HCT4066
PACKAGE OUTLINES
UNIT A
max.
1 2 (1) (1)
b
1
cD
(1)
Z
Ee M
H
L
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm
inches
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
SOT27-1 99-12-27
03-02-13
A
min. A
max. bmax.
w
M
E
e
1
1.73
1.13 0.53
0.38 0.36
0.23 19.50
18.55 6.48
6.20 3.60
3.05 0.2542.54 7.62 8.25
7.80 10.0
8.3 2.24.2 0.51 3.2
0.068
0.044 0.021
0.015 0.77
0.73
0.014
0.009 0.26
0.24 0.14
0.12 0.010.1 0.3 0.32
0.31 0.39
0.33 0.0870.17 0.02 0.13
050G04 MO-001 SC-501-14
M
H
c
(e )
1
M
E
A
L
seating plane
A
1
w
M
b
1
e
D
A
2
Z
14
1
8
7
b
E
pin 1 index
0 5 10 mm
scale
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1
2004 Nov 11 22
Philips Semiconductors Product specification
Quad bilateral switches 74HC4066; 74HCT4066
UNIT A
max. A
1
A
2
A
3
b
p
cD
(1)
E
(1) (1)
eH
E
LL
p
QZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm
inches
1.75 0.25
0.10 1.45
1.25 0.25 0.49
0.36 0.25
0.19 8.75
8.55 4.0
3.8 1.27 6.2
5.8 0.7
0.6 0.7
0.3 8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.0
0.4
SOT108-1
X
w
M
θ
A
A
1
A
2
b
p
D
H
E
L
p
Q
detail X
E
Z
e
c
L
v
M
A
(A )
3
A
7
8
1
14
y
076E06 MS-012
pin 1 index
0.069 0.010
0.004 0.057
0.049 0.01 0.019
0.014 0.0100
0.0075 0.35
0.34 0.16
0.15 0.05
1.05
0.041
0.244
0.228 0.028
0.024 0.028
0.012
0.01
0.25
0.01 0.004
0.039
0.016
99-12-27
03-02-19
0 2.5 5 mm
scale
SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
2004 Nov 11 23
Philips Semiconductors Product specification
Quad bilateral switches 74HC4066; 74HCT4066
UNIT A
1
A
2
A
3
b
p
cD
(1)
E
(1)
eH
E
LL
p
QZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.21
0.05 1.80
1.65 0.25 0.38
0.25 0.20
0.09 6.4
6.0 5.4
5.2 0.65 1.25 0.2
7.9
7.6 1.03
0.63 0.9
0.7 1.4
0.9 8
0
o
o
0.13 0.1
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
SOT337-1 99-12-27
03-02-19
(1)
w
M
b
p
D
H
E
E
Z
e
c
v
M
A
X
A
y
17
14 8
θ
A
A
1
A
2
L
p
Q
detail X
L
(A )
3
MO-150
pin 1 index
0 2.5 5 mm
scale
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1
A
max.
2
2004 Nov 11 24
Philips Semiconductors Product specification
Quad bilateral switches 74HC4066; 74HCT4066
UNIT A
1
A
2
A
3
b
p
cD
(1)
E
(2) (1)
eH
E
LL
p
QZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.15
0.05 0.95
0.80 0.30
0.19 0.2
0.1 5.1
4.9 4.5
4.3 0.65 6.6
6.2 0.4
0.3 0.72
0.38 8
0
o
o
0.13 0.10.21
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
0.75
0.50
SOT402-1 MO-153 99-12-27
03-02-18
w
M
b
p
D
Z
e
0.25
17
14 8
θ
A
A
1
A
2
L
p
Q
detail X
L
(A )
3
H
E
E
c
v
M
A
X
A
y
0 2.5 5 mm
scale
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1
A
max.
1.1
pin 1 index
2004 Nov 11 25
Philips Semiconductors Product specification
Quad bilateral switches 74HC4066; 74HCT4066
terminal 1
index area
0.51
A1Eh
b
UNIT ye
0.2
c
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 3.1
2.9
Dh
1.65
1.35
y1
2.6
2.4 1.15
0.85
e1
2
0.30
0.18
0.05
0.00 0.05 0.1
DIMENSIONS (mm are the original dimensions)
SOT762-1 MO-241 - - -- - -
0.5
0.3
L
0.1
v
0.05
w
0 2.5 5 mm
scale
SOT762-1
DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
14 terminals; body 2.5 x 3 x 0.85 mm
A
(1)
max.
AA1c
detail X
y
y1C
e
L
Eh
Dh
e
e1
b
26
13 9
8
7
1
14
X
D
E
C
BA
02-10-17
03-01-27
terminal 1
index area
AC
CB
v
M
w
M
E
(1)
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
D
(1)
2004 Nov 11 26
Philips Semiconductors Product specification
Quad bilateral switches 74HC4066; 74HCT4066
DATA SHEET STATUS
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
LEVEL DATA SHEET
STATUS(1) PRODUCT
STATUS(2)(3) DEFINITION
I Objective data Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II Preliminary data Qualification This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III Product data Production This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
DEFINITIONS
Short-form specification The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
attheseorat any otherconditionsabovethosegiven in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Application information Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentationorwarrantythatsuchapplicationswillbe
suitable for the specified use without further testing or
modification.
DISCLAIMERS
Life support applications These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductorscustomersusingorsellingtheseproducts
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes Philips Semiconductors
reserves the right to make changes in the products -
including circuits, standard cells, and/or software -
described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
© Koninklijke Philips Electronics N.V. 2004 SCA76
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Philips Semiconductors – a world wide company
Contact information
For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
Printed in The Netherlands R44/05/pp27 Date of release: 2004 Nov 11 Document order number: 9397 750 14188
