1. General description
The TJA1042 is a high-speed CAN transceiver that provides an interface between a
Controller Area Network (CAN) protocol controller and the physical two-wire CAN bus.
The transceiver is designed for high-speed (up to 1 Mbit/s) CAN applications in the
automotive industry, providing the differential transmit and receive capability to (a
microcontroller with) a CAN protocol controller.
The TJA1042 belongs to the third generation of high-speed CAN transceivers from NXP
Semiconductors, offering significant improvements over first- and second-generation
devices such as the TJA1040. It offers improved ElectroMagnetic Compatibility (EMC)
and ElectroStatic Discharge (ESD) performance, and also features:
•Ideal passive behavior to the CAN bus when the supply voltage is off
•A very low-current Standby mode with bus wake-up capability
•TJA1042T/3 an d TJ A1 04 2T K/ 3 can be inter fa ced directly to microcontrollers with
supply voltages from 3Vto5V
These features make the TJA1042 an excellent choice for all types of HS-CAN networks,
in nodes that require a low-power mode with wake-up capability via the CAN bus.
2. Features and benefits
2.1 General
Fully ISO 11898-2 and ISO 11898-5 compliant
Suitable for 12 V and 24 V systems
Low ElectroMagnetic Emission (EME) and high ElectroMagnetic Immunity (EMI)
VIO input on TJA1042T/3 and TJA1042TK/3 allows for direct interfacing with 3 V to 5 V
microcontrollers (available in SO8 and very small HVSON8 packages respectively)
SPLIT voltage output on TJA1042T for stabilizing the recessive bus level (available in
SO8 package only)
Available in SO8 and HVSON8 packages
Leadless HVSON8 package (3.0 mm 3.0 mm) with improved Automated Optical
Inspection (AOI) capability
Dark green product (halogen free and Restriction of Hazardous Subst ances (RoHS)
compliant)
2.2 Low-power management
Very low-current Standby mode with host and bus wake-up capability
Functional behavior predictable under all supply conditions
TJA1042
High-speed CAN transceiver with Standby mode
Rev. 7 — 8 May 2012 Product data sheet
TJA1042 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 7 — 8 May 2012 2 of 22
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode
Transceiver disengages from the bus when not powered up (zero load)
2.3 Protections
High ESD handling capability on the bus pins
Bus pins protected against transients in automotive environments
Transmit Data (TXD) dominant time-out function
Bus-dominant time-out function in Standby mode
Undervoltage detectio n on pin s VCC and VIO
Thermally protected
3. Quick reference data
4. Ordering information
[1] TJA1042T with SPLIT pin; TJA1042T/3 and TJA1042TK/3 with VIO pin.
Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VCC supply voltage 4.5 - 5.5 V
Vuvd(VCC) undervoltage detection voltage on pin
VCC
3.5 - 4.5 V
ICC supply current St andby mode - 10 15 A
Normal mode; bus recessive 2.5 5 10 mA
Normal mode; bus dominant 20 45 70 mA
VESD electrostatic discha rge v oltage IEC 61000-4-2 at pins CANH and CANL 8- +8kV
VCANH voltage on pin CANH no time limit; DC limiting value 58 - +58 V
VCANL voltage on pin CANL no time limit; DC limiting value 58 - +58 V
Tvj virtual junction te mperature 40 - +150 C
Table 2. Ordering informatio n
Type number[1] Package
Name Description Version
TJA1042T SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
TJA1042T/3 SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
TJA1042TK/3 HVSON8 plastic thermal enhanced very thin small outline package; no leads;
8 t erminals; body 3 3 0.85 mm SOT782-1
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Product data sheet Rev. 7 — 8 May 2012 3 of 22
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode
5. Block diagram
(1) In a transceiver with a SPLIT pin, the VIO input is internally connected to VCC.
Fig 1. Block diagram
TEMPERATURE
PROTECTION
TIME-OUT
MODE
CONTROL
MUX
AND
DRIVER
TXD 1
VIO(1)
RXD 4
SLOPE
CONTROL
AND
DRIVER
VCC
CANH
CANL
7
6
VCC
VIO
53
2
GND
TJA1042
STB 8
VIO(1)
SPLIT SPLIT(1)
5
WAKE-UP
FILTER
015aaa017
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Product data sheet Rev. 7 — 8 May 2012 4 of 22
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode
6. Pinning information
6.1 Pinning
6.2 Pin description
[1] For enhanced thermal and electrical performance, the exposed center pad of the HVSON8 package should
be soldered to board ground (and not to any other voltage level).
a. TJA1042T: SO8 b. TJA1042T/3: SO8 c. TJA1042TK/3: HVSON8
Fig 2. Pin configuration diagrams
TJA1042T
TXD STB
GND CANH
V
CC
CANL
RXD SPLIT
1
2
3
4
6
5
8
7
015aaa018
TJA1042T/3
TXD STB
GND CANH
VCC CANL
RXD VIO
1
2
3
4
6
5
8
7
015aaa019
015aaa239
TJA1042TK/3
VIO
VCC
RXD
CANL
GND CANH
TXD STB
Transparent top view
45
3 6
2 7
1 8
terminal 1
index area
Table 3. Pin description
Symbol Pin Description
TXD 1 transmit data input
GND 2[1] ground supply
VCC 3 supply voltage
RXD 4 receiv e data output; reads out data from the bus lines
SPLIT 5 common-mode stabilization output; in TJA1042T version only
VIO 5 supply voltage for I/O level adapter; in TJA1042T/3 and TJA1042TK/3 versions
only
CANL 6 LOW-level CAN bus line
CANH 7 HIGH -l evel CAN bus line
STB 8 Standby mode control input
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Product data sheet Rev. 7 — 8 May 2012 5 of 22
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode
7. Functional description
The TJA1042 is a HS-CAN stand-alone transceiver with Standby mode. It combines the
functionality of the PCA82C250, PCA82C251 and TJA1040 transceivers with improved
EMC and ESD handling capability and quiescent current performance. Improved slope
control and high DC handling capability on the bus pins provide additional application
flexibility.
The TJA1042 is available in two versions, distin guished only by the function of pin 5:
•The TJA1042T is 100 % backwards compatible with the TJA1040, and also covers
existing PCA82C250 and PCA82C251 applications
•The TJA1042T/3 and TJA1042TK/3 allow for dire ct interfacing to microcontrollers with
supply voltages down to 3 V
7.1 Operati ng modes
The TJA1042 support s two oper ating modes, Normal and Standby, which are selected via
pin STB. See Table 4 for a descrip tion of the op er ating modes unde r no rma l sup ply
conditions.
7.1.1 Normal mode
A LOW level on pin STB selects Normal mode. In this mode, the transceiver can transmit
and receive data via the bus lines CANH and CANL (see Figure 1 for the block diagram).
The dif ferential receiver convert s the analog dat a on the bus lines into digita l data which is
output to pin RXD. The slope of the output signals on the bus lines is controlled and
optimized in a way that guarantees the lowest possible EME.
7.1.2 Standby mode
A HIGH level on pin STB selects Standby mode. In Standby mode, the transceiver is not
able to transmit or correctly receive data via the bus lines. The transmitter and
Normal-mode receiver blocks are switched off to reduce supply current, and only a
low-power d if feren tial receiver monitors the bus lines for activity. The wake-up filter on the
output of the low-power receiver does not latch bus dominant states, but ensures that only
bus dominant and bus recessive st ates that persist longer than tfltr(wake)bus are reflected on
pin RXD.
In Standby mode, the bus lines are biased to ground to minimize the system supply
current. The low-power receiver is supplied by VIO, and is capable of detecting CAN bus
activity even if VIO is the only supply volt age available. When p in RXD goes LOW to signal
a wake-up request, a transition to Normal mode will not be triggered until STB is forced
LOW.
Table 4. Operating mo des
Mode Pin STB Pin RXD
LOW HIGH
Normal LOW bus dominant bus recessive
Standby HIGH wake-up request
detected no wake-up request
detected
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Product data sheet Rev. 7 — 8 May 2012 6 of 22
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode
7.2 Fail-safe features
7.2.1 TXD dominant time-out function
A ‘TXD dominant time-out’ timer is started when pin TXD is set LOW. If the LOW state on
pin TXD persists for longer than tto(dom)TXD, the transmitter is disabled, releasing the bus
lines to recessive state. This function prevents a hardware and/or software application
failure from driving the bus lines to a permanent dominant state (blocking all network
communications). The TXD dominant time-out timer is reset when pin TXD is set to HIGH.
The TXD dominant time-out time also defines the minimum possible bit rate of 40 kbit/s.
7.2.2 Bus dominant time-out function
In Standby mode a 'bus dominant time-out' timer is started when the CAN bus changes
from recessive to dominant st a te. If the domina nt st ate on the bus p ersists for longer tha n
tto(dom)bus, the RXD pin is reset to HIGH. This function prevents a clamped dominant bus
(due to a bus short-circuit or a failure in one of the other nodes on the network) from
generating a perma nent wake -up reque st. The bus dominan t time-out timer is reset when
the CAN bus changes from dominant to recessive state.
7.2.3 Internal biasing of TXD and STB input pins
Pins TXD and STB have internal pull-ups to VIO to ensure a safe, defined state in case
one or both of these pins are left floating. Pull-up currents flow in these pin s in all states;
both pins should be held HIGH in Standby mode to minimize standby current.
7.2.4 Undervoltage detection on pins VCC and VIO
Should VCC drop below the VCC undervoltage detection level, V uvd(VCC), the transceiver
will switch to Standby mode. The logic state of pin STB will be ignored until VCC has
recovered.
Should VIO drop below the VIO undervoltage detection level, Vuvd(VIO), the transceiver will
switch off and disengage from the bus (zero load) until VIO has recovered.
7.2.5 Overtemperature protection
The output dri vers are protected a gainst overte mperature cond itions. If the virtu al junction
temperature exceeds the shutdown junction temperature, Tj(sd), the output drivers will be
disabled until the virtual junction temperature falls below Tj(sd) and TXD becomes
recessive again. Including the TXD condition ensures that output driver oscillation due to
temperature drift is avoided.
7.3 SPLIT output pin and VIO supply pin
Two versions of the TJA1042 are available, only differing in the function of a single pin.
Pin 5 is either a SPLIT output pin or a VIO supply pin.
7.3.1 SPLIT pin
Using the SPLIT pin on the TJA1042T in conjunctio n with a split termination network (see
Figure 3 and Figure 6) can help to stabilize the recessive voltage level on the bus. This
will reduce EME in networks with DC leakage to ground (e.g. from deactivated nodes with
poor bus leakage per formance ). In No rma l mod e, pin SPLIT delivers a DC output voltage
of 0.5VCC. In Standby mode or when VCC is off, pin SPLIT is floating.
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Product data sheet Rev. 7 — 8 May 2012 7 of 22
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode
7.3.2 VIO supply pin
Pin VIO on the TTJA1042T/3 and TJA1042TK/3 should be connected to the
microcontroller supply voltage (see Figure 7). This will adjust the signal levels of
pins TXD, RXD and STB to the I/O levels of the microcontroller. Pin VIO also provides the
internal supply voltage for the low-power differential receiver of the transceiver. For
applications running in low-power mode, this allows the bus lines to be monitored for
activity even if there is no supply voltage on pin VCC.
For versions of th e TJA1042 without a VIO pin, th e VIO input is internally connected to VCC.
This sets the signal levels of pins TXD, RXD and STB to levels compatible with 5 V
microcontrollers.
8. Limiting values
Fig 3. Stabilization circuitry and application for version with SPLIT pin
TJA1042T
V
CC
CANL
SPLIT
CANH
60 Ω
60 Ω
R
R
GND
V
SPLIT
= 0.5 V
CC
in normal mode;
otherwise floating
015aaa020
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are referenced to GND.
Symbol Parameter Conditions Min Max Unit
Vxvoltage on pin x no time limit; DC value
on pins CANH, CANL and SPLIT 58 +58 V
on any other pin 0.3 +7 V
Vtrt transient voltage on pins CANH and CANL [1] 150 +100 V
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Product data sheet Rev. 7 — 8 May 2012 8 of 22
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode
[1] V erified by an external test house to ensure pins CANH and CANL can withstand ISO 7637 part 3 automotive transient test pulses 1, 2a,
3a and 3b.
[2] IEC 61000-4-2 (150 pF, 330 .
[3] ESD performance of pins CANH and CANL according to IEC 61000-4-2 (150 pF, 330 ) has been be verified by an external test house.
The result is equal to or better than 8 kV (unaided).
[4] Human Body Model (HBM): according to AEC-Q100-002 (100 pF, 1.5 k).
[5] Machine Model (MM): according to AEC-Q100-003 (200 pF, 0.75 H, 10 ).
[6] Charged Device Model (CDM): according to AEC-Q100-011 (field Induced charge; 4 pF). The classification level is C5 (>1000 V).
[7] In accordance with IEC 60747-1. An alternative definition of virtual junction temperature is: Tvj =T
amb +PRth(vj-a), where Rth(vj-a) is a
fixed value to be used for the calculation of Tvj. The rating for Tvj limits the allowable combinations of power dissipation (P) and ambient
temperature (Tamb).
9. Thermal characteristics
10. Static characteristics
VESD electrostatic discharge voltage IEC 61000-4-2 [2]
at pins CANH and CANL [3] 8+8 kV
HBM [4]
at pins CANH and CANL 8+8 kV
at any other pin 4+4 kV
MM [5]
at any pin 300 +300 V
CDM [6]
at corner pins 750 +750 V
at any pin 500 +500 V
Tvj virtual junction temperature [7] 40 +150 C
Tstg storage temperature 55 +150 C
Table 5. Limiting values …continued
In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are referenced to GND.
Symbol Parameter Conditions Min Max Unit
Table 6. Thermal characteristics
According to IEC 60747-1.
Symbol Parameter Conditions Value Unit
Rth(vj-a) thermal resistance from virtual junction to ambient SO8 package; in free air 145 K/W
HVSON8 package; in free air 50 K/W
Table 7. Static characteristics
Tvj =
40
C to +150
C; VCC = 4.5 V to 5.5 V; VIO = 2.8 V to 5.5 V[1]; RL=60
unless specified otherwise; All voltages are
defined with respect to ground; Positive currents flow into the IC.[2]
Symbol Parameter Conditions Min Typ Max Unit
Supply; pin VCC
VCC supply voltage 4.5 - 5.5 V
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Product data sheet Rev. 7 — 8 May 2012 9 of 22
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode
ICC supply current Standby mode
TJA1042T; includes IIO; VTXD =V
IO -1015A
TJA1042T/3 or TJA1042TK/3 - - 5 A
Normal mode
recessive; VTXD =V
IO 2.5 5 10 mA
dominant; VTXD =0V 20 45 70 mA
Vuvd(VCC) undervoltage detection
voltage on pin VCC
3.5 - 4.5 V
I/O level adapter supply; pin VIO[1]
VIO supply voltage on pin VIO 2.8 - 5.5 V
IIO supply current on pin VIO Standby mode; VTXD =V
IO 5-14A
Normal mode
recessive; VTXD =V
IO 15 80 200 A
dominant; VTXD = 0 V - 350 1000 A
Vuvd(VIO) undervoltage detection
voltage on pin VIO
1.3 2.0 2.7 V
Standby mode control input; pin STB
VIH HIGH-level input voltage [3] 0.7VIO -V
IO +
0.3 V
VIL LOW-level input voltage 0.3 - 0.3VIO V
IIH HIGH-level input current VSTB =V
IO 1-+1A
IIL LOW-level input current VSTB =0V 15 - 1A
CAN transmit data input; pin TXD
VIH HIGH-level input voltage [3] 0.7VIO -V
IO +
0.3 V
VIL LOW-level input voltage 0.3 - 0.3VIO V
IIH HIGH-level input current VTXD =V
IO 5-+5A
IIL LOW-level input current VTXD =0V 260 150 30 A
Ciinput capacitance [4] -510pF
CAN receive data output; pin RXD
IOH HIGH-level output current VRXD =V
IO 0.4 V; VIO =V
CC 831mA
IOL LOW -l evel output current VRXD = 0 .4 V; bus dominant 2 5 12 mA
Bus lines; pins CANH and CANL
VO(dom) dominant output voltage VTXD =0V; t<t
to(dom)TXD
pin CANH 2.75 3.5 4.5 V
pin CANL 0.5 1.5 2.25 V
Vdom(TX)sym transmitter dominant voltage
symmetry Vdom(TX)sym = VCC VCANH VCANL 400 - +400 mV
Table 7. Static characteristics …continued
Tvj =
40
C to +150
C; VCC = 4.5 V to 5.5 V; VIO = 2.8 V to 5.5 V[1]; RL=60
unless specified otherwise; All voltages are
defined with respect to ground; Positive currents flow into the IC.[2]
Symbol Parameter Conditions Min Typ Max Unit
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Product data sheet Rev. 7 — 8 May 2012 10 of 22
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode
[1] Only TJA1042T/3 and TJA1042TK/3 have a VIO pin. With TJA1042T, the VIO input is internally connected to VCC.
[2] All parameters are guaranteed over the virtual junction temperature range by design. Factory testing uses correlated test conditions to
cover the specified temperature and power supply voltage range.
[3] Maximum value assumes VCC <V
IO; if VCC >V
IO, the maximum value will be VCC + 0.3 V.
[4] Not tested in production; guaranteed by design.
[5] Vcm(CAN) is the common mode voltage of CANH and CANL.
[6] For TJA1042T/3 and TJA1042TK/3: values valid when VIO = 4.5 V to 5.5 V; when VIO = 2.8 V to 4.5 V, values valid when
Vcm(CAN) =12 V to +12 V.
VO(dif)bus bus differentia l output voltage VTXD =0V; t<t
to(dom)TXD
VCC = 4.75 V to 5.25 V
RL=45to 65
1.5 - 3 V
VTXD =V
IO; recessive; no load 50 - +50 mV
VO(rec) recessive output voltage Normal mode; VTXD =V
IO; no load 2 0.5VCC 3V
Standby mode; no load 0.1 - +0.1 V
Vth(RX)dif differential receiver threshold
voltage Vcm(CAN) =30 V to +30 V [5]
Normal mode 0.5 0.7 0.9 V
Standby mode [6] 0.4 0.7 1.15 V
Vhys(RX)dif differential receiver hysteresis
voltage Vcm(CAN) =30 V to +30 V
Normal mode 50 120 200 mV
IO(dom) dominant output current VTXD =0V; t<t
to(dom)TXD; VCC =5 V
pin CANH; VCANH =0V 100 70 40 mA
pin CANL; VCANL = 5 V / 40 V 40 70 100 mA
IO(rec) recessiv e output current Normal mode; VTXD =V
IO
VCANH =V
CANL = 27 V to +32 V 5-+5mA
ILleakage current VCC =V
IO =0V; V
CANH =V
CANL =5V 5- +5A
Riinput resistance 9 15 28 k
Riinput resistance deviation between VCANH and VCANL 1-+1%
Ri(dif) diff ere n ti a l i np u t r esistance 19 30 52 k
Ci(cm) common-mode input
capacitance [4] --20pF
Ci(dif) differential input capacitance [4] --10pF
Common mode stabilization output; pin SPLIT; only for TJA1042T
VOoutput voltage Norm al m od e
ISPLIT =500 A to +500 A0.3VCC 0.5VCC 0.7VCC V
Normal mode; RL=1 M0.45VCC 0.5VCC 0.55VCC V
ILleakage current Standby mode
VSPLIT =58 V to +58 V 5-+5A
Temperature de te ction
Tj(sd) shutdown junction
temperature [4] -190-C
Table 7. Static characteristics …continued
Tvj =
40
C to +150
C; VCC = 4.5 V to 5.5 V; VIO = 2.8 V to 5.5 V[1]; RL=60
unless specified otherwise; All voltages are
defined with respect to ground; Positive currents flow into the IC.[2]
Symbol Parameter Conditions Min Typ Max Unit
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Product data sheet Rev. 7 — 8 May 2012 11 of 22
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode
11. Dynamic characteristics
[1] Only TJA1042T/3 and TJA1042TK/3 have a VIO pin. With TJA1042T, the VIO input is internally connected to VCC.
[2] All parameters are guaranteed over the virtual junction temperature range by design. Factory testing uses correlated test conditions to
cover the specified temperature and power supply voltage range.
Table 8. Dynamic characteristics
Tvj =
40
C to +150
C; VCC = 4.5 V to 5.5 V; VIO = 2 .8 V to 5.5 V[1]; RL=60
unless specified otherwise. All voltages are
defined with respect to ground. Positive currents flow into the IC.[2]
Symbol Parameter Conditions Min Typ Max Unit
Transceiver timing; pins CANH, CANL, TXD and RXD; see Figure 4 and Figure 5
td(TXD-busdom) delay time from TXD to bus dominant Normal mode - 65 - ns
td(TXD-busrec) delay time from TXD to bus recessive Normal mode - 90 - ns
td(busdom-RXD) delay time from bus dominan t to RX D Normal mode - 60 - ns
td(busrec-RXD) delay time from bus recessive to RXD Normal mode - 65 - ns
tPD(TXD-RXD) propagation delay from TXD to RXD version with SPLIT pin
Normal mode 60 - 220 ns
versions with VIO pin
Normal mode 60 - 250 ns
tto(dom)TXD TXD dominant time-out time VTXD = 0 V; Normal mode 0.3 2 5 ms
tto(dom)bus bus dominant time-out time Standby mode 0.3 2 5 ms
tfltr(wake)bus bus wake-up filter time version with SPLIT pin
Standby mode 0.5 1 3 s
versions with VIO pin
Standby mode 0.5 1.5 5 s
td(stb-norm) standby to normal mode delay time 7 25 47 s
(1) For versions with a VIO pin (TJA1042T/3 and TJA1042TK/3), the VIO pin is connected to pin VCC.
Fig 4. Timing test circuit for CAN transceiver
015aaa024
TJA1042
GND
VCC
STB
100 nF47 μF
+5 V
TXD
RXD
15 pF
CANL
CANH
SPLIT
VIO(1)
RL100 pF
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Product data sheet Rev. 7 — 8 May 2012 12 of 22
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode
12. Application information
Fig 5. CAN transceiver timing diagram
CANH
CANL
td(TXD-busdom)
TXD
VO(dif)(bus)
RXD
HIGH
HIGH
LOW
LOW
dominant
recessive
0.9 V
0.5 V
0.3VIO
0.7VIO
td(busdom-RXD)
td(TXD-busrec)
td(busrec-RXD)
tPD(TXD-RXD)
tPD(TXD-RXD) 015aaa025
Fig 6. Typical application with TJA1042T and a 5 V microcontro ller.
TJA1042T
STB
TXD
RXD
MICRO-
CONTROLLER
Pxx
Pyy
TX0
RX0
VDD
GND
GND
VCC
CANH CANH
CANL CANL
5 V
BAT
SPLIT
015aaa022
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Product data sheet Rev. 7 — 8 May 2012 13 of 22
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode
13. Test information
13.1 Quality information
This product has been qualified to the appropriate Automotive Electronics Council (AEC)
standard Q100 or Q101 and is suitable for use in automotive applications.
Switching off the 5 V supply in Standby mode (dotted line) is optional.
Fig 7. Typical application with TJA1042T/3 or TJA1042TK/3 and a 3 V microcontroller.
TJA1042T/3
STB
TXD
RXD
TJA1042TK/3 MICRO-
CONTROLLER
Pxx
TX0
RX0
VDD
GND
GND
VCC
CANH CANH
CANL CANL
5 V
BAT 3 V
VIO
INH
015aaa021
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Product data sheet Rev. 7 — 8 May 2012 14 of 22
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode
14. Package outline
Fig 8. Package outline SOT96-1 (SO8)
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Product data sheet Rev. 7 — 8 May 2012 15 of 22
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode
Fig 9. Package outline SOT782-1 (HVSON8)
References
Outline
version European
projection Issue date
IEC JEDEC JEITA
SOT782-1 - - -- - -
sot782-1_po
09-08-25
09-08-28
Unit(1)
mm max
nom
min
1.00
0.85
0.80
0.05
0.03
0.00 0.2 3.10
3.00
2.90
2.45
2.40
2.35
3.10
3.00
2.90 0.65 1.95 0.45
0.40
0.35 0.1
A
Dimensions
Note
1. Plastic or metal protrusions of 0.075 maximum per side are not included.
HVSON8: plastic thermal enhanced very thin small outline package; no leads;
8 terminals; body 3 x 3 x 0.85 mm SOT782-1
A1b
0.35
0.30
0.25
cDD
hEE
h
1.65
1.60
1.55
ee
1K
0.35
0.30
0.25
Lv
0.1
w
0.05
y
0.05
y1
0 1 2 mm
scale
MO-229
X
C
y
C
y1
detail X
A
c
A1
B A
D
E
terminal 1
index area
b
Dh
L
Eh
K
e1
eAC B
vCw
1 4
8 5
terminal 1
index area
TJA1042 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 7 — 8 May 2012 16 of 22
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode
15. Handling information
All input and output pins are protected against ElectroStatic Discharge (ESD) under
normal handling. When handling ensure that the appropriate pre ca u tio ns ar e taken as
described in JESD625-A or equivalent standards.
16. Soldering of SMD packages
This text provides a very brief insight into a complex technology. A more in-depth account
of soldering ICs can be found in Application Note AN10365 “Surface mount reflow
soldering description”.
16.1 Introduction to soldering
Soldering is one of the most common methods through which packages are attached to
Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both
the mechanical and the electrical connection. There is no single soldering method that is
ideal for all IC packages. Wave soldering is often preferred when through-hole and
Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not
suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high
densities that come with increased miniaturization.
16.2 Wave and reflow soldering
W ave soldering is a joinin g technology in which the joint s are made by solder coming from
a standing wave of liquid solder. The wave soldering process is suitable for the following:
•Through-hole components
•Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless
packages which have solder lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed by
component placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.
Key characteristics in both wave and reflow soldering are:
•Board specifications, including the board finish, solder masks and vias
•Package footprints, including solder thieves and orientation
•The moisture sensitivity level of the packages
•Package placement
•Inspection and repair
•Lead-free soldering versus SnPb soldering
16.3 Wave soldering
Key characteristics in wave soldering are:
TJA1042 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 7 — 8 May 2012 17 of 22
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode
•Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave
•Solder bath specifications, including temperature and impurities
16.4 Reflow soldering
Key characteristics in reflow soldering are:
•Lead-free ve rsus SnPb soldering; note th at a lead-free reflow process usua lly leads to
higher minimum peak temperatures (see Figure 10) than a SnPb process, thus
reducing the process window
•Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
•Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enoug h for the solder to make reliable solder joint s (a solder paste
characteristic). In addition, the peak temperature must be low en ough that the
packages and/or boards are not damaged. Th e peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 9 and 10
Moisture sensitivity precautions, as indicated on the packin g, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 10.
Table 9. SnPb eutectic process (from J-STD-020C)
Package thickness (mm) Package reflow temperature (C)
Volume (mm3)
< 350 350
< 2.5 235 220
2.5 220 220
Table 10. Lead-free process (from J-STD-020C)
Package thickness (mm) Package reflow temperature (C)
Volume (mm3)
< 350 350 to 2000 > 2000
< 1.6 260 260 260
1.6 to 2.5 260 250 245
> 2.5 250 245 245
TJA1042 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 7 — 8 May 2012 18 of 22
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode
For further information on temperature profiles, refer to Application Note AN10365
“Surface mount reflow soldering description”.
17. Soldering of HVSON packages
Section 16 contains a brief intr oduction to the techniques most commonly used to solder
Surface Mounted Devices (SMD). A more detailed discussion on soldering HVSON
leadless package ICs can found in the following application notes:
•AN10365 ‘Surface mount reflow soldering description”
•AN10366 “HVQFN application information”
MSL: Moisture Sensitivity Level
Fig 10. Temperature profiles for large and small components
001aac844
temperature
time
minimum peak temperature
= minimum soldering temperature
maximum peak temperature
= MSL limit, damage level
peak
temperature
TJA1042 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 7 — 8 May 2012 19 of 22
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode
18. Revision history
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
TJA1042 v.7 201 20508 Product data sheet - TJA1042 v.6
Modifications •Table 3: Table note 1 added
TJA1042 v.6 20110323 Product data sheet - TJA1042 v.5
TJA1042 v.5 2011011 8 Product data sheet - TJA1042 v.4
TJA1042 v.4 200 91006 Product data sheet - TJA1042 v.3
TJA1042 v.3 200 90825 Product data sheet - TJA1042 v.2
TJA1042 v.2 200 90708 Product data sheet - TJA1042 v.1
TJA1042 v.1 200 90309 Product data sheet - -
TJA1042 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 7 — 8 May 2012 20 of 22
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode
19. Legal information
19.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of de vice(s) descr ibed in th is docume nt may have cha nged since this docume nt was publis hed and ma y dif fer in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
19.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not be rel ied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall pre vail.
Product specificatio n — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to off er functions and qualities beyond tho se described in the
Product data sheet.
19.3 Disclaimers
Limited warr a nty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Se miconductors takes no
responsibility for the content in this document if provided by an inf ormation
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequ ential damages (including - wit hout limitatio n - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability t owards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless ot herwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, lif e-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in perso nal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconducto rs products in such equipment or
applications an d ther efo re su ch inclusi on a nd/or use is at the cu stome r's own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty tha t such application s will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
and products using NXP Semiconductors product s, and NXP Semiconductors
accepts no liability for any assistance with applicati ons or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suit able and fit for the custome r’s applications and
products planned, as well as fo r the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for th e customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanent ly and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individua l agreement. In case an individual
agreement is concluded only the ter ms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by cust omer.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specificati on for product development.
Preliminary [short] dat a sheet Qualification T his document contains data from the preliminary specification.
Product [short] dat a sheet Production This document contains the product specification.
TJA1042 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 7 — 8 May 2012 21 of 22
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode
No offer to sell or license — Nothing in this document may be interpret ed or
construed as an of fer to sell product s that is op en for accept ance or the grant ,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
19.4 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respect i ve ow ners.
20. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors TJA1042
High-speed CAN transceiver with Standby mode
© NXP B.V. 2012. All rights reserved.
For more information, please visit: http://www.nxp.co m
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 8 May 2012
Document identifier: TJA1042
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
21. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
2.1 General. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2.2 Low-power management . . . . . . . . . . . . . . . . . 1
2.3 Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
3 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
4 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
7 Functional description . . . . . . . . . . . . . . . . . . . 5
7.1 Operating modes . . . . . . . . . . . . . . . . . . . . . . . 5
7.1.1 Normal mode . . . . . . . . . . . . . . . . . . . . . . . . . . 5
7.1.2 Standby mode. . . . . . . . . . . . . . . . . . . . . . . . . . 5
7.2 Fail-safe features . . . . . . . . . . . . . . . . . . . . . . . 6
7.2.1 TXD dominant time-out function. . . . . . . . . . . . 6
7.2.2 Bus dominant time-out function . . . . . . . . . . . . 6
7.2.3 Internal biasing of T X D and STB inp ut pins . . . 6
7.2.4 Undervoltage detection on pins VCC and VIO . . 6
7.2.5 Overtemperature protection . . . . . . . . . . . . . . . 6
7.3 SPLIT output pin and VIO supply pin . . . . . . . . 6
7.3.1 SPLIT pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
7.3.2 VIO supply pin. . . . . . . . . . . . . . . . . . . . . . . . . . 7
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 7
9 Thermal characteristics . . . . . . . . . . . . . . . . . . 8
10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 8
11 Dynamic characteristics . . . . . . . . . . . . . . . . . 11
12 Application information. . . . . . . . . . . . . . . . . . 12
13 Test information. . . . . . . . . . . . . . . . . . . . . . . . 13
13.1 Quality information . . . . . . . . . . . . . . . . . . . . . 13
14 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14
15 Handling information. . . . . . . . . . . . . . . . . . . . 16
16 Soldering of SMD packages . . . . . . . . . . . . . . 16
16.1 Introduction to soldering. . . . . . . . . . . . . . . . . 16
16.2 Wave and reflow soldering . . . . . . . . . . . . . . . 16
16.3 Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 16
16.4 Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 17
17 Soldering of HVSON packages. . . . . . . . . . . . 18
18 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 19
19 Legal information. . . . . . . . . . . . . . . . . . . . . . . 20
19.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 20
19.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
19.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 20
19.4 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 21
20 Contact information . . . . . . . . . . . . . . . . . . . . 21
21 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22