FEATURES:
!Dual Speed Operation:
- Fibre Channel: 1.06/2.12Gb/s
- Gigabit Ethernet: 1.25Gb/s
- InfiniBand™: 2.5Gb/s
!10-bit, SSTL_2 or SSTL_3 Interface
!HSPI Interface Compliant
!ASIC-Friendly™ Timing to the Transmitter
!Separate Transmitter/Receiver Rate Controls support
Auto Speed Negotiation
!No Passives needed on High Speed Signals
!On-chip, 100 Ohm Termination
!Write Pre-Emphasis in Transmitter
!Cable Equalization in Receiver
!Analog/Digital Signal Detection
!Flexible Reference Clock
!Single 3.3V Supply, 800mW
!64-pin, 14 mm PQFP Package
!Pin Compatible to Agilent HDMP-263x
VSC7145 - Dual Speed 10-bit Serializer/Deserializer
SPECIFICATIONS:
!Data Rate: 1.0 - 2.5 Gb/s
!REFCLK: 52.5 to 126 MHz
!Frequency Offset: +/-200 ppm
!Fast Locking: <300 data edges
!Transmitter Output: 1.0V p-p Minimum
!Receiver Input: 200mV p-p Minimum
!3.3V +/- 5% Supply
!0°-70°C Ambient Operation
APPLICATIONS:
!Fibre Channel
-Host Adapters
-Hubs/Switches
-RAID systems
!Gigabit Ethernet
-NICs
-Switches
-Proprietary Uplinks
!InfiniBand
-Host Channel Adapters
-Target Channel Adapters
-Switches
!Proprietary Serial Links
PRODUCT OPTIONS:
DATACOM PRODUCTS
PB-VSC7145-001
VSC7145
InfiniBand
TM/SM
is a trademark and service mark of the InfiniBand Trade Association
A
SIC-FriendlyTM is a trademark of Vitesse Semiconductor Corporation
VSC7145RU-30
VSC7145RU-31
VSC7145RU-34
Part Number Low Speed I/O Speed (Gb/s) HS Termination Compatibility
SSTL_2
SSTL_3
SSTL_2
1.05 - 1.26
(Half Speed)
or 2.10 - 2.52
(Full Speed)
100 Ohms
Agilent HDMP-2630
Agilent HDMP-2631
Agilent HDMP-2634
741 Calle Plano
Camarillo, CA 93012
Tel: 805.388.3700
Fax: 805.388.7565
www.vitesse.com
Your Partner for Success.
For more information on Vitesse Products visit the Vitesse web site
at www.vitesse.com or contact Vitesse Sales at (800) VITESSE
or sales@vitesse.com
©2002 Vitesse Semiconductor Corporation
The VSC7145 is a dual-speed Fibre Channel,
Gigabit Ethernet and InfiniBand Serializer/
Deserializer (SerDes) optimized for
performance and power in an industry-
standard pinout. It accepts 10-bits of SSTL,
8B/10B encoded transmit data, latches it
synchronously to the Transmit Byte Clock (TBC) and serializes it
onto the SO differential output at a baud rate which is 10, 20 or 40
times the REFCLK frequency. The VSC7145 samples serial receive
data on the SI input, recovers the clock and data, deserializes it onto
a10-bit SSTL bus and outputs two recovered clocks at 1/10th or
1/20th of the baud rate. Both disparities of the K28.5 characters are
GENERAL DESCRIPTION:
VSC7145 BLOCK DIAGRAM:
DUAL SPEED AUTO NEGOTIATION FIBRE CHANNEL APPLICATION:
VSC7145 - Dual Speed 10-bit Serializer/Deserializer
detected and used for aligning the serial data to the
parallel output bus. Independent speed selectors control
the transmitter and receiver separately to support
industry-standard automatic speed negotiation protocols.
Acombined analog/digital signal detect circuit indicates
the presence of valid signal levels on the SI input. The
VSC7145 contains on-chip PLL circuitry for synthesis of
the bit rate transmit clock, and extraction of the clock
from the received serial stream. The parallel bus of the
VSC7145 is compliant with the High Speed Parallel
Interface (HSPI) standard developed by the T11.2 Fibre
Channel Committee.
VSC7145
106.25 MHz
Oscillator
Optical
SFP
3.06 / 2.12Gb/s Link
Protocol
Controller
T(0-9)
TBC
EN_CDET
EWRAP
TXRATE
R(0:9)
RXRATE
RBC0
RBC1
RX_LOS
COMDET
REFRATE
RBCSYNC
REFCLK
SO+
SO-
CAP0
CAP1
SI-
SI+
0.1uF
SI+
SI-
R(0:9)
COMDET
ENCDET
T(0:9) SO+
SO-
EWRAP
RBC0
RBC1
REFCLK1
RX_LOS
TBC
TXRATE
RXRATE
RBCSYNC
REFCLK0
REFRATE
EQAMP
A
QD
10
10
QD QD
DQDQ
0
1
TXC P1
TXCAP0
0.1uF
=
Serial to
Parallel
Parallel
to Serial
Clock
Multiplier
x10/x20/x40
Comma
Detect
Clock
Recovery
Signal
Detect