Description
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
1
Description
The M16C/62M group of single-chip microcomputers are built using the high-performance silicon gate
CMOS process using a M16C/60 Series CPU core and are packaged in a 100-pin plastic molded QFP.
These single-chip microcomputers operate using sophisticated instructions featuring a high level of instruc-
tion efficiency. With 1M bytes of address space, low voltage (2.2V to 3.6V), they are capable of executing
instructions at high speed. They also feature a built-in multiplier and DMAC, making them ideal for control-
ling office, communications, industrial equipment, and other high-speed processing applications.
The M16C/62M group includes a wide range of products with different internal memory types and sizes and
various package types.
Features
• Memory capacity..................................ROM (See Figure 1.1.4. ROM Expansion)
RAM 10K to 20K bytes
• Shortest instruction execution time......100ns (f(XIN)=10MHZ, VCC=2.7V to 3.6V)
142.9ns (f(XIN)=7MHZ, VCC=2.2V to 3.6V with software one-wait)
• Supply voltage .....................................2.7V to 3.6V (f(XIN)=10MHZ, without software wait)
2.4V to 2.7V (f(XIN)=7MHZ, without software wait)
2.2V to 2.4V (f(XIN)=7MHZ with software one-wait)
• Low power consumption ......................28.5mW (VCC = 3V, f(XIN)=10MHZ, without software wait)
• Interrupts..............................................25 internal and 8 external interrupt sources, 4 software
interrupt sources; 7 levels (including key input interrupt)
• Multifunction 16-bit timer......................5 output timers + 6 input timers
• Serial I/O..............................................5 channels
(3 for UART or clock synchronous, 2 for clock synchronous)
• DMAC ..................................................2 channels (trigger: 24 sources)
• A-D converter.......................................10 bits X 8 channels (Expandable up to 10 channels)
• D-A converter.......................................8 bits X 2 channels
• CRC calculation circuit.........................1 circuit
• Watchdog timer....................................1 line
• Programmable I/O ...............................87 lines
• Input port.............................................. _______
1 line (P85 shared with NMI pin)
• Memory expansion ..............................Available (to a maximum of 1M bytes)
• Chip select output ................................4 lines
• Clock generating circuit .......................2 built-in clock generation circuits
(built-in feedback resistor, and external ceramic or quartz oscillator)
Applications
Audio, cameras, office equipment, communications equipment, portable equipment
Description
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
2
Pin Configuration
Figures 1.1.1 and 1.1.2 show the pin configurations (top view).
PIN CONFIGURATION (top view)
Package: 100P6S-A
Figure 1.1.1. Pin configuration (top view)
1 2 3 4 5 6 7 8 9101112131415161718192021222324252627282930
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
515253545556575859606162636465666768697071727374757677787980
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
P0
0
/D
0
P0
1
/D
1
P0
2
/D
2
P0
3
/D
3
P0
4
/D
4
P0
5
/D
5
P0
6
/D
6
P0
7
/D
7
P1
0
/D
8
P1
1
/D
9
P1
2
/D
10
P1
3
/D
11
P1
4
/D
12
V
REF
AV
SS
V
CC
X
IN
X
OUT
V
SS
RESET
CNVss
P8
7
/X
CIN
P8
6
/X
COUT
BYTE P2
0
/A
0
(/D
0
/-)
P2
1
/A
1
(/D
1
/D
0
)
P2
2
/A
2
(/D
2
/D
1
)
P2
3
/A
3
(/D
3
/D
2
)
P2
4
/A
4
(/D
4
/D
3
)
P2
5
/A
5
(/D
5
/D
4
)
P2
6
/A
6
(/D
6
/D
5
)
P2
7
/A
7
(/D
7
/D
6
)
P3
0
/A
8
(/-/D
7
)
P3
1
/A
9
P3
2
/A
10
P3
3
/A
11
P3
4
/A
12
P3
5
/A
13
P3
6
/A
14
P3
7
/A
15
P4
0
/A
16
P4
1
/A
17
P4
2
/A
18
P4
3
/A
19
P7
4
/TA2
OUT
/W
P7
6
/TA3
OUT
P5
6
/ALE
P7
7
/TA3
IN
P5
5
/HOLD
P5
4
/HLDA
P5
3
/BCLK
P5
2
/RD
Vcc
Vss
P5
7
/RDY/CLK
OUT
P4
5
/CS1
P4
6
/CS2
P4
7
/CS3
AVcc
P6
3
/T
X
D
0
P6
5
/CLK
1
P6
6
/RxD
1
P6
7
/T
X
D
1
P6
1
/CLK
0
P6
2
/RxD
0
P10
0
/AN
0
P10
1
/AN
1
P10
2
/AN
2
P10
3
/AN
3
P9
3
/DA
0
/TB3
IN
P9
4
/DA
1
/TB4
IN
P9
5
/ANEX0/CLK4
P9
6
/ANEX1/S
OUT
4
P9
1
/TB1
IN
/S
IN
3
P9
2
/TB2
IN
/S
OUT
3
P8
0
/TA4
OUT
/U
P6
0
/CTS
0
/RTS
0
P6
4
/CTS
1
/RTS
1
/CLKS
1
P7
2
/CLK
2
/TA1
OUT
/V
P8
2
/INT
0
P7
1
/RxD
2
/SCL/TA0
IN
/TB5
IN
P8
3
/INT
1
P8
5
/NMI
P9
7
/AD
TRG
/S
IN
4
P4
4
/CS0
P5
0
/WRL/WR
P5
1
/WRH/BHE
P9
0
/TB0
IN
/CLK3
P7
0
/T
X
D
2
/SDA/TA0
OUT
P8
4
/INT
2
P8
1
/TA4
IN
/U
P7
5
/TA2
IN
/W
P1
5
/D
13
/INT3
P1
6
/D
14
/INT4
P1
7
/D
15
/INT5
P10
7
/AN
7
/KI
3
P10
6
/AN
6
/KI
2
P10
5
/AN
5
/KI
1
P10
4
/AN
4/
KI
0
M16C/62 Group
P7
3
/CTS
2
/RTS
2
/TA1
IN
/V
Description
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
3
Figure 1.1.2. Pin configuration (top view)
Package: 100P6Q-A
PIN CONFIGURATION (top view)
1 2 3 4 5 6 7 8 9 101112131415161718192021 22 23 24 25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
525354555657585960616263646566676869707172737475
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
P00/D0
P01/D1
P02/D2
P03/D3
P04/D4
P05/D5
P06/D6
P07/D7
P10/D8
P11/D9
P12/D10
P1
3
/D
11
P1
4
/D
12
VREF
AVSS
V
CC
X
IN
X
OUT
V
SS
RESET
CNVss
P8
7
/X
CIN
P8
6
/X
COUT
BYTE P2
0
/A
0
(/D
0
/-)
P2
1
/A
1
(/D
1
/D
0
)
P2
2
/A
2
(/D
2
/D
1
)
P2
3
/A
3
(/D
3
/D
2
)
P2
4
/A
4
(/D
4
/D
3
)
P2
5
/A
5
(/D
5
/D
4
)
P2
6
/A
6
(/D
6
/D
5
)
P2
7
/A
7
(/D
7
/D
6
)
P3
0
/A
8
(/-/D
7
)
P3
1
/A
9
P3
2
/A
10
P3
3
/A
11
P3
4
/A
12
P3
5
/A
13
P3
6
/A
14
P3
7
/A
15
P4
0
/A
16
P4
1
/A
17
P42/A18
P43/A19
P7
4
/TA2
OUT
/W
P7
6
/TA3
OUT
P56/ALE
P7
7
/TA3
IN
P55/HOLD
P54/HLDA
P53/BCLK
P52/RD
Vcc
Vss
P57/RDY/CLKOUT
P45/CS1
P46/CS2
P47/CS3
AVcc
P63/TXD0
P65/CLK1
P66/RxD1
P67/TXD1
P61/CLK0
P62/RxD0
P100/AN0
P101/AN1
P102/AN2
P103/AN3
P9
3
/DA
0
/TB3
IN
P9
4
/DA
1
/TB4
IN
P95/ANEX0/CLK4
P96/ANEX1/SOUT4
P9
1
/TB1
IN
/S
IN
3
P9
2
/TB2
IN
/S
OUT
3
P8
1
/TA4
IN
/U
P8
0
/TA4
OUT
/U
P60/CTS0/RTS0
P64/CTS1/RTS1/CLKS1
P8
2
/INT
0
P8
3
/INT
1
P8
5
/NMI
P97/ADTRG/SIN4
P44/CS0
P50/WRL/WR
P51/WRH/BHE
P9
0
/TB0
IN
/CLK3
P8
4
/INT
2
P72/CLK2/TA1OUT/V
P71/RxD2/SCL/TA0IN/TB5IN
P70/TXD2/SDA/TA0OUT
P7
5
/TA2
IN
/W
P7
3
/CTS
2
/RTS
2
/TA1
IN
/V
P1
5
/D
13
/INT
3
P1
6
/D
14
/INT
4
P1
7
/D
15
/INT
5
P107/AN7/KI3
P106/AN6/KI2
P105/AN5/KI1
P104/AN4/KI0
M16C/62 Group
Description
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
4
Block Diagram
Figure 1.1.3 is a block diagram of the M16C/62M group.
Block diagram of the M16C/62M group
Figure 1.1.3. Block diagram of M16C/62M group
AAAA
AAAA
Timer
Timer TA0 (16 bits)
Timer TA1 (16 bits)
Timer TA2 (16 bits)
Timer TA3 (16 bits)
Timer TA4 (16 bits)
Timer TB0 (16 bits)
Timer TB1 (16 bits)
Timer TB2 (16 bits)
Timer TB3 (16 bits)
Timer TB4 (16 bits)
Timer TB5 (16 bits)
Internal peripheral functions
Watchdog timer
(15 bits)
DMAC
(2 channels)
D-A converter
(8 bits X 2 channels)
A-D converter
(10 bits
X
8 channels
Expandable up to 10 channels)
UART/clock synchronous SI/O
(8 bits
X
3 channels)
System clock generator
X
IN
-X
OUT
X
CIN
-X
COUT
M16C/60 series16-bit CPU core
I/O ports
Port P0
8
Port P1
8
Port P2
8
Port P3
8
Port P4
8
Port P5
8
Port P6
8
8
R0LR0H
R1H R1L
R2
R3
A0
A1
FB
R0LR0H
R1H R1L
R2
R3
A0
A1
FB
Registers
ISP
USP
Stack pointer
CRC arithmetic circuit (CCITT )
(Polynomial : X
16
+X
12
+X
5
+1)
Multiplier
788
Port P10
Port P9
Port P8
Port P7
AAAAAA
A
AAAA
A
A
AAAA
A
A
AAAA
A
AAAAAA
Memory
Port P8
5
ROM
(Note 1)
RAM
(Note 2)
Note 1: ROM size depends on MCU type.
Note 2: RAM size depends on MCU type.
SB FLG
PC
Program counter
Clock synchronous SI/O
(8 bits
X
2 channels)
Vector table
INTB
Flag register
Description
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
5
Item Performance
Number of basic instructions 91 instructions
Shortest instruction execution time 100ns(f(XIN)=10MHZ, VCC=2.7V to 3.6V)
142.9ns (f(XIN)=7MHZ, VCC=2.2V to 3.6V with software one-wait)
Memory ROM (See the figure 1.1.4. ROM Expansion)
capacity RAM 10K to 20K bytes
I/O port P0 to P10 (except P85) 8 bits x 10, 7 bits x 1
Input port P851 bit x 1
Multifunction TA0, TA1, TA2, TA3, TA4 16 bits x 5
timer TB0, TB1, TB2, TB3, TB4, TB5 16 bits x 6
Serial I/O UART0, UART1, UART2 (UART or clock synchronous) x 3
SI/O3, SI/O4 (Clock synchronous) x 2
A-D converter 10 bits x (8 + 2) channels
D-A converter 8 bits x 2
DMAC 2 channels (trigger: 24 sources)
CRC calculation circuit CRC-CCITT
Watchdog timer 15 bits x 1 (with prescaler)
Interrupt
25 internal and 8 external sources, 4 software sources, 7 levels
Clock generating circuit 2 built-in clock generation circuits
(built-in feedback resistor, and external ceramic or quartz oscillator)
Supply voltage 2.7V to 3.6V (f(XIN)=10MHZ, without software wait)
2.4V to 2.7V (f(XIN)=7MHZ, without software wait)
2.2V to 2.4V (f(XIN)=7MHZ with software one-wait)
Power consumption 28.5mW (f(XIN) =10MHZ, VCC=3V without software wait)
I/O I/O withstand voltage 3V
characteristics
Output current 1mA
Memory expansion Available (to a maximum of 1M bytes)
Device configuration CMOS high performance silicon gate
Package 100-pin plastic mold QFP
Table 1.1.1. Performance outline of M16C/62M group
Performance Outline
Table 1.1.1 is a performance outline of M16C/62M group.
Description
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
6
Mitsubishi plans to release the following products in the M16C/62M group:
(1) Support for mask ROM version and Flash memory version
(2) ROM capacity
(3) Package
100P6S-A : Plastic molded QFP (mask ROM and flash memory versions)
100P6Q-A : Plastic molded QFP (mask ROM and flash memory versions)
The M16C/62M group products currently supported are listed in Table 1.1.2.
Table 1.1.2. M16C/62M group
ROM Size
(Byte)
External
ROM
128K
96K
64K
32K
M30624MGM-XXXFP/GP
Mask ROM version Flash memory version
M30620FCMFP/GP
256K
M30620MCM-XXXFP/GP
M30624FGMFP/GP
100P6S-A
100P6Q-A
100P6S-A
100P6Q-A
100P6S-A
100P6Q-A
100P6S-A
M30620MCM-XXXGP
M30620MCM-XXXFP
100P6Q-A
M30624MGM-XXXFP
M30624MGM-XXXGP
M30620FCMFP
M30620FCMGP
M30624FGMFP
M30624FGMGP
RAM capacity
ROM capacity Package type RemarksType No June, 2000
128K byte
20K byte
256K byte
128K byte
256K byte
10K byte
20K byte
10K byte
mask ROM version
Flash memory
3V version
Figure 1.1.4. ROM expansion
Description
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
7
Figure 1.1.5. Type No., memory size, and package
M16C/62 Group
M16C Family
Package type:
FP : Package 100P6S-A
GP : 100P6Q-A
ROM No.
Omitted for blank flash memory version
ROM capacity:
C : 128K bytes
G : 256K bytes
Memory type:
M : Mask ROM version
F : Flash memory version
Type No. M 3 0 6 2 0 M C M – X X X F P
Shows RAM capacity, pin count, etc
(The value itself has no specific meaning)
Electrical characteristics
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
8
Table 1.26.1. Absolute maximum ratings
V
REF
, X
IN
X
OUT
- 0.3 to Vcc + 0.3
- 0.3 to Vcc + 0.3
- 0.3 to 4.6
- 65 to 150
300
- 20 to 85 / -40 to 85 (Note)
P3
0
to P3
7
,P4
0
to P4
7
, P5
0
to P5
7
,
P6
0
to P6
7
, P7
2
to P7
7
, P8
0
to P8
7
,
P0
0
to P0
7
, P1
0
to P1
7
, P2
0
to P2
7
,
P3
0
to P3
7
, P4
0
to P4
7
, P5
0
to P5
7
,
P6
0
to P6
7
, P7
2
to P7
7
, P8
0
to P8
4,
P0
0
to P0
7
, P1
0
to P1
7
, P2
0
to P2
7
,
RESET,
P9
0
to P9
7
, P10
0
to P10
7
,
P8
6
, P8
7
, P9
0
to P9
7
, P10
0
to P10
7
,
P7
0
, P7
1
P7
0
, P7
1
- 0.3 to 4.6
CNV
SS
, BYTE,
V
CC
=AV
CC
V
CC
=AV
CC
- 0.3 to 4.6
- 0.3 to 4.6
V
O
P
d
Ta=25
V
I
AVcc
Vcc
T
stg
T
opr
C
Symbol Parameter Condition Rated value Unit
Supply voltage
Analog supply voltage
Input
voltage
Output
voltage
Power dissipation
Operating ambient temperature
Storage temperature
V
V
V
V
V
V
mW
C
C
Note : Specify a product of -40°C to 85°C to use it.
Electrical characteristics
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
9
2.2 3.6
Vcc 3.0
VccAVcc V
V0
0
V
IH
I
OH (avg)
mA
mA
Vss
AVss
0.8Vcc
V
V
V
V
V
V
V
0.8Vcc
0.5Vcc
Vcc
Vcc
Vcc
0.2Vcc
0.2Vcc
0
0
00.16Vcc
I
OH (peak)
P7
2
to P7
7
, P8
0
to P8
7
, P9
0
to P9
7
, P10
0
to P10
7
,
- 5.0
- 10.0
P0
0
to P0
7
, P1
0
to P1
7
, P2
0
to P2
7
, P3
0
(during single-chip mode)
P0
0
to P0
7
, P1
0
to P1
7
, P2
0
to P2
7
, P3
0
P0
0
to P0
7
, P1
0
to P1
7
,
P2
0
to P2
7
, P3
0
to P3
7
,
P4
0
to P4
7
, P5
0
to P5
7
,
P6
0
to P6
7
, P7
2
to P7
7
,
P8
0
to P8
4
,
P8
6
,
P8
7
,
P9
0
to P9
7
,
P10
0
to P10
7
P3
1
to P3
7
, P4
0
to P4
7
, P5
0
to P5
7,
P6
0
to P6
7
,
10.0
5.0
mA
f
(X
IN
)
I
OL (peak)
mA
I
OL (avg)
V
X
IN
, RESET, CNV
SS
, BYTE
P7
0
to P7
7
, P8
0
to P8
7
, P9
0
to P9
7
, P10
0
to P10
7
,
P3
1
to P3
7
, P4
0
to P4
7
, P5
0
to P5
7,
P6
0
to P6
7
,
X
IN
, RESET, CNV
SS
, BYTE
P0
0
to P0
7
, P1
0
to P1
7
, P2
0
to P2
7
, P3
0
(during single-chip mode)
P0
0
to P0
7
, P1
0
to P1
7
, P2
0
to P2
7
, P3
0
P0
0
to P0
7
, P1
0
to P1
7
,
P2
0
to P2
7
, P3
0
to P3
7
,
P4
0
to P4
7
, P5
0
to P5
7
,
P6
0
to P6
7
, P7
2
to P7
7
,
P8
0
to P8
4
,
P8
6
,
P8
7
,
P9
0
to P9
7
,
P10
0
to P10
7
P0
0
to P0
7
, P1
0
to P1
7
,
P2
0
to P2
7
, P3
0
to P3
7
,
P4
0
to P4
7
, P5
0
to P5
7
,
P6
0
to P6
7
, P7
0
to P7
7
,
P8
0
to P8
4
,
P8
6
,
P8
7
,
P9
0
to P9
7
,
P10
0
to P10
7
P0
0
to P0
7
, P1
0
to P1
7
,
P2
0
to P2
7
, P3
0
to P3
7
,
P4
0
to P4
7
, P5
0
to P5
7
,
P6
0
to P6
7
, P7
0
to P7
7
,
P8
0
to P8
4
,
P8
6
,
P8
7
,
P9
0
to P9
7
,
P10
0
to P10
7
P7
0
,0.8Vcc 4.6 V
P7
1
V
IL
10 X Vcc
- 17
Vcc=2.7V to 3.6V
Vcc=2.4V to 2.7V
0
0
MHz
MHz
10
0MHz
17.5 X Vcc
- 35
f
(Xc
IN
)kHz
50
32.768
6 X Vcc
- 6.2
Vcc=2.7V to 3.6V
Vcc=2.2V to 2.7V
0
0
MHz
MHz
10
Vcc=2.2V to 2.4V
Supply voltage
Analog supply voltage
Supply voltage
Analog supply voltage
HIGH input
voltage
LOW input
voltage
HIGH peak output
current
HIGH average output
current
LOW peak output
current
LOW average
output current
Main clock input
oscillation
frequency
Subclock oscillation frequency
with wait
No wait
Symbol Parameter Unit
Standard
Min. Typ. Max.
(data input function during memory expansion and microprocessor modes)
(data input function during memory expansion and microprocessor modes)
Note 1: The mean output current is the mean value within 100ms.
Note 2: The total IOL (peak) for ports P0, P1, P2, P86, P87, P9, and P10 must be 80mA max. The total IOH (peak) for ports P0, P1,
P2, P86, P87, P9, and P10 must be 80mA max. The total IOL (peak) for ports P3, P4, P5, P6, P7, and P80 to P84 must be
80mA max. The total IOH (peak) for ports P3, P4, P5, P6, P72 to P77, and P80 to P84 must be 80mA max.
Note 3: Specify a product of -40°C to 85°C to use it.
Note 4: Relationship between main clock oscillation frequency and supply voltage.
Note 5: Execute case without wait, program / erase of flash memory by VCC=2.7V to 3.6V and f(BCLK) ≤ 6.25 MHz. Execute case
with wait, program / erase of flash memory by VCC=2.7V to 3.6V and f(BCLK) ≤ 10.0 MHz.
Table 1.26.2. Recommended operating conditions (referenced to VCC = 2.2V to 3.6V at Ta = – 20°C
to 85oC / – 40°C to 85oC(Note3) unless otherwise specified)
Main clock input oscillation frequency
(With wait)
AAAAAAA
AAAAAAA
AAAAAAA
AAAAAAA
AAAAAAA
AAAAAAA
AAAAAAA
AAAAAAA
2.2 2.7 3.6
Operating maximum
frequency
[MH
Z
]
Supply voltage
[V]
(BCLK: no division)
6 X VCC –6.2MHZ
Main clock input oscillation frequency
(No wait)
AAAAAAA
AAAAAAA
AAAAAAA
AAAAAAA
AAAAAAA
AAAAAAA
AAAAAAA
AAAAAAA
10.0
3.5
0.0
Operating maximum
frequency
[MH
Z
]
Supply voltage
[V]
(BCLK: no division)
10 X VCC –17MHZ
2.4
7.0
2.2 2.7 3.62.4
10.0
0.0
7.0
17.5 X VCC
–35MHZ
Flash program voltage Flash read operation voltage
VCC=2.7V to 3.6V VCC=2.4V to 3.6V
VCC=2.7V to 3.4V VCC=2.2V to 2.4V
Flash memory version program voltage and read
operation voltage characteristics
Electrical characteristics
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
10
Table 1.26.3.
Electrical characteristics (referenced to V
CC
= 2.7V to 3.6V, V
SS
= 0V at
Ta = – 20oC to
85oC / – 40oC to 85 oC (Note1)
, f(X
IN
) = 10MH
Z
without wait unless otherwise specified)
V
V
X
O
U
T
2
.
5
2
.
5
V0
.
5
V
X
O
U
T
0
.
5
0
.
5
2
.
5I
O
H
=
–
1
m
A
I
O
H
=
–
0
.
1
m
A
I
O
H
=
–
5
0
µ
A
I
O
L
=
1
m
A
I
O
L
=
0
.
1
m
A
I
O
L
=
5
0
µ
A
P
0
0
t
o
P
0
7
,
P
1
0
t
o
P
1
7
,
P
2
0
t
o
P
2
7
,
P
3
0
t
o
P
3
7
,
P
0
0
t
o
P
0
7
,
P
1
0
t
o
P
1
7
,
P
2
0
t
o
P
2
7
,
P
3
0
t
o
P
3
7
,
P
4
0
t
o
P
4
7
,
P
5
0
t
o
P
5
7
,
P
6
0
t
o
P
6
7
,
P
7
2
t
o
P
7
7
,
P
4
0
t
o
P
4
7
,
P
5
0
t
o
P
5
7
,
P
6
0
t
o
P
6
7
,
P
7
0
t
o
P
7
7
,
P
8
0
t
o
P
8
4
,
P
8
6
,
P
8
7
,
P
9
0
t
o
P
9
7
,
P
1
0
0
t
o
P
1
0
7
H
I
G
H
P
O
W
E
R
L
O
W
P
O
W
E
R
H
I
G
H
P
O
W
E
R
L
O
W
P
O
W
E
R
P
8
0
t
o
P
8
4
,
P
8
6
,
P
8
7
,
P
9
0
t
o
P
9
7
,
P
1
0
0
t
o
P
1
0
7
H
I
G
H
P
O
W
E
R
L
O
W
P
O
W
E
R
X
C
O
U
T
3
.
0
1
.
6V
0
.
20
.
8V
0
.
21
.
8V
P
0
0
t
o
P
0
7
,
P
1
0
t
o
P
1
7
,
P
2
0
t
o
P
2
7
,
P
3
0
t
o
P
3
7
,
P
4
0
t
o
P
4
7
,
P
5
0
t
o
P
5
7
,
P
6
0
t
o
P
6
7
,
P
7
0
t
o
P
7
7
,
P
8
0
t
o
P
8
7
,
P
9
0
t
o
P
9
7
,
P
1
0
0
t
o
P
1
0
7
,
4
.
0µ
A
µ
A
W
h
e
n
c
l
o
c
k
i
s
s
t
o
p
p
e
d2
.
0V
R
E
S
E
T
X
I
N
,
R
E
S
E
T
,
C
N
V
s
s
,
B
Y
T
EV
I
=
3
V
V
I
=
0
V–
4
.
0
P
0
0
t
o
P
0
7
,
P
1
0
t
o
P
1
7
,
P
2
0
t
o
P
2
7
,
P
3
0
t
o
P
3
7
,
P
4
0
t
o
P
4
7
,
P
5
0
t
o
P
5
7
,
P
6
0
t
o
P
6
7
,
P
7
0
t
o
P
7
7
,
P
8
0
t
o
P
8
7
,
P
9
0
t
o
P
9
7
,
P
1
0
0
t
o
P
1
0
7
,
X
I
N
,
R
E
S
E
T
,
C
N
V
s
s
,
B
Y
T
E
X
I
N
X
C
I
N
1
0
.
0
3
.
0M
Ω
M
Ω
S
q
u
a
r
e
w
a
v
e
,
n
o
d
i
v
i
s
i
o
n
f
(
X
I
N
)
=
1
0
M
H
zm
A9
.
52
1
.
2
5
M
a
s
k
R
O
M
v
e
r
s
i
o
n
7
5k
Ω
P
0
0
t
o
P
0
7
,
P
1
0
t
o
P
1
7
,
P
2
0
t
o
P
2
7
,
P
3
0
t
o
P
3
7
,
P
4
0
t
o
P
4
7
,
P
5
0
t
o
P
5
7
,
P
6
0
t
o
P
6
7
,
P
7
2
t
o
P
7
7
,
P
8
0
t
o
P
8
4
,
P
8
6
,
P
8
7
,
P
9
0
t
o
P
9
7
,
P
1
0
0
t
o
P
1
0
7
V
X
C
O
U
T
0
0
H
I
G
H
P
O
W
E
R
L
O
W
P
O
W
E
R
V
I
=
0
V2
03
3
0
W
h
e
n
c
l
o
c
k
i
s
s
t
o
p
p
e
d
T
a
=
2
5°C1
.
0
µ
A
T
a
=
8
5°C2
0
.
0
W
h
e
n
c
l
o
c
k
i
s
s
t
o
p
p
e
d
f
(
X
C
I
N
)
=
3
2
k
H
z
W
h
e
n
a
W
A
I
T
i
n
s
t
r
u
c
t
i
o
n
i
s
e
x
e
c
u
t
e
d
.
O
s
c
i
l
l
a
t
i
o
n
c
a
p
a
c
i
t
y
H
i
g
h
(
N
o
t
e
2
)
2
.
8µ
A
0
.
9µ
A
f
(
X
C
I
N
)
=
3
2
k
H
z
W
h
e
n
a
W
A
I
T
i
n
s
t
r
u
c
t
i
o
n
i
s
e
x
e
c
u
t
e
d
.
O
s
c
i
l
l
a
t
i
o
n
c
a
p
a
c
i
t
y
L
o
w
(
N
o
t
e
2
)
S
q
u
a
r
e
w
a
v
e
,
n
o
d
i
v
i
s
i
o
n
f
(
X
I
N
)
=
1
0
M
H
zm
A1
2
.
02
1
.
2
5
F
l
a
s
h
m
e
m
o
r
y
3
V
v
e
r
s
i
o
n
q
u
a
r
e
w
a
v
e
f
(
X
C
I
N
)
=
3
2
k
H
z4
5
.
0µ
A
M
a
s
k
R
O
M
v
e
r
s
i
o
n,
f
l
a
s
h
m
e
m
o
r
y
3
V
v
e
r
s
i
o
n
S
D
A
,
C
L
K
0
t
o
C
L
K
4
,
T
A
2
O
U
T
t
o
T
A
4
O
U
T
,
H
O
L
D
,
R
D
Y
,
T
A
0
I
N
t
o
T
A
4
I
N
,
T
B
0
I
N
t
o
T
B
5
I
N
,
I
N
T
0
t
o
I
N
T
5
,
N
M
I
,
A
D
T
R
G
,
C
T
S
0
t
o
C
T
S
2
,
S
C
L
,
K
I
0
t
o
K
I
3
,
R
x
D
0
t
o
R
x
D
2
,
S
I
N
3
,
S
I
N
4
M
a
s
k
R
O
M
v
e
r
s
i
o
n,
f
l
a
s
h
m
e
m
o
r
y
3
V
v
e
r
s
i
o
n
F
l
a
s
h
m
e
m
o
r
y
3
V
v
e
r
s
i
o
n
p
r
o
g
r
a
m
Fl
a
s
h
m
e
m
o
r
y
3
V
v
e
r
s
i
o
n
e
r
a
s
e
S
q
u
a
r
e
w
a
v
e
,
d
i
v
i
s
i
o
n
b
y
2
f
(
X
I
N
)
=
1
0
M
H
z
S
q
u
a
r
e
w
a
v
e
,
d
i
v
i
s
i
o
n
b
y
2
f
(
X
I
N
)
=
1
0
M
H
z
1
4
.
0
1
7
.
0
m
A
m
A
S
y
m
b
o
l
V
O
H
H
I
G
H
o
u
t
p
u
t
v
o
l
t
a
g
e
V
O
H
V
O
L
L
O
W
o
u
t
p
u
t
v
o
l
t
a
g
e
L
O
W
o
u
t
p
u
t
v
o
l
t
a
g
e
V
O
L
H
I
G
H
o
u
t
p
u
t
v
o
l
t
a
g
e
S
t
a
n
d
a
r
d
T
y
p
.U
n
i
tM
e
a
s
u
r
i
n
g
c
o
n
d
i
t
i
o
nM
i
nM
a
x
.
P
a
r
a
m
e
t
e
r
H
I
G
H
o
u
t
p
u
t
v
o
l
t
a
g
eW
i
t
h
n
o
l
o
a
d
a
p
p
l
i
e
d
W
i
t
h
n
o
l
o
a
d
a
p
p
l
i
e
d
H
y
s
t
e
r
e
s
i
s
H
y
s
t
e
r
e
s
i
s
H
I
G
H
i
n
p
u
t
c
u
r
r
e
n
t
I
I
H
L
O
W
i
n
p
u
t
c
u
r
r
e
n
t
I
I
L
V
R
A
MR
A
M
r
e
t
e
n
t
i
o
n
v
o
l
t
a
g
e
I
C
CP
o
w
e
r
s
u
p
p
l
y
c
u
r
r
e
n
t
V
T
+
–
V
T
–
V
T
+
–
V
T
–
R
f
X
I
N
R
f
X
C
I
N
F
e
e
d
b
a
c
k
r
e
s
i
s
t
a
n
c
e
F
e
e
d
b
a
c
k
r
e
s
i
s
t
a
n
c
e
R
PU
L
L
U
P
L
O
W
o
u
t
p
u
t
v
o
l
t
a
g
eW
i
t
h
n
o
l
o
a
d
a
p
p
l
i
e
d
W
i
t
h
n
o
l
o
a
d
a
p
p
l
i
e
d
I
n
s
i
n
g
l
e
-
c
h
i
p
m
o
d
e
,
t
h
e
o
u
t
p
u
t
p
i
n
s
a
r
e
o
p
e
n
a
n
d
o
t
h
e
r
p
i
n
s
a
r
e
V
S
S
P
u
l
l
-
u
p
r
e
s
i
s
t
a
n
c
e
Note 1: Specify a product of -40°C to 85°C to use it.
Note 2: With one timer operated using fC32.
Electrical characteristics
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
11
R
L
A
D
D
E
R
R
e
f
e
r
e
n
c
e
v
o
l
t
a
g
e
A
n
a
l
o
g
i
n
p
u
t
v
o
l
t
a
g
e
k
Ω
V
V
I
A
V
R
E
F
V
0
2
.
4
1
0
V
C
C
V
R
E
F
4
0
t
C
O
N
V
V
R
E
F
=
V
C
C
–
–
B
i
t
s
L
S
B
V
R
E
F
=
V
C
C
±
2
1
0
V
R
E
F
=
V
C
C
=
3
V
,
f
A
D
=
f
A
D
/
2
9
.
8µ
s
L
a
d
d
e
r
r
e
s
i
s
t
a
n
c
e
C
o
n
v
e
r
s
i
o
n
t
i
m
e
(
8
b
i
t
)
A
b
s
o
l
u
t
e
a
c
c
u
r
a
c
y
S
a
m
p
l
e
&
h
o
l
d
f
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Table 1.26.5.
D-A conversion characteristics (referenced to VCC = 2.4V to 3.6V, VSS = AVSS = 0V, VREF=3V,
at Ta = – 20oC to 85oC / – 40oC to 85oC (Note2), f(XIN)=10MHZ unless otherwise specified)
Note 1: This applies when using one D-A converter, with the D-A register for the unused D-A converter set to “0016”.
The A-D converter's ladder resistance is not included.
Also, when DA register contents are not “00”, the current IVREF always flows even though Vref may have been
set to be “unconnected” by the A-D control register.
Note 2: Specify a product of –40°C to 85°C to use it.
Note 1: Connect AVCC pin to VCC pin and apply the same electric potential.
Note 2: Specify a product of –40°C to 85°C to use it.
Table 1.26.4.
A-D conversion characteristics (referenced to VCC = AVCC = VREF = 2.4V to 3.6V, VSS = AVSS
= 0V, at Ta = – 20oC to 85oC / – 40oC to 85oC (Note2), f(XIN)=10MHZ unless otherwise specified)
Table 1.26.6.
Flash memory version electrical characteristics
(referenced to VCC = 2.7V to 3.6V, at Ta =0oC to 60oC unless otherwise specified)
Note : n denotes the number of block erases.
Table 1.26.7.
Flash memory version program voltage and read operation voltage characteristics
(Ta =0oC to 60oC)
Flash program voltage Flash read operation voltage
V
CC
=2.7V to 3.6V V
CC
=2.4V to 3.6V
V
CC
=2.7V to 3.4V V
CC
=2.2V to 2.4V
Timing
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
12
Timing requirements
(referenced to V
CC
= 3V, V
SS
= 0V, at Ta = – 20
o
C to 85
o
C / – 40
o
C to 85
o
C (*) unless otherwise specified)
* : Specify a product of -40°C to 85°C to use it.
Table 1.26.8. External clock input
Table 1.26.9. Memory expansion and microprocessor modes
18
80
60
0
0
80
18
100
0
100
40
40
9
10
(Note)
Note: Calculated according to the BCLK frequency as follows:
t
ac1(RD – DB) = f(BCLK) X 2 – 90 [ns]
t
ac2(RD – DB) = f(BCLK) X 2 – 90
3 X 10
9
[ns]
t
ac3(RD – DB) = f(BCLK) X 2 – 90
3 X 10
9
[ns]
Max.
External clock rise time
nst
r
Min.
External clock input cycle time
ns
t
c
External clock input HIGH pulse width
ns
t
w(H
)
External clock input LOW pulse width
ns
t
w(L)
External clock fall time
ns
t
f
Parameter
Symbol Unit
Standard
Min.
Data input setup time
ns
t
su(DB-RD)
t
su(RDY-BCLK )
ParameterSymbol Unit
Max.
Standard
RDY input setup time
ns
Data input hold time
ns
t
h(RD-DB)
t
h(BCLK -RDY)
ns
RDY input hold time
HOLD input setup time
ns
t
su(HOLD-BCLK )
HOLD input hold time
ns
t
h(BCLK-HOLD )
Data input access time (no wait)
ns
t
ac1(RD-DB)
ns
ns
t
ac2(RD-DB)
t
ac3(RD-DB)
Data input access time (with wait)
Data input access time (when accessing multiplex bus area)
HLDA output delay time
ns
t
d(BCLK-HLDA)
(Note)
(Note)
Timing
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
13
Table 1.26.11. Timer A input (gating input in timer mode)
Table 1.26.12. Timer A input (external trigger input in one-shot timer mode)
Table 1.26.13. Timer A input (external trigger input in pulse width modulation mode)
Table 1.26.14. Timer A input (up/down input in event counter mode)
Table 1.26.10. Timer A input (counter input in event counter mode)
Timing requirements
(referenced to V
CC
= 3V, V
SS
= 0V, at Ta = – 20
o
C to 85
o
C / – 40
o
C to 85
o
C (*) unless otherwise specified)
* : Specify a product of –40°C to 85°C to use it.
Standard
Max.Min. UnitParameterSymbol
nst
w(TAL)
TAi
IN
input LOW pulse width 60
nst
c(TA)
TAi
IN
input cycle time 150 nst
w(TAH)
TAi
IN
input HIGH pulse width 60
Standard
Max.Min. UnitParameterSymbol
nst
c(TA)
TAi
IN
input cycle time 600 nst
w(TAH)
TAi
IN
input HIGH pulse width 300 nst
w(TAL)
TAi
IN
input LOW pulse width 300
Standard
Max.Min. UnitParameterSymbol
nst
c(TA)
TAi
IN
input cycle time 300 nst
w(TAH)
TAi
IN
input HIGH pulse width 150 nst
w(TAL)
TAi
IN
input LOW pulse width 150
Standard
Max.Min. UnitParameterSymbol
nst
w(TAH)
TAi
IN
input HIGH pulse width 150 nst
w(TAL)
TAi
IN
input LOW pulse width 150
Standard
Max.Min. UnitParameterSymbol
nst
c(UP)
TAi
OUT
input cycle time 3000 nst
w(UPH)
TAi
OUT
input HIGH pulse width 1500 nst
w(UPL)
TAi
OUT
input LOW pulse width 1500 nst
su(UP-T
IN
)
TAi
OUT
input setup time 600 nst
h(T
IN-
UP)
TAi
OUT
input hold time 600
Timing
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
14
Table 1.26.15. Timer B input (counter input in event counter mode)
Table 1.26.16. Timer B input (pulse period measurement mode)
Table 1.26.17. Timer B input (pulse width measurement mode)
Table 1.26.18. A-D trigger input
Table 1.26.19. Serial I/O
_______
Table 1.26.20. External interrupt INTi inputs
Timing requirements
(referenced to V
CC
= 3V, V
SS
= 0V, at Ta = – 20
o
C to 85
o
C / – 40
o
C to 85
o
C (*) unless otherwise specified)
* : Specify a product of –40°C to 85°C to use it.
Standard
Max.
Min.
Parameter
Symbol Unit
nst
c(TB)
TBi
IN
input cycle time (counted on one edge) 150 nst
w(TBH)
TBi
IN
input HIGH pulse width (counted on one edge) 60 nst
w(TBL)
TBi
IN
input LOW pulse width (counted on one edge) 60
t
w(TBH)
ns
TBi
IN
input HIGH pulse width (counted on both edges) 160
t
w(TBL)
ns
TBi
IN
input LOW pulse width (counted on both edges) 160
t
c(TB)
ns
TBi
IN
input cycle time (counted on both edges) 300
Standard
Max.
Min.
Parameter
Symbol Unit
nst
c(TB)
TBi
IN
input cycle time 600 nst
w(TBH)
TBi
IN
input HIGH pulse width 300
t
w(TBL)
nsTBi
IN
input LOW pulse width 300
Standard
Max.
Min.
Parameter
Symbol Unit
nst
c(TB)
TBi
IN
input cycle time 600 nst
w(TBH)
TBi
IN
input HIGH pulse width 300
t
w(TBL)
nsTBi
IN
input LOW pulse width 300
Standard
Max.
Min.
Parameter
Symbol Unit
nst
c(AD)
AD
TRG
input cycle time (trigger able minimum) 1500 nst
w(ADL)
AD
TRG
input LOW pulse width 200
Standard
Max.
Min.
Parameter
Symbol Unit
nst
w(INH)
INTi input HIGH pulse width 380
nst
w(INL)
INTi input LOW pulse width 380
Standard
Max.
Min.
Parameter
Symbol Unit
nst
c(CK)
CLKi input cycle time 300 nst
w(CKH)
CLKi input HIGH pulse width 150 nst
w(CKL)
CLKi input LOW pulse width 150
t
h(C-Q)
nsTxDi hold time 0
t
su(D-C)
nsRxDi input setup time 50
t
h(C-D)
nsRxDi input hold time 90
t
d(C-Q)
nsTxDi output delay time 160
Timing
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
15
Switching characteristics (referenced to VCC = 3V, VSS = 0V at Ta = – 20oC to 85oC / – 40oC to 85oC
(Note 3), CM15 = “1” unless otherwise specified)
Table 1.26.21. Memory expansion and microprocessor modes (with no wait)
t
d(BCLK-AD)
Address output delay time 60 ns
t
d(BCLK-CS)
Chip select output delay time 60 ns
t
h(BCLK-AD)
Address output hold time (BCLK standard) 4 ns
t
h(BCLK-CS)
Chip select output hold time (BCLK standard) 4 ns
t
d(BCLK-ALE)
ALE signal output delay time 60 ns
t
h(BCLK-ALE)
ALE signal output hold time — 4ns
t
d(BCLK-RD)
RD signal output delay time 60 ns
t
h(BCLK-RD)
RD signal output hold time 0 ns
t
h(RD-AD)
Address output hold time (RD standard) 0ns
t
d(BCLK-WR)
WR signal output delay time 60 ns
t
h(BCLK-WR)
WR signal output hold time 0 ns
t
h(WR-AD)
Address output hold time (WR standard) 0ns
t
d(BCLK-DB)
Data output delay time (BCLK standard) 80 ns
t
h(BCLK-DB)
Data output hold time (BCLK standard) 4ns
t
d(DB-WR)
Data output delay time (WR standard) (Note1) ns
t
h(WR-DB)
Data output hold time (WR standard)(Note2) 0 ns
Note 1: Calculated according to the BCLK frequency as follows:
td(DB – WR) = f(BCLK) X 2
10
9
– 80 [ns]
Symbol
Standard
Measuring condition
Max.Min.
Parameter Unit
Note 2: This is standard value shows the timing when the output is off,
and doesn't show hold time of data bus.
Hold time of data bus is different by capacitor volume and pull-up
(pull-down) resistance value.
Hold time of data bus is expressed in
t = –CR X ln (1 – V
OL
/ V
CC
)
by a circuit of the right figure.
For example, when V
OL
= 0.2V
CC
, C = 30pF, R = 1kΩ, hold time
of output “L” level is
t = – 30pF X 1kΩ X ln (1 – 0.2V
CC
/ V
CC
)
= 6.7ns.
DBi
R
C
Note 3: Specify a product of –40°C to 85°C to use it.
Figure 1.26.1
P6
P7
P8
P10
P9
P0
P1
P2
P3
P4
P5
30pF
Figure 1.26.1. Port P0 to P10 measurement circuit
Timing
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
16
Switching characteristics (referenced to VCC = 3V, VSS = 0V at Ta = – 20oC to 85oC / – 40oC to 85oC
(Note 3), CM15 = “1” unless otherwise specified)
Table 1.26.22. Memory expansion and microprocessor modes
(when accessing external memory area with wait)
Note 3: Specify a product of –40°C to 85°C to use it.
td(BCLK-AD) Address output delay time 60 ns
td(BCLK-CS) Chip select output delay time 60 ns
th(BCLK-AD) Address output hold time (BCLK standard) 4 ns
th(BCLK-CS) Chip select output hold time (BCLK standard) 4 ns
td(BCLK-ALE) ALE signal output delay time 60 ns
th(BCLK-ALE) ALE signal output hold time – 4 ns
td(BCLK-RD) RD signal output delay time 60 ns
th(BCLK-RD) RD signal output hold time 0 ns
th(RD-AD) Address output hold time (RD standard) 0ns
td(BCLK-WR) WR signal output delay time 60 ns
th(BCLK-WR) WR signal output hold time 0 ns
th(WR-AD) Address output hold time (WR standard) 0ns
td(BCLK-DB) Data output delay time (BCLK standard) 80 ns
th(BCLK-DB) Data output hold time (BCLK standard) 4ns
td(DB-WR) Data output delay time (WR standard) (Note1) ns
th(WR-DB) Data output hold time (WR standard)(Note2) 0 ns
Note 1: Calculated according to the BCLK frequency as follows:
td(DB – WR) = f(BCLK)
10 9– 80 [ns]
Symbol Standard
Measuring condition
Max.Min.
Parameter Unit
Note 2: This is standard value shows the timing when the output is off,
and doesn't show hold time of data bus.
Hold time of data bus is different by capacitor volume and pull-up
(pull-down) resistance value.
Hold time of data bus is expressed in
t = –CR X ln (1 – V
OL
/ V
CC
)
by a circuit of the right figure.
For example, when V
OL
= 0.2V
CC
, C = 30pF, R = 1kΩ, hold time
of output “L” level is
t = – 30pF X 1kΩ X ln (1 – 0.2V
CC
/ V
CC
)
= 6.7ns.
DBi
R
C
Figure 1.26.1
Timing
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
17
Switching characteristics (referenced to VCC = 3V, VSS = 0V at Ta = – 20oC to 85oC / – 40oC to 85oC
(Note 2), CM15 = “1” unless otherwise specified)
Table 1.26.23. Memory expansion and microprocessor modes
(when accessing external memory area with wait, and select multiplexed bus)
Note 2: Specify a product of –40°C to 85°C to use it.
Symbol
Standard
Measuring condition
Max.Min.
Parameter Unit
t
d(BCLK-AD)
Address output delay time 60 ns
t
h(BCLK-AD)
Address output hold time (BCLK standard) 4ns
t
d(BCLK-CS)
Chip select output delay time 60 ns
t
h(BCLK-CS)
Chip select output hold time (BCLK standard) 4ns
nst
h(RD-AD)
Address output hold time (RD standard) (Note 1)
t
d(BCLK-RD)
RD signal output delay time 60 ns
t
h(BCLK-RD)
RD signal output hold time 0 ns
nst
h(WR-AD)
Address output hold time (WR standard) (Note 1)
t
d(BCLK-WR)
WR signal output delay time 60 ns
t
d(BCLK-DB)
Data output delay time (BCLK standard) 80 ns
t
h(BCLK-DB)
Data output hold time (BCLK standard) 4 ns
t
d(DB-WR)
Data output delay time (WR standard) (Note 1) ns
t
h(BCLK-ALE)
ALE signal output hold time (BCLK standard) – 4 ns
t
d(AD-ALE)
ALE signal output delay time (Address standard) (Note 1) ns
t
h(ALE-AD)
ALE signal output hold time(Address standard) 40 ns
t
h(BCLK-WR)
WR signal output hold time 0ns
nst
h(RD-CS)
Chip select output hold time (RD standard) (Note 1)
t
h(WR-CS)
Chip select output hold time (WR standard) (Note 1) ns
t
d(AD-RD)
Post-address RD signal output delay time ns0
t
d(AD-WR)
Post-address WR signal output delay time ns0
t
dZ(RD-AD)
Address output floating start time ns8
t
d(BCLK-ALE)
ALE signal output delay time (BCLK standard) ns60
Note 1: Calculated according to the BCLK frequency as follows:
th(RD – AD) = f(BCLK) X 2
10
9
[ns]
th(WR – AD) = f(BCLK) X 2
10
9
[ns]
th(RD – CS) = f(BCLK) X 2
10
9
[ns]
th(WR – CS) = f(BCLK) X 2
10
9
[ns]
td(DB – WR) = f(BCLK) X 2
10
9
– 80 [ns]
X 3
td(AD – ALE) = f(BCLK) X 2
10
9
– 45 [ns]
th(WR – DB) = f(BCLK) X 2
10
9
[ns]
t
h(WR-DB)
Data output hold time (WR standard) ns(Note 1)
Figure 1.26.1
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Timing
18
VCC = 3V
t
su(D–C)
TAi
IN
input
TAi
OUT
input
During event counter mode
TBi
IN
input
CLKi
TxDi
RxDi
t
c(TA)
t
w(TAH)
t
w(TAL)
t
c(UP)
t
w(UPH)
t
w(UPL)
t
c(TB)
t
w(TBH)
t
w(TBL)
t
c(AD)
t
w(ADL)
t
c(CK)
t
w(CKH)
t
w(CKL)
t
w(INL)
t
w(INH)
t
d(C–Q)
t
h(C–D)
t
h(C–Q)
t
h(T
IN
–UP)
t
su(UP–T
IN
)
TAi
IN
input
(When count on falling
edge is selected)
TAi
IN
input
(When count on rising
edge is selected)
TAi
OUT
input
(Up/down input)
INTi input
AD
TRG
input
Figure 1.26.2. VCC=3V timing diagram (1)
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Timing
19
VCC = 3V
Measuring conditions :
• VCC=3V
• Input timing voltage : Determined with VIL=0.6V, VIH=2.4V
• Output timing voltage : Determined with VOL=1.5V, VOH=1.5V
Memory Expansion Mode and Microprocessor Mode
BCLK
HOLD input
HLDA output
P0, P1, P2,
P3, P4,
P50 to P52
(Valid with or without wait)
Note: The above pins are set to high-impedance regardless of the input level of the
BYTE pin and bit (PM06) of processor mode register 0 selects the function of
ports P40 to P43.
th(BCLK–HOLD)
tsu(HOLD–BCLK)
(Valid only with wait)
td(BCLK–HLDA)
td(BCLK–HLDA)
Hi–Z
tsu(RDY–BCLK) th(BCLK–RDY)
BCLK
RDY input
RD
(Multiplexed bus)
(Multiplexed bus)
WR, WRL, WRH
WR, WRL, WRH
(Separate bus)
RD
(Separate bus)
Figure 1.26.3. VCC=3V timing diagram (2)
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Timing
20
Read timing
Write timing
BCLK
CSi
ALE
RD 60ns.max
4ns.min
4ns.min
Hi–Z
DB
0ns.min
ADi
BHE
tcyc
80ns.min
BCLK
CSi
ALE –4ns.min
60ns.max 0ns.min
4ns.min
Hi–Z
DB 4ns.min
ADi
BHE
tcyc
th(BCLK–ALE)
th(BCLK–DB)
td(BCLK–ALE)
td(BCLK–WR)
0ns.min
th(WR–AD)
Memory Expansion Mode and Microprocessor Mode
(With no wait)
WR,WRL,
WRH
td(BCLK–CS)
60ns.max th(BCLK–CS)
th(RD–CS)
td(BCLK–AD)
60ns.max th(BCLK–AD)
60ns.max
td(BCLK–ALE)
–4ns.min
th(RD–AD) 0ns.min
td(BCLK–RD) th(BCLK–RD)
tac1(RD–DB)
th(RD–DB)
0ns.min
tSU(DB–RD)
td(BCLK–CS) th(BCLK–CS)
4ns.min
60ns.max
0ns.min
th(WR–CS)
td(BCLK–AD)
60ns.max th(BCLK–AD)
60ns.max
th(BCLK–ALE)
th(BCLK–WR)
td(BCLK–DB)
th(WR–DB)
td(DB–WR)
(
tc
y
c/2–80
)
ns.min 0ns.min
80ns.max
0ns.min
VCC = 3V
Figure 1.26.4. VCC=3V timing diagram (3)
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Timing
21
Read timing
Write timing
BCLK
CSi
ALE
RD
4ns.min
4ns.min
Hi–Z
DB
80ns.min
0ns.min
ADi
BHE
t
d(BCLK–WR)
60ns.max
t
h(BCLK–WR)
0ns.min
BCLK
CSi
t
d(BCLK–CS)
60ns.max
t
d(BCLK–AD)
ALE t
h(BCLK–ALE)
t
h(BCLK–CS)
4ns.min
tcyc 0ns.min
t
h(WR–CS)
0ns.min
t
h(WR–AD)
ADi
BHE
t
d(BCLK–DB) 4ns.min
t
h(BCLK–DB)
t
d(DB–WR)
(tcyc–80)ns.min 0ns.min
t
h(WR–DB)
DBi
t
h(RD–AD)
0ns.min
t
d(BCLK–ALE)
60ns.max
t
SU(DB–RD)
Memory Expansion Mode and Microprocessor Mode
(When accessing external memory area with wait)
Measuring conditions :
• V
CC
=3V
• Input timing voltage : Determined with V
IL
=0.48V, V
IH
=1.5V
• Output timing voltage : Determined with V
OL
=1.5V, V
OH
=1.5V
WR,WRL,
WRH
t
d(BCLK–CS)
60ns.max
t
h(RD–CS)
tcyc
t
d(BCLK–AD)
60ns.max
t
h(BCLK–AD)
–4ns.min
t
h(BCLK–ALE)
60ns.max
t
d(BCLK–RD)
t
h(BCLK–RD) 0ns.min
t
ac2(RD–DB)
t
h(RD–DB)
0ns.min
t
h(BCLK–AD)
60ns.max
t
d(BCLK–ALE)
60ns.max –4ns.min
80ns.max
t
h(BCLK–CS)
4ns.min
VCC = 3V
Figure 1.26.5. VCC=3V timing diagram (4)
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Timing
22
Memory Expansion Mode and Microprocessor Mode
(When accessing external memory area with wait, and select multiplexed bus)
Measuring conditions :
• V
CC
=3V
• Input timing voltage : Determined with V
IL
=0.48V,V
IH
=1.5V
• Output timing voltage : Determined with V
OL
=1.5V,V
OH
=1.5V
Read timing
Write timing
0ns.min
60ns.max –4ns.min
t
h(BCLK–CS)
4ns.min
tcyc
80ns.max
t
h(BCLK–DB)
4ns.min
t
d(DB–WR)
(tcyc*3/2–80)ns.min
Address Data output
(tcyc/2)ns.min
Address
(tcyc/2–60)ns.min
t
d(BCLK–ALE)
t
d(BCLK–WR)
4ns.min
t
d(BCLK–CS)
60ns.max
4ns.min
t
h(BCLK–CS)
4ns.min
tcyc
t
h(RD–DB)
0ns.min
Address
(tcyc/2)ns.min
Data input
Address
tac3(RD–DB)
t
dz(RD–AD)
8ns.max
t
d(AD–RD)
0ns.min
t
d(AD–WR)
BCLK
CSi
ALE
ADi
BHE
ADi
/DBi
BCLK
CSi
ALE
RD
ADi
BHE
ADi
/DBi
WR,WRL,
WRH
t
h(RD–CS)
t
d(AD–ALE) (tcyc/2–45)ns.min
t
SU(DB–RD)
80ns.min
t
h(ALE–AD)
40ns.min
t
d(BCLK–AD)
60ns.max
60ns.max
t
d(BCLK–ALE)
t
h(BCLK–ALE)
–4ns.min (tcyc/2)ns.min
t
h(RD–AD)
t
h(BCLK–AD)
t
h(BCLK–RD)
0ns.min
t
d(BCLK–RD)
60ns.max
t
d(BCLK–CS)
60ns.max
t
h(WR–CS)
(tcyc/2)ns.min
t
d(BCLK–DB)
t
d(AD–ALE)
t
d(BCLK–AD)
60ns.max
t
h(WR–DB)
(tcyc/2)ns.min
t
h(BCLK–AD)
t
h(WR–AD)
t
h(BCLK–WR)
t
h(BCLK–ALE)
0ns.min
60ns.max
VCC = 3V
Figure 1.26.6. VCC=3V timing diagram (5)
Usage precaution
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
23
Timer A (timer mode)
Usage Precaution
Timer A (event counter mode)
(1) Reading the timer Ai register while a count is in progress allows reading, with arbitrary timing, the
value of the counter. Reading the timer Ai register with the reload timing gets “FFFF16” by underflow
or “000016” by overflow. Reading the timer Ai register after setting a value in the timer Ai register with
a count halted but before the counter starts counting gets a proper value.
(2) When stop counting in free run type, set timer again.
(1) Reading the timer Ai register while a count is in progress allows reading, with arbitrary timing, the
value of the counter. Reading the timer Ai register with the reload timing gets “FFFF16”. Reading the
timer Ai register after setting a value in the timer Ai register with a count halted but before the counter
starts counting gets a proper value.
(1) Setting the count start flag to “0” while a count is in progress causes as follows:
• The counter stops counting and a content of reload register is reloaded.
• The TAiOUT pin outputs “L” level.
• The interrupt request generated and the timer Ai interrupt request bit goes to “1”.
(2) The timer Ai interrupt request bit goes to “1” if the timer's operation mode is set using any of the
following procedures:
• Selecting one-shot timer mode after reset.
• Changing operation mode from timer mode to one-shot timer mode.
• Changing operation mode from event counter mode to one-shot timer mode.
Therefore, to use timer Ai interrupt (interrupt request bit), set timer Ai interrupt request bit to “0”
after the above listed changes have been made.
Timer A (one-shot timer mode)
(1) The timer Ai interrupt request bit becomes “1” if setting operation mode of the timer in compliance with
any of the following procedures:
• Selecting PWM mode after reset.
• Changing operation mode from timer mode to PWM mode.
• Changing operation mode from event counter mode to PWM mode.
Therefore, to use timer Ai interrupt (interrupt request bit), set timer Ai interrupt request bit to “0”
after the above listed changes have been made.
(2) Setting the count start flag to “0” while PWM pulses are being output causes the counter to stop
counting. If the TAiOUT pin is outputting an “H” level in this instance, the output level goes to “L”, and
the timer Ai interrupt request bit goes to “1”. If the TAiOUT pin is outputting an “L” level in this instance,
the level does not change, and the timer Ai interrupt request bit does not becomes “1”.
Timer A (pulse width modulation mode)
Timer B (timer mode, event counter mode)
(1) Reading the timer Bi register while a count is in progress allows reading , with arbitrary timing, the
value of the counter. Reading the timer Bi register with the reload timing gets “FFFF16”. Reading the
timer Bi register after setting a value in the timer Bi register with a count halted but before the counter
starts counting gets a proper value.
Usage precaution
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
24
Stop Mode and Wait Mode
A-D Converter
(1) If changing the measurement mode select bit is set after a count is started, the timer Bi interrupt
request bit goes to “1”.
(2) When the first effective edge is input after a count is started, an indeterminate value is transferred to
the reload register. At this time, timer Bi interrupt request is not generated.
Timer B (pulse period/pulse width measurement mode)
Interrupts
(1) Write to each bit (except bit 6) of A-D control register 0, to each bit of A-D control register 1, and to bit
0 of A-D control register 2 when A-D conversion is stopped (before a trigger occurs).
In particular, when the Vref connection bit is changed from “0” to “1”, start A-D conversion after an
elapse of 1 µs or longer.
(2) When changing A-D operation mode, select analog input pin again.
(3) Using one-shot mode or single sweep mode
Read the correspondence A-D register after confirming A-D conversion is finished. (It is known by A-
D conversion interrupt request bit.)
(4) Using repeat mode, repeat sweep mode 0 or repeat sweep mode 1
Use the undivided main clock as the internal CPU clock.
(1) Reading address 0000016
• When maskable interrupt is occurred, CPU read the interrupt information (the interrupt number
and interrupt request level) in the interrupt sequence.
The interrupt request bit of the certain interrupt written in address 00000
16
will then be set to “0”.
Reading address 00000
16
by software sets enabled highest priority interrupt source request bit to “0”.
Though the interrupt is generated, the interrupt routine may not be executed.
Do not read address 0000016 by software.
(2) Setting the stack pointer
• The value of the stack pointer immediately after reset is initialized to 000016. Accepting an
interrupt before setting a value in the stack pointer may become a factor of runaway. Be sure to
set a value in the stack pointer before accepting an interrupt.
_______
When using the NMI interrupt, initialize the stack point at the beginning of a program. Concerning
_______
the first instruction immediately after reset, generating any interrupts including the NMI interrupt is
prohibited.
_______
(3) The NMI interrupt
_______ _______
• The NMI interrupt can not be disabled. Be sure to connect NMI pin to Vcc via a pull-up resistor if
unused. _______
• Do not get either into stop mode with the NMI pin set to “L”.
____________
(1) When returning from stop mode by hardware reset, RESET pin must be set to “L” level until main clock
oscillation is stabilized.
(2) When switching to either wait mode or stop mode, instructions occupying four bytes either from the
WAIT instruction or from the instruction that sets the every-clock stop bit to “1” within the instruction
queue are prefetched and then the program stops. So put at least four NOPs in succession either to
the WAIT instruction or to the instruction that sets the every-clock stop bit to “1”.
Usage precaution
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
25
(4) External interrupt _______ _______
• When the polarity of the INT0 to INT5 pins is changed, the interrupt request bit is sometimes set
to "1". After changing the polarity, set the interrupt request bit to "0".
Example 1:
INT_SWITCH1:
FCLR I ; Disable interrupts.
AND.B #00h, 0055h ; Clear TA0IC int. priority level and int. request bit.
NOP ; Four NOP instructions are required when using HOLD function.
NOP
FSET I ; Enable interrupts.
Example 2:
INT_SWITCH2:
FCLR I ; Disable interrupts.
AND.B #00h, 0055h ; Clear TA0IC int. priority level and int. request bit.
MOV.W MEM, R0 ; Dummy read.
FSET I ; Enable interrupts.
Example 3:
INT_SWITCH3:
PUSHC FLG ; Push Flag register onto stack
FCLR I ; Disable interrupts.
AND.B #00h, 0055h ; Clear TA0IC int. priority level and int. request bit.
POPC FLG ; Enable interrupts.
The reason why two NOP instructions (four when using the HOLD function) or dummy read are inserted
before FSET I in Examples 1 and 2 is to prevent the interrupt enable flag I from being set before the
interrupt control register is rewritten due to effects of the instruction queue.
(5) Rewrite the interrupt control register
• To rewrite the interrupt control register, do so at a point that does not generate the interrupt
request for that register. If there is possibility of the interrupt request occur, rewrite the interrupt
control register after the interrupt is disabled. The program examples are described as follow:
• When a instruction to rewrite the interrupt control register is executed but the interrupt is disabled,
the interrupt request bit is not set sometimes even if the interrupt request for that register has
been generated. This will depend on the instruction. If this creates problems, use the below in-
structions to change the register.
Instructions : AND, OR, BCLR, BSET
Noise
(1) Insert bypass capacitor between VCC and VSS pin for noise and latch up countermeasure.
• Insert bypass capacitor (about 0.1 µF) and connect short and wide line between VCC and VSS
lines.
Usage precaution
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
26
Notes on the microprocessor mode and transition after shifting from the micropro-
cessor mode to the memory expansion mode
• Microprocessor mode
In microprocessor mode, the SFR, internal RAM, and external memory space can be accessed.
For that reason, the internal ROM area cannot be accessed.
• Memory expansion mode
In memory expansion mode, external memory can be accessed in addition to the internal memory
space (SFR, internal RAM, and internal ROM).
However, after the reset has been released and the operation of shifting from the microprocessor
mode has started (“H” applied to the CNVSS pin), the internal ROM area cannot be accessed even if
the CPU shifts to the memory expansion mode.
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Mask ROM number
MITSUBISHI ELECTRIC-CHIP 16-BIT
MICROCOMPUTER M30620MCM-XXXFP/GP
MASK ROM CONFIRMATION FORM
GZZ-SH13-95B<02A0>
27
Date :
TEL
( )
Receipt
Section head
signature Supervisor
signature
Customer
Company
name
Date
issued Date :
Note : Please complete all items marked ❈ .
❈
Issuance
signature
Submitted by Supervisor
❈1. Check sheet
Mitsubishi processes the mask files generated by the mask file generation utilities out of those held on
the floppy disks you give in to us, and forms them into masks. Hence, we assume liability provided that
there is any discrepancy between the contents of these mask files and the ROM data to be burned into
products we produce. Check thoroughly the contents of the mask files you give in.
Prepare 3.5 inches 2HD (IBM format) floppy disks. And store only one mask file in a floppy disk.
❈2. Mark specification
The mark specification differs according to the type of package. After entering the mark specification on
the separate mark specification sheet (for each package), attach that sheet to this masking check sheet
for submission to Mitsubishi.
For the M30620MCM-XXXFP, submit the 100P6S mark specification sheet. For the M30620MCM-XXXGP,
submit the 100P6Q mark specification sheet.
❈3. Usage Conditions
For our reference when of testing our products, please reply to the following questions about the usage
of the products you ordered.
(1) Which kind of XIN-XOUT oscillation circuit is used?
Ceramic resonator Quartz-crystal oscillator
External clock input Other ( )
What frequency do not use?
f(XIN) = MHZ
Microcomputer type No. : M30620MCM-XXXFP M30620MCM-XXXGP
File code : (hex)
Mask file name : .MSK (alpha-numeric 8-digit)
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
GZZ-SH13-95B<02A0>
MITSUBISHI ELECTRIC-CHIP 16-BIT
MICROCOMPUTER M30620MCM-XXXFP/GP
MASK ROM CONFIRMATION FORM
Mask ROM number
28
(2) Which kind of XCIN-XCOUT oscillation circuit is used?
Ceramic resonator Quartz-crystal oscillator
External clock input Other ( )
What frequency do not use?
f(XCIN) = kHZ
(3) Which operation mode do you use?
Single-chip mode Memory expansion mode
Microprocessor mode
(4) Which operating supply voltage do you use?
(Circle the operating voltage range of use)
(5) Which operating ambient temperature do you use?
(Circle the operating temperature range of use)
-50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90(°C)
(6) Do you use I2C (Inter IC) bus function?
Not use Use
(7) Do you use IE (Inter Equipment) bus function?
Not use Use
Thank you cooperation.
❈4. Special item (Indicate none if there is not specified item)
(V)
2.2 2.4 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Mask ROM number
MITSUBISHI ELECTRIC-CHIP 16-BIT
MICROCOMPUTER M30624MGM-XXXFP/GP
MASK ROM CONFIRMATION FORM
GZZ-SH13-48B<98A1>
29
Date :
TEL
( )
Receipt
Section head
signature Supervisor
signature
Customer
Company
name
Date
issued Date :
Note : Please complete all items marked ❈ .
❈
Issuance
signature
Submitted by Supervisor
❈1. Check sheet
Mitsubishi processes the mask files generated by the mask file generation utilities out of those held on
the floppy disks you give in to us, and forms them into masks. Hence, we assume liability provided that
there is any discrepancy between the contents of these mask files and the ROM data to be burned into
products we produce. Check thoroughly the contents of the mask files you give in.
Prepare 3.5 inches 2HD (IBM format) floppy disks. And store only one mask file in a floppy disk.
❈2. Mark specification
The mark specification differs according to the type of package. After entering the mark specification on
the separate mark specification sheet (for each package), attach that sheet to this masking check sheet
for submission to Mitsubishi.
For the M30624MGM-XXXFP, submit the 100P6S mark specification sheet. For the M30624MGM-
XXXGP, submit the 100P6Q mark specification sheet.
❈3. Usage Conditions
For our reference when of testing our products, please reply to the following questions about the usage
of the products you ordered.
(1) Which kind of XIN-XOUT oscillation circuit is used?
Ceramic resonator Quartz-crystal oscillator
External clock input Other ( )
What frequency do not use?
f(XIN) = MHZ
Microcomputer type No. : M30624MGM-XXXFP M30624MGM-XXXGP
File code : (hex)
Mask file name : .MSK (alpha-numeric 8-digit)
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
GZZ-SH13-48B<98A1>
MITSUBISHI ELECTRIC-CHIP 16-BIT
MICROCOMPUTER M30624MGM-XXXFP/GP
MASK ROM CONFIRMATION FORM
Mask ROM number
30
(2) Which kind of XCIN-XCOUT oscillation circuit is used?
Ceramic resonator Quartz-crystal oscillator
External clock input Other ( )
What frequency do not use?
f(XCIN) = kHZ
(3) Which operation mode do you use?
Single-chip mode Memory expansion mode
Microprocessor mode
(4) Which operating supply voltage do you use?
(Circle the operating voltage range of use)
(5) Which operating ambient temperature do you use?
(Circle the operating temperature range of use)
-50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90(°C)
(6) Do you use I2C (Inter IC) bus function?
Not use Use
(7) Do you use IE (Inter Equipment) bus function?
Not use Use
Thank you cooperation.
❈4. Special item (Indicate none if there is not specified item)
(V)
2.2 2.4 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8
Mitsubishi microcomputers
M16C / 62M Group
(Low voltage version)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
31
Differences between M16C/62M (Low voltage version) and M30624FGLFP/GP
Item M16C/62M (Low voltage version) M30624FGLFP/GP
Serial I/O
Memory version Flash memory version only
IIC bus mode
Memory area Memory expansion
1.2 Mbytes mode
4 Mbytes mode
1 Mbyte fixed
No CTS/RTS separate function CTS/RTS separate function
Analog or digital delay is selected as
SDA delay Only analog delay is selected as
SDA delay
Mask ROM version
Flash memory version
Standard serial I/O
mode
(Flash memory version)
Clock synchronized only
Clock synchronized
Clock asynchronized
Keep safety first in your circuit designs!
Notes regarding these materials
●Mitsubishi Electric Corporation puts the maximum effort into making semiconductor
products better and more reliable, but there is always the possibility that trouble may
occur with them. Trouble with semiconductors may lead to personal injury, fire or
property damage. Remember to give due consideration to safety when making your
circuit designs, with appropriate measures such as (i) placement of substitutive,
auxiliary circuits, (ii) use of non-flammable material or (iii) prevention against any
malfunction or mishap.
●These materials are intended as a reference to assist our customers in the selection
of the Mitsubishi semiconductor product best suited to the customer's application;
they do not convey any license under any intellectual property rights, or any other
rights, belonging to Mitsubishi Electric Corporation or a third party.
●Mitsubishi Electric Corporation assumes no responsibility for any damage, or
infringement of any third-party's rights, originating in the use of any product data,
diagrams, charts, programs, algorithms, or circuit application examples contained in
these materials.
●All information contained in these materials, including product data, diagrams, charts,
programs and algorithms represents information on products at the time of publication
of these materials, and are subject to change by Mitsubishi Electric Corporation
without notice due to product improvements or other reasons. It is therefore
recommended that customers contact Mitsubishi Electric Corporation or an authorized
Mitsubishi Semiconductor product distributor for the latest product information before
purchasing a product listed herein.
The information described here may contain technical inaccuracies or typographical
errors. Mitsubishi Electric Corporation assumes no responsibility for any damage,
liability, or other loss rising from these inaccuracies or errors.
Please also pay attention to information published by Mitsubishi Electric Corporation
by various means, including the Mitsubishi Semiconductor home page (http://
www.mitsubishichips.com).
●When using any or all of the information contained in these materials, including
product data, diagrams, charts, programs, and algorithms, please be sure to evaluate
all information as a total system before making a final decision on the applicability of
the information and products. Mitsubishi Electric Corporation assumes no
responsibility for any damage, liability or other loss resulting from the information
contained herein.
●Mitsubishi Electric Corporation semiconductors are not designed or manufactured
for use in a device or system that is used under circumstances in which human life is
potentially at stake. Please contact Mitsubishi Electric Corporation or an authorized
Mitsubishi Semiconductor product distributor when considering the use of a product
contained herein for any specific purposes, such as apparatus or systems for
transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use.
●The prior written approval of Mitsubishi Electric Corporation is necessary to reprint
or reproduce in whole or in part these materials.
●If these products or technologies are subject to the Japanese export control
restrictions, they must be exported under a license from the Japanese government
and cannot be imported into a country other than the approved destination.
Any diversion or reexport contrary to the export control laws and regulations of Japan
and/or the country of destination is prohibited.
●Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semicon
ductor product distributor for further details on these materials or the products con
tained therein.
MITSUBISHI SEMICONDUCTORS
M16C/62M Group (Low voltage version)
Specifications REV.B
Jun. First Edition 2000
Edition by
Committee of editing of Mitsubishi Semiconductor
Published by
Mitsubishi Electric Corp., Kitaitami Works
This book, or parts thereof, may not be reproduced in any form without
permission of Mitsubishi Electric Corporation.
©2000 MITSUBISHI ELECTRIC CORPORATION