74HC/HCT132 SSi QUAD 2-JNPUT NAND SCHMITT TRIGGER FEATURES TYPICAL Output capability: standard SYMBOL | PARAMETER CONDITIONS UNIT Icc category: SSI He HCT teHL/ propagation delay Cy = 15 pF GENERAL DESCRIPTION tPLH nA, nB to n Vee =5V 11 7 ns The 74HC/HCT 132 are high-speed Si-gate CMOS devices and are pin C| input capacitance 3.6 3.5 pF compatible with low power Schottky TTL (LSTTL). They are specified in power dissipation 1 2 24 20 F compliance with JEDEC standard no. 7A. Crp capacitance per gate notes | and Pp The 74HC/HCT 132 contain four 2-input NAND gates which accept standard input signals. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. The gate switches at different points for pasitive and negative-going signals. The difference between the positive voltage V-74 and the negative voltage VT_ is defined as the hysteresis voltage Vy. GNO = 0 V: Tamb = 25 C: ty = te = 6 ns Notes 1. CPD is used to determine the dynamic power dissipation (Pp in wW): Pp = Cpp x Voc? x fi + (CL x Voc? x fo) where: fj = input frequency in MHz Ct = -=_- output load capacitance in pF fo * output frequency in MHz Vcc = supply voltage in V Z (Cy x Voc? x fo} = sum of outputs 2. For HC the condition is Vj = GND to Vcc For HCT the condition is Vj = GND to Vcc 1.5 V PACKAGE OUTLINES SEE PACKAGE INFORMATION SECTION PIN DESCRIPTION PIN NO. SYMBOL NAME AND FUNCTION 1,4,9, 12 1A to 4A data inputs 2,5, 10, 13 1B to 4B data inputs 3, 6, 8, 11 1 to 4V data outputs 7 GND ground (0 V) 14 Vee positive supply voltage uo U +4] Yee ra] [13] 48 vwG] [12] 4a za(a] 132 [iijsy 2e(s| MED ard OES ano (7 | 8] 3 72933343 Fig. 1 Pin configuration. 1 ty f p38 18 O J 2 to | 1 4 s o2Y. 5 5 268 tf 4a 2 & wz] f La Dette a Lf 7293334 7293335.! Fig. 2. Logic symbol. Fig. 3 IEC logic symbol. September 1993 25574HC/HCT 132 Ss APPLICATIONS Wave and pulse shapers Astable multivibrators y @ Monostable multivibrators 7203337 Fig. 5 Logic diagram {one Schmitt trigger). a > g Fig gt of f t f a 7293338 Fig. 4 Functional diagram. FUNCTION TABLE INPUTS OUTPUT nA nB ny L L H L H H H L H H H L H = HIGH voltage level L = LOW voltage level 256 September 1993Quad 2-input NAND Schmitt trigger 74HC/HCT132 SS! DC CHARACTERISTICS FOR 74HC For the OC characteristics see chapter HCMOS family characteristics, section Family specifications. Transfer character- istics are given below. Output capability: standard cc category: SSI Transfer characteristics for 74HC Voltages are referenced to GND (ground = 0 V) Tamb (C) TEST CONDITIONS 74HC SYMBOL | PARAMETER UNIT | Voc | WAVEFORMS +25 40 to +85 | 40 to +125 Vv min.| typ. | max.| min.| max. | min. max, 0.7 | 1.18) 1.5 0.7 } 1.5 0,7 1.5 2.0 VT+ positive-going threshold 1.7 | 2.38] 3.16] 1.7.) 3.15 | 1.7 | 215 | Vv 4.5 Figs 6 and 7 2.1] 3.14/42 | 21142 | 21 | 42 6.0 0.3 | 063) 10 | 03 }1.0 | 03 | 1.0 2.0 VT negative-going threshold 09 | 167/22 | 09/22 )09 | 22 |v 45 Figs 6 and 7 1.2 | 2.26] 3.0 1.2 | 3.0 1.2 3.0 6.0 0.2 | 0.55] 1.0 0.2 | 1.0 0.2 1.0 2.0 Vy hysteresis (V74 VT) 0.4 | 0.71] 1.4 0.4 | 1.4 0.4 1.4 Vv 4.5 Figs 6 and 7 0.6 | 0.88] 1.6 0.6 | 1.6 0.6 1.6 6.0 AC CHARACTERISTICS FOR 74HC GND = 0 V; ty = t=6 ns; Cy, = 50 pF Tamb (C) TEST CONDITIONS 74HC SYMBOL | PARAMETER UNIT | Voc | WAVEFORMS +25 40t0 +85 | 40 to +125 Vv min. typ.| max.! min.| max. | min. | max. . 36 125 165 190 2.0 PHL/ _|_ Propagation delay 13, | 25 31 3a [ns] 4.8 | Fig. 13 PLH nA, nB to n 10 | 21 26 32 8.0 t / 19 75 95 110 2.0 ne output transition time 7 | 15 19 22 | ns 4.5 | Fig. 13 TLH 6 | 13 16 19 6.0 September 1993 25774HC/HCT132 Ss! OC CHARACTERISTICS FOR 74HCT For the DC characteristics see chapter HCMOS family characteristics, section Family specifications. Transfer character- istics are given below. Output capability: standard lec category: SSI Note to HCT types The value of additional quiescent supply current (Alcc) for a unit load of 1 is given in the family specifications. To determine Aicg per input, multiply this value by the unit load coefficient shown in the table below, UNIT LOAD INP UT COEFFICIENT nA, nB 0.3 Transfer characteristics for 74HCT Voltages are referenced to GND (ground = 0 V) Tamb (C) TEST CONDITIONS 74HCT SYMBOL | PARAMETER UNIT | Veco } WAVEFORMS +25 40to +85 | A0t0 +125 Vv min.| typ.| max. | min.| max. | min. | max. VTe positive-going threshold | 1 Ve 43 if 58 v 8 Figs 6 and 7 . . le . 1, 5 | 1.2 0.5 1,2 . . VT negative-going threshold ne oes a oe 1.4 06 14 v Se Figs 6 and 7 : 0.4 | 0.56) 0.4 )- 0.4 - 4.5 . Vi hysteresis (VT+-VT-] | galoso]- |os)/- jos | - | [ss | Figs6and7 AC CHARACTERISTICS FOR 74HCT GND = 0 V; tp = t = 6 ns; CL = 50 pF Tamb (C} TEST CONDITIONS 74HCT SYMBOL | PARAMETER UNIT | Vcc | WAVEFORMS +25 40 to +85 | 40 10 +125 Vv min.) typ. | max.| min.| max. | min. | max. teHL/ propagation delay . teLH nA, nB to nY 20 | 33 41 50 ns 45 Fig. 13 THU! output transition time 7 | 45 19 22 |ns | 45 | Fig, 13 258 September 1993Quad 2-input NAND Schmitt trigger 74HC/HCT 132 Ss TRANSFER CHARACTERISTIC WAVEFORMS Yo y | YH |e 7293338 Fig. 6 Transfer characteristic. oF Mea a 7293339 Fig. 7 Waveforms showing the definition of V+, Vy and Vy; where Vr4 and Vre are between limits of 20% and 70%. Fz2207t ec wat 30 20 Vin iV) Fig. 8 Typical HC transfer characteristics; Veco =2V. Pagar a 1 2 a 4 5 Vin IVE Fig. 9 Typical HC transfer characteristics; Vec = 4.5 Vv. *Z22174 'ce ima} 08 o 0.2 0 1.2 24 36 48 6.0 Vin IVD Fig, 10 Typical HC transfer characteristics; Vec 76 V. 7222073 lec imat 2 og a3 Vin (VI Fig. 11 Typical HCT transfer characteristics; Veco =4.5V. September 1993 25974HC/HCT132 SSI TRANSFER CHARACTERISTIC WAVEFORMS (Cont'd) 7222170 "eC ima) 0 1 2 q a 5 6 Vin (YD Fig. 12 Typical HCT transfer characteristics; Veco =5.5V. AC WAVEFORMS nA. 8 INPUT vay! Le son Toe ny OUTPUT Vag 7293633 CPHL nal "TLH Fig. 13 Waveforms showing the input (nA, 18) to output (nY) propagation delays and the output transition times. Note to AC waveforms (1) HC: Vay = 50%; Vy = GND to Voc. HCT: Vy = 1.3V; Vy = GND to 3V. 260 September 1993Quad 2-input NAND Schmitt trigger 74HC/HCT 132 SSI APPLICATION INFORMATION The slow input rise and fall times cause additional power dissipation, this can be calculated using the following formula: Pad = fi x (tr x loca + tex local x Voc. Where: Pag = additional power dissipation (uW) fj = input frequency (MHz} ty = input rise time (ns); 10% 90% t = input fall time (ns); 10% 90% locg = average additional supply current (uA} Average Icca differs with positive or negative input transitions, as shown in Figs 14 and 15. 7222168 400 nverage lee T (ua) 300 + t t | | 200 Z, L Lf postive- going sige 100 T WAT La ;~ edge | 0 pe J 2 4 Vegivi & Fig. 14 Average Icc for HC Schmitt trigger devices; linear change of Vj; between 0.1 Vcc to 0.9 Vec. 7E2269 positive = going sdge a 2 4 Vecive 6 Fig. 15 Average Iqc for HCT Schmitt trigger devices; linear change of V; between 0.1 Vcc to 0.9 Vcc. HC/HCT 132 used in a relaxation oscillator circuit, see Fig. 16. if 7297237 Fig. 16 Relaxation oscillator using HC/HCT 132. Note to Application information All values given are typical unless otherwise specified. Note to Fig. 16 HC : f= September 1993 261