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IDT74FCT807BT/CT
FAST CMOS 1-TO-10 CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
DECEMBER 2000
2000 Integrated Device Technology, Inc. DSC-4242/1c
IDT74FCT807BT/CT
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
FAST CMOS
1-TO-10 CLOCK DRIVER
FUNCTIONAL BLOCK DIAGRAM
FEATURES:
• 0.5 MICRON CMOS Technology
• Guaranteed low skew < 250ps (max.)
• Very low duty cycle distortion < 350ps (max.)
• High speed: propagation delay < 2.5ns (max.)
• 100MHz operation
• TTL compatible inputs and outputs
• TTL level output voltage swings
• 1:10 fanout
• Output rise and fall time < 1.5ns (max)
• Low input capacitance: 4.5pF typical
• High drive: -32mA IOH, +48mA IOL
• Available in QSOP, SSOP, and SOIC packages
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
DESCRIPTION:
The FCT807T clock driver is built using advanced dual metal CMOS
technology. This low skew clock driver features 1:10 fanout, providing
minimal loading on the preceding drivers. The FCT807T offers low
capacitance inputs with hysteresis for improved noise margins. TTL level
outputs and multiple power and grounds reduce noise. The device also
features -32/48mA drive capability for driving low impedance traces.
IN
O1
O2
O3
O4
O5
O6
O7
O8
O9
O10
PIN CONFIGURATION
QSOP/ SOIC/ SSOP
TOP VIEW
GND
VCC
GND
VCC
GND
GND
VCC
GND
O5
VCC
1
2
3
4
5
6
7
8
9
10 11
12
13
14
15
16
17
18
19
20
IN
O1
O2
O3
O4
O10
O9
O8
O7
O6
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COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
IDT74FCT807BT/CT
FAST CMOS 1-TO-10 CLOCK DRIVER
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Description Max Unit
VTERM Terminal Voltage with Respect to GND –0.5 to +7 V
TSTG Storage Temperature –65 to +150 °C
IOUT DC Output Current –60 to +120 mA
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. PIN DESCRIPTION
Pin Names Description
IN Inputs
Ox Outputs
CAPACITANCE (TA = +25OC, f = 1.0MHz)
Symbol Parameter(1) Conditions Typ. Max. Unit
CIN Input Capacitance VIN = 0V 4.5 6 pF
COUT Output Capacitance VOUT = 0V 5.5 8 pF
NOTE:
1. This parameter is measured at characterization but not tested.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = 0°C to +70°C, Industrial: TA = -40°C to +85°C, VCC = 5V ± 5%
Symbol Parameter Test Conditions(1) Min. Typ.(2) Max. Unit
VIH Input HIGH Level (Input pins) Guaranteed Logic HIGH Level 2 — — V
VIL Input LOW Level Guaranteed Logic LOW Level — — 0.8 V
IIH Input HIGH Current (Input pins) VCC = Max. VI = 2.7V — — ±1µA
IIL Input LOW Current (Input pins) VCC = Max. VI = 0.5V — — ±1µA
IOZH High Impedance Output Current VCC = Max. VO = 2.7V — — ±1µA
IOZL (3-State Output pins) VO = 0.5V — — ±1
IIInput HIGH Current VCC = Max., VI = VCC (Max.) — — ±1µA
VIK Clamp Diode Voltage VCC = Min., IIN = –18mA — –0.7 –1.2 V
IOS Short Circuit Current(4) VCC = Max., VO = GND(3) –60 –120 –225 mA
VOH Output HIGH Voltage VCC = Min. IOH = –15mA 2 . 4 3 . 3 — V
VIN = VIH or VIL IOH = –32mA 2 3 —
VOL Output LOW Voltage VCC = Min. IOL = 48mA — 0.3 0.55 V
VIN = VIH or VIL
IOFF Input/Output Power Off Leakage VCC = 0V, VIN or VO ≤ 4.5V — — ±1µA
VHInput Hysteresis for all inputs — — 150 — mV
ICCL Quiescent Power Supply Current VCC = Max., VIN = GND or VCC — 5 500 µA
ICCH
ICCZ
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. Duration of the condition should not exceed one second.
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IDT74FCT807BT/CT
FAST CMOS 1-TO-10 CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V); all other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
5. Values for these conditions are examples of the IC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fONO)
ICC = Quiescent Current (ICCL, ICCH and ICCZ)
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fO = Output Frequency
NO = Number of Outputs at fO
All currents are in milliamps and all frequencies are in megahertz.
POWER SUPPLY CHARACTERISTICS
Symbol Parameter Test Conditions(1) Min. Typ.(2) Max. Unit
∆ICC Quiescent Power Supply Current VCC = Max. — 0.5 2 mA
TTL Inputs HIGH VIN = 3.4V
ICCD Dynamic Power Supply Current(3) VCC = Max. VIN = VCC — 0.4 0.6 mA/MHz
Input Toggling VIN = GND
50% Duty Cycle
Outputs Open
ICTotal Power Supply Current(5) VCC = Max. VIN = VCC — 20 30.5(4) mA
Input Toggling VIN = GND
50% Duty Cycle
Outputs Open VIN = 3.4V — 20.3 31.3(4)
fI = 50MHz VIN = GND
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COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
IDT74FCT807BT/CT
FAST CMOS 1-TO-10 CLOCK DRIVER
NOTES:
1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. tPLH, tPHL, tSK(t) are production tested. All other parameters guaranteed but not production tested.
4. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay limits do not imply skew.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - COMMERCIAL(3,4)
FCT807BT FCT807CT
Symbol Parameter Conditions(1) Min.(2) Max.Min.(2) Max.Unit
tPLH Propagation Delay 1.3 2.7 1.3 2.5 ns
tPHL
tROutput Rise Time — 1.5 — 1.5 ns
tFOutput Fall Time — 1.5 — 1.5 ns
tSK(O) Output skew: skew between outputs of all banks of — 0.5 — 0.25 ns
same package (inputs tied together)
tSK(P) Pulse skew: skew between opposite transitions — 0.5 — 0.35 ns
of same output (|tPHL -– tPLH|)
tSK(T) Package skew: skew between outputs of different — 0.9 — 0.65 ns
packages at same power supply voltage,
temperature, package type and speed grade
50Ω to VCC/2,
CL = 10pF
(See figure 1)
or 50Ω ac
termination,
CL = 10pF
(See figure 2)
f ≤ 100MHz
Outputs connected in
groups of two
FCT807BT FCT807CT
Symbol Parameter Conditions(1) Min.(2) Max.Min.(2) Max.Unit
tPLH Propagation Delay 1.5 3.8 1.5 3.5 ns
tPHL
tROutput Rise Time — 1.5 — 1.5 ns
tFOutput Fall Time — 1.5 — 1.5 ns
tSK(O) Output skew: skew between outputs of all banks of — 0.5 — 0.25 ns
same package (inputs tied together)
tSK(P) Pulse skew: skew between opposite transitions — 0.5 — 0.35 ns
of same output (|tPHL -– tPLH|)
tSK(T) Package skew: skew between outputs of different — 0.9 — 0.75 ns
packages at same power supply voltage,
temperature, package type and speed grade
CL = 30pF
f ≤ 67MHz
(See figure 3)
FCT807BT FCT807CT
Symbol Parameter Conditions(1) Min.(2) Max.Min.(2) Max.Unit
tPLH Propagation Delay 1.5 3.8 1.5 3.5 ns
tPHL
tROutput Rise Time — 1.5 — 1.5 ns
tFOutput Fall Time — 1.5 — 1.5 ns
tSK(O) Output skew: skew between outputs of all banks of — 0.5 — 0.35 ns
same package (inputs tied together)
tSK(P) Pulse skew: skew between opposite transitions — 0.6 — 0.45 ns
of same output (|tPHL -– tPLH|)
tSK(T) Package skew: skew between outputs of different — 1 — 0.75 ns
packages at same power supply voltage,
temperature, package type and speed grade
CL = 30pF
f ≤ 40MHz
(See figure 4)
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IDT74FCT807BT/CT
FAST CMOS 1-TO-10 CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
NOTES:
1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. tPLH, tPHL, tSK(t) are production tested. All other parameters guaranteed but not production tested.
4. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay limits do not imply skew.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - INDUSTRIAL(3,4)
FCT807BT FCT807CT
Symbol Parameter Conditions(1) Min.(2) Max.Min.(2) Max.Unit
tPLH Propagation Delay 1.3 2.9 1.3 2.7 ns
tPHL
tROutput Rise Time — 1.5 — 1.5 ns
tFOutput Fall Time — 1.5 — 1.5 ns
tSK(O) Output skew: skew between outputs of all banks of — 0.6 — 0.35 ns
same package (inputs tied together)
tSK(P) Pulse skew: skew between opposite transitions — 0.6 — 0.45 ns
of same output (|tPHL -– tPLH|)
tSK(T) Package skew: skew between outputs of different — 0.9 — 0.65 ns
packages at same power supply voltage,
temperature, package type and speed grade
50Ω to VCC/2,
CL = 10pF
(See figure 1)
or 50Ω ac
termination,
CL = 10pF
(See figure 2)
f ≤ 100MHz
Outputs connected in
groups of two
FCT807BT FCT807CT
Symbol Parameter Conditions(1) Min.(2) Max.Min.(2) Max.Unit
tPLH Propagation Delay 1.5 4 1.5 3.7 ns
tPHL
tROutput Rise Time — 1.5 — 1.5 ns
tFOutput Fall Time — 1.5 — 1.5 ns
tSK(O) Output skew: skew between outputs of all banks of — 0.6 — 0.35 ns
same package (inputs tied together)
tSK(P) Pulse skew: skew between opposite transitions — 0.6 — 0.45 ns
of same output (|tPHL -– tPLH|)
tSK(T) Package skew: skew between outputs of different — 0.9 — 0.75 ns
packages at same power supply voltage,
temperature, package type and speed grade
CL = 30pF
f ≤ 67MHz
(See figure 3)
FCT807BT FCT807CT
Symbol Parameter Conditions(1) Min.(2) Max.Min.(2) Max.Unit
tPLH Propagation Delay 1.5 4 1.5 3.7 ns
tPHL
tROutput Rise Time — 1.5 — 1.5 ns
tFOutput Fall Time — 1.5 — 1.5 ns
tSK(O) Output skew: skew between outputs of all banks of — 0.6 — 0.45 ns
same package (inputs tied together)
tSK(P) Pulse skew: skew between opposite transitions — 0.7 — 0.55 ns
of same output (|tPHL -– tPLH|)
tSK(T) Package skew: skew between outputs of different — 1 — 0.75 ns
packages at same power supply voltage,
temperature, package type and speed grade
CL = 30pF
f ≤ 40MHz
(See figure 4)
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COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
IDT74FCT807BT/CT
FAST CMOS 1-TO-10 CLOCK DRIVER
Pulse
Generator
RT
D.U.T.
VCC
VIN
C
VOUT
L
50pF
Pulse
Generator
RT
D.U.T.
VCC
VIN VOUT
CL
30pF
Pulse
Generator
RT
D.U.T.
VCC
VIN VOUT
50Ω10pF
220pF
Pulse
Generator
RT
D.U.T.
VCC
VIN VOUT
100Ω
100Ω
10pF
VCC
Pulse
Generator
RT
D.U.T.
VCC
VIN
CL
VOUT
50pF 500Ω
500Ω
7.0V
The capacitor value for AC termination is determined by the operating frequency. For
very low frequencies a higher capacitor value should be selected.
TEST CIRCUITS
Fig. 5: Enable and Disable Time Circuit
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Test Switch
Disable LOW 6V
Enable LOW
Disable HIGH G N D
Enable HIGH
SWITCH POSITION
Fig. 1: 50
ΩΩ
ΩΩ
Ω
to VCC/2, CL = 10pF Fig. 2: 50
ΩΩ
ΩΩ
Ω
AC Termination, CL = 10pF
Fig. 3: CL = 30pF Circuit Fig. 4: CL = 50pF Circuit
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IDT74FCT807BT/CT
FAST CMOS 1-TO-10 CLOCK DRIVER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
tPLH1
OUTPUT 1
OUTPUT 2
tSK(o)
tPLH2
3V
0V
VOH
1.5V
1.5V
VOL
VOH
1.5V
VOL
INPUT tPHL1
tPHL2
tSK(o)
3V
0V
VOH
tPLH tPHL
VOL
1.5V
1.5V
tRtF
2.0V
0.8V
INPUT tPLH1
PACKAGE 1 OUTPUT
PACKAGE 2 OUTPUT
tSK(t)
tPLH2
3V
0V
VOH
1.5V
1.5V
VOL
VOH
1.5V
VOL
tPHL1
tPHL2
tSK(t)
CONTROL
INPUT
3V
1.5V
0V
3.5V
0V
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
CLOSED
SWITCH
OPEN 0.3V
0.3V
tPLZ
tPZL
tPZH tPHZ
3.5V
0V
1.5V
1.5V
ENABLE DISABLE
tSK(o) = |tPLH2 - tPLH1| or |tPH L2 - tPHL1|
tPLH tPHL
3V
0V
VOH
1.5V
1.5V
VOL
tSK(p) = |tPH L -
tPLH|
tSK(t) = |tPLH 2 - tPLH1| or |tPHL 2 - tPHL1|
INPUT
OUTPUT
INPUT
OUTPUT
VOL
VOH
TEST WAVEFORMS
Package Delay
Pulse Skew - tSK(P)
Enable and Disable Times
Output Skew - tSK(O)
Part-to-Part Skew - tSK(T)
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
NOTE:
1. Package 1 and Package 2 are same device type and speed grade.
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COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
IDT74FCT807BT/CT
FAST CMOS 1-TO-10 CLOCK DRIVER
ORDERING INFORMATION
CORPORATE HEADQUARTERS for SALES: for Tech Support:
2975 Stender Way 800-345-7015 or 408-727-6116 logichelp@idt.com
Santa Clara, CA 95054 fax: 408-492-8674 (408) 654-6459
www.idt.com
1-to-10 Clock Driver
IDT7 4FCT XXXX
Device Type X
Package
SO
PY
Q
807BT
807CT
Small Outl in e IC
Shrink Small Outline IC
Quarter-s iz e Small Outl ine IC
X
Temp. Ra nge
Blank
ICommercial (0 °C to +70°C)
Indust ri al (-4 0 °C to +8 5°C)
