August 2010
© 2001 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7NZ04 • Rev. 1.0.2
NC7NZ04 — TinyLogic
®
UHS Inverter
NC7NZ04
TinyLogic® UHS Inverter
Features
Ultra-High Speed: tPD 2.4ns (Typical) into 50pF at
5V VCC
High Output Drive: ±24mA at 3V VCC
Broad VCC Operating Range: 1.65V to 5.5V
Power-Down, High-Impedance Inputs / Outputs
Over-Voltage Tolerance Inputs Facilitate 5V to 3V
Translation
Proprietary Noise / EMI Reduction Circuitry
Space-Saving MicroPak™ and US8 Surface Mount
Packages
Description
The NC7NZ04 is a triple inverter from Fairchild’s Ultra-
High Speed (UHS) series of TinyLogic®. The device is
fabricated with advanced CMOS technology to achieve
ultra-high speed with high output drive while maintaining
low static power dissipation over a broad VCC operating
range. The device is specified to operate over the 1.65V
to 5.5V VCC operating range. The inputs and output are
high impedance when VCC is 0V. Inputs tolerate
voltages up to 7V, independent of VCC operating
voltage.
IEEC/IEC
Figure 1. Logic Symbol
Figure 2. Connection Diagram
Ordering Information
Part Number Top Mark Package Packing Method
NC7NZ04K8X NZ04 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide 3000 Units on
Tape & Reel
NC7NZ04L8X T3 8-Lead MicroPak™, 1.6mm W i de 5000 Units on
Tape & Reel
MicroPak™ is a trademarks of Fairchild Semiconductor Corporation.
© 2001 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7NZ04 • Rev. 1.0.2 2
NC7NZ04 — TinyLogic
®
UHS Inverter
Pin Configurations
Figure 3. US8
Notes:
1. AAA represents product code top mark (see ordering table).
2. Orientation of top mark determines pin one location. Reading the top product code mark left to right, pin one is
the lower left pin.
Figure 4. MicroPak™ (Top Through View)
Pin Definitions
Pin # US8 Pin # MicroPak™ Name Description
1 7 1A Input
2 6 3Y Output
3 5 2A Input
4 4 GND Ground
5 3 2Y Output
6 2 3A Input
7 1 1Y Output
8 8 VCC Supply Voltage
Function Table
Y= /A
Inputs Output
A Y
L H
H L
© 2001 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7NZ04 • Rev. 1.0.2 3
NC7NZ04 — TinyLogic
®
UHS Inverter
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device
reliability. The absolute maximum ratings are stress ratings only.
Symbol Parameter Min. Max. Unit
VCC Supply Voltage -0.5 7.0 V
VIN DC Input Voltage -0.5 7.0 V
VOUT DC Output Voltage -0.5 7.0 V
IIK DC Input Diode Current VIN < -0.5V -50 mA
VIN > 6.0V +20
IOK DC Output Diode Current VOUT < -0.5V -50 mA
VOUT > 6V, VCC=GND +20
IOUT DC Output Current ±50 mA
ICC or IGND DC VCC or Ground Current ±50 mA
TSTG Storage Temperature Range -65 +150 °C
TJ Junction Temperature Under Bias +150 °C
TL Junction Lead Temperature (Soldering, 10 Seconds) +260 °C
PD Power Dissipation at +85°C 250 mW
ESD Human Body Model, JEDEC:JESD22-A114 4000 V
Charge Device Model, JEDEC:JESD22-C101 2000
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol Parameter Conditions Min. Max. Unit
VCC Supply Voltage Operating 1.65 5.50 V
Supply Voltage Data Retention 1.5 5.5
VIN Input Voltage 0 5.5 V
VOUT Output Voltage 0 VCC V
TA Operating Temperature -40 +85 °C
tr, tf Input Rise and Fall Times VCC at 1.8V, 2.5V ± 0.2V 0 20 ns/V
VCC at 3.3V ± 0.3V 0 10
VCC at 5.0V ± 0.5V 0 5
θJA Thermal Resistance US8 250
°C/W
MicroPak™ 287
Note:
3. Unused inputs must be held HIGH or LOW. They may not float.
© 2001 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7NZ04 • Rev. 1.0.2 4
NC7NZ04 — TinyLogic
®
UHS Inverter
DC Electrical Characteristics
Symbol Parameter VCC Conditions TA=25°C TA=-40 to 85°C Units
Min. Typ. Max. Min. Max.
VIH HIGH Level I nput
Voltage 1.80 ± 0.15 0.75VCC
0.75VCC V
2.30 to 5.50 0.70VCC 0.70VCC
VIL LOW Level I nput
Voltage 1.80 ± 0.15 0.25VCC 0.25VCC V
2.30 to 5.50 0.30VCC 0.30VCC
VOH HIGH Level
Output Vol t age
1.65
VIN=VIL, IOH=-100µA
1.55 1.65 1.55
V
2.30 2.20 2.30 2.20
3.00 2.90 3.00 2.90
4.50 4.40 4.50 4.40
1.65 IOH=-4mA 1.29 1.52 1.29
2.30 IOH=-8mA 1.90 2.15 1.90
3.00 IOH=-16mA 2.40 2.80 2.40
3.00 IOH=-24mA 2.30 2.68 2.30
4.50 IOH=-32mA 3.80 4.20 3.80
VOL LOW Level
Output Vol t age
1.65
VIN=VIH, IOL=100µA
0.00 0.10 0.10
V
2.30 0.00 0.10 0.10
3.00 0.00 0.10 0.10
4.50 0.00 0.10 0.10
1.65 IOL=4mA 0.80 0.24 0.24
2.30 IOL=8mA 0.10 0.30 0.30
3.00 IOL=16mA 0.15 0.40 0.40
3.00 IOL=24mA 0.22 0.55 0.55
4.50 IOL=32mA 0.22 0.55 0.55
IIN Input Leakage
Current 0 to 5.5 0 ≤ VIN ≤ 5.5V ±1 ±1 µA
IOFF Power-Off
Leakage Current 0 VIN or VOUT=5.5V 1 10 µA
ICC Quiescent Supply
Current 1.65 to 5.50 VIN=5.5V , GND 1 10 µ A
© 2001 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7NZ04 • Rev. 1.0.2 5
NC7NZ04 — TinyLogic
®
UHS Inverter
AC Electrical Characteristics
Symbol Parameter VCC Conditions TA=25°C TA=-40 to 85°C Units Figure
Min. Typ. Max. Min. Max.
tPLH, tPHL Propagation Delay
1.80 ± 0.15
CL=15pF,
RL=1MΩ
1.8 4.4 9.5 2.0 10.0
ns Figure 5
Figure 6
2.50 ± 0.20 0.8 2.9 5.1 0.8 5.6
3.30 ± 0.30 0.5 2.1 3.4 0.5 3.8
5.00 ± 0.50 0.5 1.8 2.8 0.5 3.1
3.30 ± 0.30 CL=50pF,
RL=500Ω 1.2 2.9 4.5 1.2 5.0
5.00 ± 0.50 0.8 2.4 3.6 0.8 4.0
CIN Input Capacitance 0 2.5 pF
CPD Power Dissipati on
Capacitance(4) 3.30 9 pF Figure 7
5.00 11
Note:
4. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating
current consumption (ICCD) at no output lading and operating at 50% duty cycle. CPD is related to ICCD dynamic
operating current by the expression: ICCD=(CPD)(VCC)(fIN)+(ICCstatic).
Dynamic Switching Characteristics
Symbol Parameter Conditions VCC TA=25°c Unit
Typ.
VOLP Quiet Output Dynamic Peak VOL CL=50pF, VIH=5.0V, VIL=0V 5.0 0.8 V
VOLV Quiet Output Dynamic Valley VOL 5.0 -0.8 V
Note:
5. CL includes load and stray capacitance; inputs
PRR=1.0MHz, tW=500ns.
Figure 5. AC Test Circuit Figure 6. AC Waveforms
Note:
6. Input=AC Waveform; t
r
=t
f
=1.8ns; PRR=10MHz; Duty Cycle =50%.
Figure 7. ICCD Test Circuit
© 2001 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7NZ04 • Rev. 1.0.2 6
NC7NZ04 — TinyLogic
®
UHS Inverter
Physical Dimensions
SIDE VIEW
TOP VIE W RECOMMENDED LAND PATTERN
A
B
0.50
SEATING PLANE
0.10-0.18
0.13 AB C
0.50
DETAIL A
0.4 TYP
ALL LEAD TIPS
0.2 C B A
PIN 1 IDENT
ALL LEAD TIPS
0.1 C
8
14
5(8X) 0.70
2.70 3.40
1.00
DETAIL A
1.80
GAGE PLANE
0.12
C. DIMENSIONS ARE EXCLUSIVE OF BURRS,
D. DIMENSIONS AND TOLERANCES PER
MOLD FLASH, AND TIE BAR EXTRUSIONS.
B. DIMENSIONS ARE IN MILLIMETERS.
A. CONFORMS TO JEDEC REGISTRATION MO-187
ANSI Y14.5M, 1994.
2.10
1.90
2.40
2.20
0.15
3.20
3.00
1.55
0.90 MA X 0.10
0.00
0.80
0.60
0.17-0.27 (8X)
0.30 (8X )
0.20-0.35
0°-8°
C
SEATING
PLANE
E. FILE DRAWING NAME : MKT-MAB08Arev4
Figure 8. 8-Lead US8, JEDEC MO-187, Variation CA, 3.1mm Wide
Pack age drawings are provided as a service to customers consideri ng Fai rchild components . Drawings may c hange i n any manner
without notice. P l ease note the revi sion and/or date on t he drawing and contac t a Fairchild S emiconductor represent ative to v er ify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically
the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’ s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
Tape and Reel Specificat i on
Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications:
http://www.fairchildsemi.com/packaging/US8_Pack_TNR.pdf
Package Designator Tape Section Cavity Number Cavity Status Cover Type Status
K8X Leader (Start End) 125 (Typical) Empty Sealed
Carrier 3000 Filled Sealed
Trailer (Hub End) 75 (Typical) Empty Sealed
© 2001 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7NZ04 • Rev. 1.0.2 7
NC7NZ04 — TinyLogic
®
UHS Inverter
Physical Dimensions
(0.09)
(0.1)
(0.2)
1.6
2X
0.05
0.00
1.6
2X
C0.05 C
4
3. DRAWING CONFORMS TO ASME Y.14M-1994
2. DIME NSIONS ARE IN MILL IMETERS
1. PACKAGE CONFORM S TO JEDEC MO-255 VAR IATION UAAD
BOTT OM VIEW
4. PIN 1 FLAG, EN D OF PACKAGE OFFSET
MAC08AREV4
123
567
8
Notes:
8X 0.25
0.35
3X
8X 1.0
4
0.5
8X
0.25
0.15 0.10 CAB
0.05 C
0.10 C
TOP VIEW
IND EX AREA
B
Recommended Landpattern
A
0.10 C
0.55 MAX
0.05 C
DETAIL A 0.35
0.25
(0.15)
(0.20)
0.35
0.25
DETAIL A
PIN #1 T E RMINAL
SCALE: 2X
5. DRAW ING FILE NAME: MKT-MAC 08A RE V4
Figure 9. 8-Lead, MicroPak™, 1.0mm Wide
Pack age drawings are provided as a service to customers consideri ng Fai rchild components . Drawings may c hange i n any manner
without notice. P l ease note the revi sion and/or date on t he drawing and contac t a Fairchild S emiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically
the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’ s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
Tape and Reel Specificat i on
Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications:
http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf
Package Designator Tape Section Cavity Number Cavity Status Cover Type Status
L8X Leader (Start End) 125 (Typical) Empty Sealed
Carrier 3000 Filled Sealed
Trailer (Hub End) 75 (Typical) Empty Sealed
© 2001 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7NZ04 • Rev. 1.0.2 8
NC7NZ04 — TinyLogic
®
UHS Inverter
