Digital Delay Units series DDU-7J = 10 Taps (14 pins DIP) TL interfaced (Commercial Type) Features: = Completely interfaced for TTL and DTL application = No external components required = P.C. board space economy achieved Fits standard 14 pins DIP socket Test Conditions: B Operates over commercial temperature a Input Pulse Width: =150% of total delay. range m= Time delay measured @ 1.5 V on rising edge. eee a Unless otherwise specified all time-delays are Specifications: referenced to input of delay line. @ No. Taps: 10 equally spaced taps # Rise-time is measured from .75 V to 2.4 V of = Total Delay Tolerance: +5% or better, or leading edge. 2 NS whichever is greater m All measurements made @ V cc =5V; Ta = +25C. @ Rise-time: 4 NS typically = Temperature coefficient: 100 PPM/C = Temperature range: 0 to + 70C = Supply voltage: 4.5 to 5.5 Vdc. = Logic 1 input current: 100 wa max. # Logic 0 input current: -4 ma. max. @ Logic 1 V out: 2.5 V min. Logic 0) V out: 0.5 V max. = Logic 1 Fan-out: 20/tap max. @ Logic ( Fan-out: 10/tap max. = Power Dissipation: 740 MW max. Part No. *DDU-7J-10 *DDU-7J-20 *DDU-7J-25 *DDU-7J-50 DDU-7J-100 DDU-7J-150 DDU-7J-200 DDU-7J-250 DDU-7J-300 DDU-7J-400 DDU-7J-500 ale Time delay referenced to 1st tap. Two (2) gates in parallel for input buffer. DATA DELAY DEVICES Inc. = 385 Lakeview Avenue, Clifton, New Jersey 07011 = (201) 772-1106 # TWX 710-989-7008 8