LM833-N
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SNOSBD8E –MAY 2004–REVISED MAY 2012
LM833-N Dual Audio Operational Amplifier
Check for Samples: LM833-N
1FEATURES DESCRIPTION
The LM833-N is a dual general purpose operational
2• Wide Dynamic Range: >140dB amplifier designed with particular emphasis on
• Low Input Noise Voltage: 4.5nV/√Hz performance in audio systems.
• High Slew Rate: 7 V/μs (typ); 5V/μs (Min) This dual amplifier IC utilizes new circuit and
• High Gain Bandwidth: 15MHz (typ); 10MHz processing techniques to deliver low noise, high
(Min) speed and wide bandwidth without increasing
external components or decreasing stability. The
• Wide Power Bandwidth: 120KHz LM833-N is internally compensated for all closed loop
• Low Distortion: 0.002% gains and is therefore optimized for all preamp and
• Low Offset Voltage: 0.3mV high level stages in PCM and HiFi systems.
• Large Phase Margin: 60° The LM833-N is pin-for-pin compatible with industry
• Available in 8 Pin VSSOP Package standard dual operational amplifiers.
Schematic Diagram
(1/2 LM833-N)
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2004–2012, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
LM833-N
SNOSBD8E –MAY 2004–REVISED MAY 2012
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Connection Diagram
Figure 1. See Package Number D0008A, P0008E or DGK0008A
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS(1)(2)
Supply Voltage VCC–VEE 36V
Differential Input Voltage(3) VI±30V
Input Voltage Range(3) VIC ±15V
Power Dissipation(4) PD500 mW
Operating Temperature Range TOPR −40 ∼85°C
Storage Temperature Range TSTG −60 ∼150°C
Soldering Information PDIP Package Soldering (10 seconds) 260°C
Small Outline Package (SOIC and VSSOP) Vapor Phase (60 seconds) 215°C
Infrared (15 seconds) 220°C
ESD tolerance (5) 1600V
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(3) If supply voltage is less than ±15V, it is equal to supply voltage.
(4) This is the permissible value at TA≤85°C.
(5) Human body model, 1.5 kΩin series with 100 pF.
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DC ELECTRICAL CHARACTERISTICS(1)(2)
(TA= 25°C, VS= ±15V)
Symbol Parameter Conditions Min Typ Max Units
VOS Input Offset Voltage RS= 10Ω0.3 5 mV
IOS Input Offset Current 10 200 nA
IBInput Bias Current 500 1000 nA
AVVoltage Gain RL= 2 kΩ, VO= ±10V 90 110 dB
RL= 10 kΩ±12 ±13.5 V
VOM Output Voltage Swing RL= 2 kΩ±12 ±13.4 V
VCM Input Common-Mode Range ±12 ±14.0 V
CMRR Common-Mode Rejection Ratio VIN = ±12V 80 100 dB
PSRR Power Supply Rejection Ratio VS= 15 ∼5V, −15 ∼−5V 80 100 dB
IQSupply Current VO= 0V, Both Amps 5 8 mA
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(2) All voltages are measured with respect to the ground pin, unless otherwise specified.
AC ELECTRICAL CHARACTERISTICS
(TA= 25°C, VS= ±15V, RL= 2 kΩ)
Symbol Parameter Conditions Min Typ Max Units
SR Slew Rate RL= 2 kΩ5 7 V/μs
GBW Gain Bandwidth Product f = 100 kHz 10 15 MHz
Equivalent Input Noise Voltage
VNI RIAA, RS= 2.2 kΩ(1) 1.4 μV
(LM833AM, LM833AMX)
(1) RIAA Noise Voltage Measurement Circuit
DESIGN ELECTRICAL CHARACTERISTICS
(TA= 25°C, VS= ±15V)
The following parameters are not tested or ensured.
Symbol Parameter Conditions Typ Units
ΔVOS/ΔT Average Temperature Coefficient 2 μV/°C
of Input Offset Voltage
THD Distortion RL= 2 kΩ, f = 20∼20 kHz 0.002 %
VOUT = 3 Vrms, AV= 1
enInput Referred Noise Voltage RS= 100Ω, f = 1 kHz 4.5 nV / √Hz
inInput Referred Noise Current f = 1 kHz 0.7 pA / √Hz
PBW Power Bandwidth VO= 27 Vpp, RL= 2 kΩ, THD ≤1% 120 kHz
fUUnity Gain Frequency Open Loop 9 MHz
φMPhase Margin Open Loop 60 deg
Input Referred Cross Talk f = 20∼20 kHz −120 dB
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TYPICAL PERFORMANCE CHARACTERISTICS
Maximum Power Input Bias Current vs
Dissipation Ambient Temperature
vs Ambient Temperature
Figure 2. Figure 3.
Input Bias Current vs
Supply Voltage Supply Current vs
Supply Voltage
Figure 4. Figure 5.
DC Voltage Gain DC Voltage Gain
vs Ambient Temperature vs Supply Voltage
Figure 6. Figure 7.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Voltage Gain & Phase Gain Bandwidth Product
vs Frequency vs Ambient Temperature
Figure 8. Figure 9.
Gain Bandwidth Slew Rate vs
vs Supply Voltage Ambient Temperature
Figure 10. Figure 11.
Slew Rate vs Power Bandwidth
Supply Voltage
Figure 12. Figure 13.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
CMR vs Frequency Distortion vs Frequency
Figure 14. Figure 15.
Maximum
Output Voltage vs
PSRR vs Frequency Supply Voltage
Figure 16. Figure 17.
Maximum
Output Voltage vs Spot Noise Voltage
Ambient Temperature vs Frequency
Figure 18. Figure 19.
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Spot Noise Current Input Referred Noise Voltage
vs Frequency vs Source Resistance
Figure 20. Figure 21.
Noninverting Amp Noninverting Amp
Figure 22. Figure 23.
Inverting Amp
Figure 24.
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SNOSBD8E –MAY 2004–REVISED MAY 2012
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APPLICATION HINTS
The LM833-N is a high speed op amp with excellent phase margin and stability. Capacitive loads up to 50 pF will
cause little change in the phase characteristics of the amplifiers and are therefore allowable.
Capacitive loads greater than 50 pF must be isolated from the output. The most straightforward way to do this is
to put a resistor in series with the output. This resistor will also prevent excess power dissipation if the output is
accidentally shorted.
Noise Measurement Circuit
Complete shielding is required to prevent induced pick up from external sources. Always check with oscilloscope for
power line noise.
Figure 25. Total Gain: 115 dB @f = 1 kHz
Input Referred Noise Voltage: en= V0/560,000 (V)
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SNOSBD8E –MAY 2004–REVISED MAY 2012
RIAA Noise Voltage Measurement Circuit
RIAA Preamp Voltage Gain, RIAA Flat Amp Voltage Gain vs
Deviation vs Frequency Frequency
Figure 26. Figure 27.
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Typical Applications
AV= 34.5
F = 1 kHz
En= 0.38 μV
A Weighted
Figure 28. NAB Preamp
Figure 29. NAB Preamp Voltage Gain vs Frequency
VO= V1–V2
Figure 30. Balanced to Single Ended Converter
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VO= V1 + V2 −V3 −V4
Figure 31. Adder/Subtracter
Figure 32. Sine Wave Oscillator
Illustration is f0= 1 kHz
Figure 33. Second Order High Pass Filter (Butterworth)
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Illustration is f0= 1 kHz
Figure 34. Second Order Low Pass Filter (Butterworth)
Illustration is f0= 1 kHz, Q = 10, ABP = 1
Figure 35. State Variable Filter
Figure 36. AC/DC Converter
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Illustration is:
fL= 32 Hz, fLB = 320 Hz
fH=11 kHz, fHB = 1.1 kHz
Figure 39. Tone Control
Av= 35 dB
En= 0.33 μV
S/N = 90 dB
f = 1 kHz
A Weighted
A Weighted, VIN = 10 mV
@f = 1 kHz
Figure 40. RIAA Preamp
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Figure 42. 10 Band Graphic Equalizer
fo (Hz) C1C2R1R2
32 0.12μF 4.7μF 75kΩ500Ω
64 0.056μF 3.3μF 68kΩ510Ω
125 0.033μF 1.5μF 62kΩ510Ω
250 0.015μF 0.82μF 68kΩ470Ω
500 8200pF 0.39μF 62kΩ470Ω
1k 3900pF 0.22μF 68kΩ470Ω
2k 2000pF 0.1μF 68kΩ470Ω
4k 1100pF 0.056μF 62kΩ470Ω
8k 510pF 0.022μF 68kΩ510Ω
16k 330pF 0.012μF 51kΩ510Ω
Note: At volume of change = ±12
dB Q = 1.
LM833-N MDC MWC DUAL AUDIO OPERATIONAL AMPLIFIER
Figure 43. Die Layout (A - Step)
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PACKAGE OPTION ADDENDUM
www.ti.com 11-Jan-2021
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM833M ACTIVE SOIC D 8 95 Non-RoHS
& Green Call TI Call TI -40 to 85 LM833
M
LM833M/NOPB ACTIVE SOIC D 8 95 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 LM833
M
LM833MM/NOPB ACTIVE VSSOP DGK 8 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 Z83
LM833MMX/NOPB ACTIVE VSSOP DGK 8 3500 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 Z83
LM833MX/NOPB ACTIVE SOIC D 8 2500 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 LM833
M
LM833N/NOPB ACTIVE PDIP P 8 40 RoHS & Green Call TI | SN Level-1-NA-UNLIM -40 to 85 LM
833N
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
PACKAGE OPTION ADDENDUM
www.ti.com 11-Jan-2021
Addendum-Page 2
(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LM833MM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
LM833MMX/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
LM833MX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 1-Oct-2016
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM833MM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0
LM833MMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0
LM833MX/NOPB SOIC D 8 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 1-Oct-2016
Pack Materials-Page 2
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PACKAGE OUTLINE
C
.228-.244 TYP
[5.80-6.19]
.069 MAX
[1.75]
6X .050
[1.27]
8X .012-.020
[0.31-0.51]
2X
.150
[3.81]
.005-.010 TYP
[0.13-0.25]
0 - 8 .004-.010
[0.11-0.25]
.010
[0.25]
.016-.050
[0.41-1.27]
4X (0 -15 )
A
.189-.197
[4.81-5.00]
NOTE 3
B .150-.157
[3.81-3.98]
NOTE 4
4X (0 -15 )
(.041)
[1.04]
SOIC - 1.75 mm max heightD0008A
SMALL OUTLINE INTEGRATED CIRCUIT
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
18
.010 [0.25] C A B
5
4
PIN 1 ID AREA
SEATING PLANE
.004 [0.1] C
SEE DETAIL A
DETAIL A
TYPICAL
SCALE 2.800
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EXAMPLE BOARD LAYOUT
.0028 MAX
[0.07]
ALL AROUND
.0028 MIN
[0.07]
ALL AROUND
(.213)
[5.4]
6X (.050 )
[1.27]
8X (.061 )
[1.55]
8X (.024)
[0.6]
(R.002 ) TYP
[0.05]
SOIC - 1.75 mm max heightD0008A
SMALL OUTLINE INTEGRATED CIRCUIT
4214825/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
METAL SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
EXPOSED
METAL
OPENING
SOLDER MASK METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
EXPOSED
METAL
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:8X
SYMM
1
45
8
SEE
DETAILS
SYMM
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EXAMPLE STENCIL DESIGN
8X (.061 )
[1.55]
8X (.024)
[0.6]
6X (.050 )
[1.27] (.213)
[5.4]
(R.002 ) TYP
[0.05]
SOIC - 1.75 mm max heightD0008A
SMALL OUTLINE INTEGRATED CIRCUIT
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
SOLDER PASTE EXAMPLE
BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
SYMM
SYMM
1
45
8
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