DM74LS161A/DM74LS163A
Synchronous 4-Bit Binary Counters
General Description
These synchronous, presettable counters feature an internal
carry look-ahead for application in high-speed counting de-
signs. The LS161A and LS163A are 4-bit binary counters.
The carry output is decoded by means of a NOR gate, thus
preventing spikes during the normal counting mode of op-
eration. Synchronous operation is provided by having all
flip-flops clocked simultaneously so that the outputs change
coincident with each other when so instructed by the
count-enable inputs and internal gating. This mode of opera-
tion eliminates the output counting spikes which are normally
associated with asynchronous (ripple clock) counters.Abuff-
ered clock input triggers the four flip-flops on the rising
(positive-going) edge of the clock input waveform.
These counters are fully programmable; that is, the outputs
may be preset to either level. As presetting is synchronous,
setting up a low level at the load input disables the counter
and causes the outputs to agree with the setup data after the
next clock pulse, regardless of the levels of the enable input.
The clear function for the LS161A is asynchronous; and a
low level at the clear input sets all four of the flip-flop outputs
low, regardless of the levels of clock, load, or enable inputs.
The clear function for the LS163A is synchronous; and a low
level at the clear inputs sets all four of the flip-flop outputs
low after the next clock pulse, regardless of the levels of the
enable inputs. This synchronous clear allows the count
length to be modified easily, as decoding the maximum
count desired can be accomplished with one external NAND
gate. The gate output is connected to the clear input to syn-
chronously clear the counter to all low outputs.
The carry look-ahead circuitry provides for cascading
counters for n-bit synchronous applications without addi-
tional gating. Instrumental in accomplishing this function are
two count-enable inputs and a ripple carry output.
Both count-enable inputs (P and T) must be high to count,
and input T is fed forward to enable the ripple carry output.
The ripple carry output thus enabled will produce a high-level
output pulse with a duration approximately equal to the
high-level portion of the Q
A
output. This high-level overflow
ripple carry pulse can be used to enable successive cas-
caded stages. High-to-low level transitions at the enable P or
T inputs may occur, regardless of the logic level of the clock.
These counters feature a fully independent clock circuit.
Changes made to control inputs (enable P or T or load) that
will modify the operating mode have no effect until clocking
occurs. The function of the counter (whether enabled, dis-
abled, loading, or counting) will be dictated solely by the con-
ditions meeting the stable set-up and hold times.
Features
nSynchronously programmable
nInternal look-ahead for fast counting
nCarry output for n-bit cascading
nSynchronous counting
nLoad control line
nDiode-clamped inputs
nTypical propagation time, clock to Q output 14 ns
nTypical clock frequency 32 MHz
nTypical power dissipation 93 mW
Connection Diagram
Dual-In-Line Package
DS006397-1
Order Numbers 54LS161ADMQB, 54LS161AFMQB, 54LS161ALMQB, 54LS163ADMQB, 54LS163AFMQB,
54LS163ALMQB, DM54LS161AJ, DM54LS161AW, DM54LS163AJ, DM54LS163AW, DM74LS161AM, DM74LS161AN,
DM74LS163AM or DM74LS163AN
See Package Number E20A, J16A, M16A, N16E or W16A
March 1998
DM74LS161A/DM74LS163A Synchronous 4-Bit Binary Counters
© 1998 Fairchild Semiconductor Corporation DS006397 www.fairchildsemi.com
Absolute Maximum Ratings (Note 1)
Supply Voltage 7V
Input Voltage 7V
Operating Free Air Temperature Range
DM54LS and 54LS −55˚C to +125˚C
DM74LS 0˚C to +70˚C
Storage Temperature Range −65˚C to +150˚C
Recommended Operating Conditions
Symbol Parameter DM54LS161A DM74LS161A Units
Min Nom Max Min Nom Max
V
CC
Supply Voltage 4.5 5 5.5 4.75 5 5.25 V
V
IH
High Level Input Voltage 2 2 V
V
IL
Low Level Input Voltage 0.7 0.8 V
I
OH
High Level Output Current −0.4 −0.4 mA
I
OL
Low Level Output Current 4 8 mA
f
CLK
Clock Frequency (Note 2) 0 25 0 25 MHz
Clock Frequency (Note 3) 0 20 0 20 MHz
t
W
Pulse Width Clock 20 6 20 6 ns
(Note 2) Clear 20 9 20 9
Pulse Width Clock 25 25 ns
(Note 3) Clear 25 25
t
SU
Setup Time Data 20 8 20 8
(Note 2) Enable P 25 17 25 17 ns
Load 25 15 25 15
Setup Time Data 20 20
(Note 3) Enable P 30 30 ns
Load 30 30
t
H
Hold Time Data 0 −3 0 −3 ns
(Note 2) Others 0 −3 0 −3
Hold Time Data 5 5 ns
(Note 3) Others 5 5
t
REL
Clear Release Time (Note 2) 20 20 ns
Clear Release Time (Note 3) 25 25 ns
T
A
Free Air Operating Temperature −55 125 0 70 ˚C
Note 1:
The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these
limits. The parametric values defined in the “Electrical Characteristics” table are not guaranteed at the absolute maximum ratings. The “Recommended Operating
Conditions” table will define the conditions for actual device operation.
Note 2: CL=15 pF, RL=2kΩ,T
A=25˚C and VCC =5.5V.
Note 3: CL=50 pF, RL=2kΩ,T
A=25˚C and VCC =5.5V.
’LS161 Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units
(Note 4)
V
I
Input Clamp Voltage V
CC
=Min, I
I
=−18 mA −1.5 V
V
OH
High Level Output V
CC
=Min, I
OH
=Max DM54 2.5 3.4 V
Voltage V
IL
=Max, V
IH
=Min DM74 2.7 3.4
V
OL
Low Level Output V
CC
=Min, I
OL
=Max DM54 0.25 0.4
Voltage V
IL
=Max, V
IH
=Min DM74 0.35 0.5 V
I
OL
=4 mA, V
CC
=Min DM74 0.25 0.4
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’LS161 Electrical Characteristics (Continued)
over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units
(Note 4)
I
I
Input Current @Max V
CC
=Max Enable T 0.2
Input Voltage V
I
=7V Clock 0.2 mA
Load 0.2
Others 0.1
I
IH
High Level Input V
CC
=Max Enable T 40
Current V
I
=2.7V Clock 40 µA
Load 40
Others 20
I
IL
Low Level Input V
CC
=Max Enable T −0.8
Current V
I
=0.4V Clock −0.8 mA
Load −0.8
Others −0.4
I
OS
Short Circuit V
CC
=Max DM54 −20 −100 mA
Output Current (Note 5) DM74 −20 −100
I
CCH
Supply Current with V
CC
=Max 18 31 mA
Outputs High (Note 6)
I
CCL
Supply Current with V
CC
=Max 19 32 mA
Outputs Low (Note 7)
Note 4: All typicals are at VCC =5V, TA=25˚C.
Note 5: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 6: ICCH is measured with the load high, then again with the load low, with all other inputs high and all outputs open.
Note 7: ICCL is measured with the clock input high, then again with the clock input low, with all other inputs low and all outputs open.
’LS161 Switching Characteristics
at V
CC
=5V and T
A
=25˚C
From (Input) R
L
=2kΩ
Symbol Parameter To (Output) C
L
=15 pF C
L
=50 pF Units
Min Max Min Max
f
MAX
Maximum Clock Frequency 25 20 MHz
t
PLH
Propagation Delay Time Clock to 25 30 ns
Low to High Level Output Ripple Carry
t
PHL
Propagation Delay Time Clock to 30 38 ns
High to Low Level Output Ripple Carry
t
PLH
Propagation Delay Time Clock to Any Q 22 27 ns
Low to High Level Output (Load High)
t
PHL
Propagation Delay Time Clock to Any Q 27 38 ns
High to Low Level Output (Load High)
t
PLH
Propagation Delay Time Clock to Any Q 24 30 ns
Low to High Level Output (Load Low)
t
PHL
Propagation Delay Time Clock to Any Q 27 38 ns
High to Low Level Output (Load Low)
t
PLH
Propagation Delay Time Enable T to 14 27 ns
Low to High Level Output Ripple Carry
t
PHL
Propagation Delay Time Enable T to 15 27 ns
High to Low Level Output Ripple Carry
t
PHL
Propagation Delay Time Clear to 28 45 ns
High to Low Level Output Any Q
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Recommended Operating Conditions
Symbol Parameter DM54LS163A DM74LS163A Units
Min Nom Max Min Nom Max
V
CC
Supply Voltage 4.5 5 5.5 4.75 5 5.25 V
V
IH
High Level Input Voltage 2 2 V
V
IL
Low Level Input Voltage 0.7 0.8 V
I
OH
High Level Output Current −0.4 −0.4 mA
I
OL
Low Level Output Current 4 8 mA
f
CLK
Clock Frequency (Note 8) 0 25 0 25 MHz
Clock Frequency (Note 9) 0 20 0 20 MHz
t
W
Pulse Width Clock 20 6 20 6 ns
(Note 8) Clear 20 9 20 9
Pulse Width Clock 25 25 ns
(Note 9) Clear 25 25
t
SU
Setup Time Data 20 8 20 8
(Note 8) Enable P 25 17 25 17 ns
Load 25 15 25 15
Setup Time Data 20 20
(Note 9) Enable P 30 30 ns
Load 30 30
t
H
Hold Time Data 0 −3 0 −3 ns
(Note 8) Others 0 −3 0 −3
Hold Time Data 5 5 ns
(Note 9) Others 5 5
t
REL
Clear Release Time (Note 8) 20 20 ns
Clear Release Time (Note 9) 25 25 ns
T
A
Free Air Operating Temperature −55 125 0 70 ˚C
Note 8: CL=15 pF, RL=2kΩ,T
A=25˚C and VCC =5V.
Note 9: CL=50 pF, RL=2kΩ,T
A=25˚C and VCC =5V.
’LS163 Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units
(Note 10)
V
I
Input Clamp Voltage V
CC
=Min, I
I
=−18 mA −1.5 V
V
OH
High Level Output V
CC
=Min, I
OH
=Max DM54 2.5 3.4 V
Voltage V
IL
=Max, V
IH
=Min DM74 2.7 3.4
V
OL
Low Level Output V
CC
=Min, I
OL
=Max DM54 0.25 0.4
Voltage V
IL
=Max, V
IH
=Min DM74 0.35 0.5 V
I
OL
=4 mA, V
CC
=Min DM74 0.25 0.4
I
I
Input Current @Max V
CC
=Max Enable T 0.2
Input Voltage V
I
=7V Clock, Clear 0.2 mA
Load 0.2
Others 0.1
I
IH
High Level Input V
CC
=Max Enable T 40
Current V
I
=2.7V Load 40 µA
Clock, Clear 40
Others 20
www.fairchildsemi.com 4
’LS163 Electrical Characteristics (Continued)
over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units
(Note 10)
I
IL
Low Level Input V
CC
=Max Enable T −0.8
Current V
I
=0.4V Clock, Clear −0.8 mA
Load −0.8
Others −0.4
I
OS
Short Circuit V
CC
=Max DM54 −20 −100 mA
Output Current (Note 11) DM74 −20 −100
I
CCH
Supply Current with V
CC
=Max 18 31 mA
Outputs High (Note 12)
I
CCL
Supply Current with V
CC
=Max 18 32 mA
Outputs Low (Note 13)
Note 10: All typicals are at VCC =5V, TA=25˚C.
Note 11: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 12: ICCH is measured with the load high, then again with the load low, with all other inputs high and all outputs open.
Note 13: ICCL is measured with the clock input high, then again with the clock input low, with all other inputs low and all outputs open.
’LS163 Switching Characteristics
at V
CC
=5V and T
A
=25˚C
From (Input) R
L
=2kΩ
Symbol Parameter To (Output) C
L
=15 pF C
L
=50 pF Units
Min Max Min Max
f
MAX
Maximum Clock Frequency 25 20 MHz
t
PLH
Propagation Delay Time Clock to 25 30 ns
Low to High Level Output Ripple Carry
t
PHL
Propagation Delay Time Clock to 30 38 ns
High to Low Level Output Ripple Carry
t
PLH
Propagation Delay Time Clock to Any Q 22 27 ns
Low to High Level Output (Load High)
t
PHL
Propagation Delay Time Clock to Any Q 27 38 ns
High to Low Level Output (Load High)
t
PLH
Propagation Delay Time Clock to Any Q 24 30 ns
Low to High Level Output (Load Low)
t
PHL
Propagation Delay Time Clock to Any Q 27 38 ns
High to Low Level Output (Load Low)
t
PLH
Propagation Delay Time Enable T to 14 27 ns
Low to High Level Output Ripple Carry
t
PHL
Propagation Delay Time Enable T to 15 27 ns
High to Low Level Output Ripple Carry
t
PHL
Propagation Delay Time Clear to Any Q 28 45 ns
High to Low Level Output (Note 14)
Note 14: The propagation delay clear to output is measured from the clock input transition.
5 www.fairchildsemi.com
Logic Diagram
LS163A
DS006397-2
The LS161A is similar, however, the clear buffer is connected directly to the flip flops.
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Parameter Measurement Information
Switching Time Waveforms
DS006397-3
Note 15: The input pulses are supplied by generators having the following characteristics: PRR ≤1 MHz, duty cycle ≤50%,Z
OUT ≈50Ω,t
r≤10 ns, tf≤10 ns. Vary
PRR to measure fMAX.
Note 16: Outputs QDand carry are tested at tn+16 where tnis the bit time when all outputs are low.
Note 17: VREF =1.5V.
Switching Time Waveforms
DS006397-4
Note 18: The input pulses are supplied by generators having the following characteristics: PRR ≤1 MHz, duty cycle ≤50%,Z
OUT ≈50Ω,t
r≤6 ns, tf≤6 ns. Vary
PRR to measure fMAX.
Note 19: Enable P and enable T setup times are measured at tn+0.
Note 20: VREF =1.3V.
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Timing Diagram
LS161A, LS163A Synchronous Binary Counters
Typical Clear, Preset, Count and Inhibit Sequences
DS006397-5
Sequence:
(1) Clear outputs to zero
(2) Preset to binary twelve
(3) Count to thirteen, fourteen, fifteen, zero, one, and two
(4) Inhibit
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9
Physical Dimensions inches (millimeters) unless otherwise noted
Ceramic Leadless Chip Carrier Package (E)
Order Numbers 54LS161ALMQB or 54LS163ALMQB
Package Number E20A
16-Lead Ceramic Dual-In-Line Package (J)
Order Numbers 54LS161ADMQB, 54LS163ADMQB, DM54LS161AJ or DM54LS163AJ
Package Number J16A
www.fairchildsemi.com 10
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Small Outline Molded Package (M)
Order Number DM74LS161AM or DM74LS163AM
Package Number M16A
16-Lead Molded Dual-In-Line Package (N)
Order Numbers DM74LS161AN, DM74LS163AN
Package Number N16E
11 www.fairchildsemi.com
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE-
VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMI-
CONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or sys-
tems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, and (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
Fairchild Semiconductor
Corporation
Americas
Customer Response Center
Tel: 1-888-522-5372
www.fairchildsemi.com
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Europe Fax: +49 (0) 1 80-530 85 86
Email: europe.support@nsc.com
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Tel: +852 2737-7200
Fax: +852 2314-0061
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Japan Ltd.
Tel: 81-3-5620-6175
Fax: 81-3-5620-6179
16-Lead Ceramic Flat Package (W)
Order Numbers 54LS161AFMQB, 54LS163AFMQB,
DM54LS161AN or DM54LS163AW
Package Number W16A
DM74LS161A/DM74LS163A Synchronous 4-Bit Binary Counters
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
