© February 2010 Altera Corporation Quartus II Software Version 9.1, SP1 Device Support Release Notes
RN-01051-1.0
© February 2010
Quartus II Software Version 9.1, SP1
Device Support Release Notes
This document provides late-breaking information about device support in this version of
the Altera® Quartus®II software. For information about disk space and system requirements,
refer to the readme.txt file in your altera/<version number>/quartus directory. For
information about New Features, EDA Tool version support, and existing and resolved
software issues, refer to the Quartus II Software Release Notes.
This document contains the following sections:
■“Device Support & Pin-Out Status” on page 1
■“Memory Requirements/Recommendations” on page 3
■“Timing and Power Models” on page 5
■“Changes in Device Support” on page 7
Device Support & Pin-Out Status
This section contains information about the status of support in the Quartus II software for
the devices listed.
Full Device Support
Full compilation, simulation, timing analysis, and programming support is now available for
the following new devices and device packages:
Advance Device Support
Compilation, simulation, and timing analysis support is provided for the following devices
that will be released in the near future. Although the Compiler generates pin-out
information for these devices, the Compiler does not generate programming files for them in
this release.
Devices with Full Support
Device Family Devices
Arria® II GX EP2AGX190 EP2AGX260
Stratix® IV EP4SGX290 EPS4GX530
EP4SGX360
Page 2 Device Support & Pin-Out Status
Quartus II Software Version 9.1, SP1 Device Support Release Notes © February 2010 Altera Corporation
Devices with Advance Support
Initial Information Device Support
Compilation, simulation, and timing analysis support is provided for the following
devices that will be released in the near future. Programming files and pin-out
information, however, are not generated for these devices in this release.
Device Family Devices
Cyclone® III LS EP3CLS70F484 EP3CLS70U484
EP3CLS70F780 EP3CLS100F484
EP3CLS100U484 EP3CLS100F780
Cyclone IV E EP4CE6F17 EP4CE30F23
EP4CE6E22 EP4CE30F29
EP4CE10F17 EP4CE40F23
EP4CE10E22 EP4CE40F29
EP4CE15F17 EP4CE55F23
EP4CE15F23 EP4CE55F29
EP4CE15E22 EP4CE75F23
EP4CE22F17 EP4CE75F29
EP4CE22E22 EP4CE115F23
EP4CE115F29
Cyclone IV GX EP4CGX15BF14 EP4CGX30CF19
EP4CGX15BN11 EP4CGX22BF14
EP4CGX30BF14 EP4CGX22CF19
Stratix IV EP4SE360H29 EP4SE360F35
EP4SE820H35 EP4SE820H40
EP4SE820F43 EP4SGX70HF35
EP4SGX110HF35 EP4SGX290KF43
EP4SGX290NF45 EP4SGX360KF43
EP4SGX360NF45 EP4SGX530KF43
EP4S100G3F45 EP4S100G4F45
EP4S40G5H40 EP4S100G5F45
EP4S100G5H40
Devices with Initial Information Support
Device Family Devices
Cyclone IV GX EP4CGX30CF23 EP4CGX150CF23
EP4CGX75CF23 EP4CGX150DF27
EP4CGX75DF27 EP4CGX150DF31
EP4CGX50CF23 EP4CGX110CF23
EP4CGX50DF27 EP4CGX110DF27
EP4CGX110DF31
Memory Requirements/Recommendations Page 3
© February 2010 Altera Corporation Quartus II Software Version 9.1, SP1 Device Support Release Notes
Compilation Support
Compilation support with preliminary timing and power analysis support is
provided for the following HardCopy® III, HardCopy IV E, and HardCopy IV GX
devices.
Memory Requirements/Recommendations
A full installation of the Altera Complete Design Suite requires approximately 8.2 GB
of available disk space on the drive or partition where you are installing the Altera
Complete Design Suite and approximately 30 MB of available space on the drive that
contains your TEMP directory (Windows only).
The Quartus II Stand-Alone Programmer requires a minimum of 1 GB of RAM plus
additional memory, based on the size and number of SOF files and the size and
number of devices being configured.
Altera recommends that your system be configured to provide swap space (virtual
memory) equal to the recommended physical RAM that is required to process your
design.
The following table shows the memory required to process designs targeted for Altera
devices.
Devices with Compilation Support
Device Family Devices
HardCopy® III HC325FF484 HC325FF780
HC325WF484 HC325WF780
HC335LF1152 HC335FF1152
HC335LF1517 HC335FF1517
HardCopy IV E HC4E25WF484 HC4E25FF484
HC4E25WF780 HC4E25FF780
HC4E35LF1152 HC4E35FF1152
HC4E35LF1517 HC4E35FF1517
HardCopy IV GX HC4GX15LF780 HC4GX15LAF780
HC4GX25FF1152 HC4GX25LF780
HC4GX25LF1152 HC4GX35FF1152
HC4GX35FF1517
Page 4 Memory Requirements/Recommendations
Quartus II Software Version 9.1, SP1 Device Support Release Notes © February 2010 Altera Corporation
Memory Requirements/Recommendations (Part 1 of 2)
Device
Recommended Physical RAM
32-bit 64-bit
Arria GX (EP1AGX20)
Cyclone (EP1C3, EP1C4, EP1C6, EP1C12, EP1C20)
Cyclone II (EP2C5, EP2C8, EP2C20)
Cyclone III (EP3C5, EP3C10, EP3C16, EP3C25,
EP3C40)
Cyclone IV E (EP4CE6, EP4CE10, EP4CE15,
EP4CE22, EP4CE30, EP4CE40)
Cyclone IV GX (EP4CGX15, EP4CGX22,
EP4CGX30)
All MAX® series and MAX II device families
Stratix (EP1S10, EP1S20)
Stratix GX (EP1SGX10)
Stratix II (EP2S15)
512 MB 512 MB
Cyclone III (EP3C55, EP3C80)
Cyclone IV E (EP4CE55, EP4CE75)
768 MB 1.0 GB
Arria GX (EP1AGX35, EP1AGX50, EP1AGX60)
Arria II GX (EP2AGX45)
Cyclone II (EP2C35, EP2C50)
Cyclone IV E (EP4CE115)
Cyclone IV GX (EP4CGX50, EP4CGX75)
Stratix (EP1S25, EP1S30, EP1S40, EP1S60)
Stratix GX (EP1SGX25, EP1SGX40)
Stratix II (EP2S30)
Stratix II GX (EP2SGX30, EP2SGX60)
Stratix III (EP3SL50, EP3SE50, EP3SL70)
1.0 GB 1.5 GB
Arria GX (EP1AGX90)
Arria II GX (EP2AGX65)
Cyclone II (EP2C70)
Cyclone III (EP3C120)
Cyclone III LS (EP3CLS70, EP3CLS100)
Cyclone IV GX (EP4CGX110, EP4CGX150)
HardCopy II (HC210)
Stratix (EP1S80)
Stratix II (EP2S60, EP2S90)
Stratix II GX (EP2SGX90)
Stratix III (EP3SE80)
Stratix IV (EP4SGX70)
1.5 GB 2.0 GB
Timing and Power Models Page 5
© February 2010 Altera Corporation Quartus II Software Version 9.1, SP1 Device Support Release Notes
Timing and Power Models
This section contains a summary of timing and power model status in the current
version of the Quartus II software.
Arria II GX (EP2AGX95, EP2AGX125, EP2AGX190)
Cyclone III LS (EP3CLS150, EP3CLS200)
Stratix II (EP2S130, EP2S180)
Stratix II GX (EP2SGX130)
HardCopy II (HC220, HC230, HC240)
Stratix III (EP3SL110, EP3SE110, EP3SE150,
EP3SL200)
Stratix IV (EP4SGX110, EP4SGX230)
Stratix IV GT (EP4S40G2 and EP4S100G2)
3.0 GB 4.0 GB
Arria II GX (EP2AGX260)
Stratix III (EP3SE260, EP3SL340)
Stratix IV (EP4GS290)
4.0 GB 6.0 GB
Stratix IV (EP4SGX360, EP4SGX530, EP4SE530)
Stratix IV GT (EP4S40G5, EP4S100G3,
EP4S100G4, and EP4S100G5)
HardCopy III
HardCopy IV (HC4E25)
N/A 8.0 GB
Stratix IV (EP4SE820) N/A 12.0 GB
HardCopy IV (HC4E35) N/A 16.0 GB
Memory Requirements/Recommendations (Part 2 of 2)
Device
Recommended Physical RAM
32-bit 64-bit
Devices with Timing and Power Models (Part 1 of 3)
Device Family Device Timing Model Status Power Model Status
Arria GX EP1AGX20 Final – 7.2 Final – 7.2
EP1AGX35 Final – 7.2
EP1AGX50 Final – 7.2
EP1AGX60 Final – 7.2
EP1AGX90 Final – 7.2
Aria II GX EP2AGX45 Preliminary Preliminary
EP2AGX65
EP2AGX95
EP2AGX125
EP2AGX190
EP2AGX260
Page 6 Timing and Power Models
Quartus II Software Version 9.1, SP1 Device Support Release Notes © February 2010 Altera Corporation
Cyclone III EP3C5 Final – 8.0 SP1 Final – 8.1
EP3C10 Final – 8.0 SP1
EP3C16 Final – 8.0 SP1
EP3C25 Final – 7.2 SP1
EP3C40 Final – 8.0
EP3C55 Final – 8.0
EP3C80 Final – 8.0
EP3C120 Final – 7.2 SP1
Cyclone III LS EPC3LS70 Preliminary Preliminary
EPC3LS100
EPC3LS150
EPC3LS200
Cyclone IV E (All) Preliminary Preliminary
Cyclone IV GX (All) Preliminary Preliminary
HardCopy II HC210 Correlated – 8.0 Correlated – 7.2
HC210W
HC220
HC230
HC240
HardCopy III (All) Preliminary Preliminary
HardCopy IV E (All) Preliminary Preliminary
HardCopy IV GX Preliminary Preliminary
MAX IIZ EPM240Z Final – 9.0 SP1 Final – 9.0 SP1
EPM570Z
Stratix II GX EP2SGX30 Final – 7.0 Final – 7.1
EP2SGX60 Final – 7.0
EP2SGX90 Final – 6.1
EP2SGX130 Final – 6.1
Stratix III EP3SE50 Final – 9.0 Final – 9.0
EP3SE80 Final – 8.1
EP3SE110 Final – 8.1
EP3SE260 Final – 9.0
EP3SL50 Final – 9.0
EP3SL70 Final – 9.0
EP3SL110 Final – 8.1
EP3SL150 Final – 8.1
EP3SL200 Final – 9.0
EP3SL340 Final – 8.1
Devices with Timing and Power Models (Part 2 of 3)
Device Family Device Timing Model Status Power Model Status
Changes in Device Support Page 7
© February 2010 Altera Corporation Quartus II Software Version 9.1, SP1 Device Support Release Notes
The current version of the Quartus II software also includes final timing models for
the Cyclone, Cyclone II, MAX, MAX II, Stratix, Stratix II, and Stratix GX device
families. Timing models for these device families became final in the Quartus II
software versions 6.0 and earlier.
The current version of the Quartus II software also includes final power models for
the Cyclone, Cyclone II, MAX, MAX II, Stratix, Stratix II, and Stratix GX device
families. Power models for these device families became final in the Quartus II
software versions 6.0 and earlier.
Changes in Device Support
Cyclone IV GX devices enforce incorrect data rate
The Quartus II software version 9.1 SP1 enforces the incorrect transceiver data rate
limits for Cyclone IV GX devices with C8 speed grade packages and all F324 or
smaller packages. Data rate limits are calculated as follows:
■Data Rate = Channel Width * 125 MHz * X
■Whereby X = 1.25 if 8b/10b Encoding/Decoding is enabled, otherwise X = 1
Stratix IV EP4SE230(1) Final – 9.1 SP1 Preliminary
EP4SGX180
EP4SGX230(1)
EP4S40G2
EP4S100G2
EP4SE360 Preliminary
EP4SE530
EP4SE820
EP4SGX70
EP4SGX110
EP4SGX290
EP4SGX360
EP4SGX530
EP4S40G5
EP4S100G3
EP4S100G4
EP4S100G5
Notes:
(1) Quartus II Software 9.1 SP1
Devices with Timing and Power Models (Part 3 of 3)
Device Family Device Timing Model Status Power Model Status
Page 8 Changes in Device Support
Quartus II Software Version 9.1, SP1 Device Support Release Notes © February 2010 Altera Corporation
Applies to: Cyclone IV GX Devices
VCCIO pin count incorrect with device migration turned ON
When you migrate from a Stratix IV to a HardCopy IV or HardCopy IV GX device, if a
pin is NC in the Stratix IV device and VCCIO in either HardCopy device, the
migration result is NC. The correct migration result should be VCCIO, when the
referred IO bank is available in all devices of the current migration chain.
Applies to: HardCopy IV and HardCopy IV GX Devices
Arria II GX and Stratix IV GX require regenerating transceiver reconfiguration Memory
Initialization File
When the transceiver channel and PLL dynamic reconfiguration is enabled, and the
transceiver bonding mode is X4 or X8, the TX clock (coreclkout) is inactive after
reconfiguration. You must regenerate the transceiver reconfiguration Memory
Initialization File (.mif) with the Quartus II software version 9.1 SP1.
Applies to: Arria II GX and Stratix IV GX devices
Updated Cyclone IV E performance specifications
The Quartus II software version 9.1 SP1 performance specifications for Cyclone IV E
devices are incorrect. Refer to the Cyclone IV E handbook for the correct performance
specifications.
Applies to: Cyclone IV E devices
Arria II GX devices require recompilation
The Quartus II software versions up to and including 9.1 can produce functional
failures in Arria II GX devices due to race conditions in the secondary signal region of
RAM. This possible malfunction is fixed in Quartus II software version 9.1 SP1, and
requires that you recompile your design.
Applies to: Arria II GX devices
No vertical migration for Engineering Sample Stratix IV 230 GX and E and 530 GX and E
Stratix IV 230 GX and E and 530 GX and E devices in Engineering Sample version are
not allowed for vertical migration with the production devices due to the voltage
changes. (Core voltage for ES devices is 0.95V, while core voltage for production
devices is 0.9V.). To access vertical migration, use the corresponding production
device in the design.
Applies to: Stratix IV devices
Migration combinations of devices show fewer VCCIO pins
In certain migration combinations of Arria II GX and Stratix IV GX and Stratix E
devices, fewer VCCIO pins may be seen as available, when vertical migration in the
following paths is enabled:
Changes in Device Support Page 9
© February 2010 Altera Corporation Quartus II Software Version 9.1, SP1 Device Support Release Notes
Arria II GX devices
EP2AGX95EF35 with EP2AGX190FF35 or EP2AGX260FF35
EP2AGX125EF35 with EP2AGX190FF35 or EP2AGX260FF35
Pins AJ8 and G8 from VCCIO4B (bank 4B) turn to NC when migration is on in these
combinations.
Stratix IV E devices
EP4SE530F43 with EP4SE820F43
Multiple VCCIO pins from banks 1B, 1C, 2B, 2C, 3C, 4C, 5B, 5C, 6B, 6C, 7C, 8C turn to
NC, when migration is on.
Stratix IV GX devices
EP4SGX110FF35 with EP4SGX180FF35, EP4SGX230FF35, EP4SGX290FF35,
EP4SGX360FF35, or HC4GX25LF1152 (HardCopy IV)
Multiple VCCIO pins from banks 1A, 1C, 3C, 4C, 6A, 6C, 7C, 8C turn to NC, when
migration is on.
Applies to: Arria II GX and Stratix IV GX and E devices
Power down settings ignored
The VCCHIP_R power and VCCHIP_L power options have been removed from the
Quartus II software in version 9.1 SP1. The Opportunistically power off setting is no
longer available; use the Power on setting instead.
Applies to: Stratix IV GX and Stratix IV GT devices
Design Software Support for Mature Device Families
Design software support for FLEX, APEX, ACEX, and HardCopy Stratix device
families is not provided in versions of the Quartus II software beginning with version
9.1. Use the Quartus II software version 9.0 or earlier to support those devices. The
Quartus II software version 9.0 and the associated service packs will remain available
on the Altera website (http://www.altera.com).
Applies to: ACEX, APEX, FLEX and HardCopy Stratix device families
