100314QC - Fairchild Semiconductor

Februa ry 199 0

Revised August 2000

100314 Low Power Quint Different ial Line Receiver

100314

Low Power Quint Differential Line Recei ver

General Description

The 100314 is a monolithic quint differential line receiver

with emitter-follower outputs. An internal reference supply

(VBB) is available for single-ended reception. When used in

single-en ded oper ation the a pparent i nput thr eshold of t he

true inputs is 25 mV to 30 mV higher (positive) than the

threshold of the complementary inputs. Unlike other F100K

ECL devices, the i nputs do not have inp ut pull -down resis-

tors.

Active curre nt sources provide common-mode rejection of

1.0V in either the positive or negat ive direction. A defined

output state exists if both inverting and non-inverting inputs

are at the same potential between VEE and VCC. The

defined state is logic HIGH on the Oa–Oe outputs.

Features

■35% power reduction of the 1001 14

■2000V ESD protection

■Pin/function compatible with 100114

■Voltage compensated operating range = −4.2V to −5.7V

■Available to industrial grade temperature range

(PLCC pack age only )

Ordering Code:

Devices also available in Tape and R eel. Spe ci fy by append ing the suffix let t er “X” to the ordering code.

Logic Symbol

Pin Descriptions

Connection Diagrams

24-Pin DIP/SOIC

28-Pin PL CC

Order Number Package Number Package Description

100314SC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

100314PC N24E 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide

100314QC V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square

100314QI V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square

Industrial Temperature Range (−40°C to +85°C)

Pin Names Description

Da–DeData Inputs

Da–DeInverting Data Inputs

Oa–OeData Outputs

Oa–OeComplementary Data Outputs

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100314

Absolute Maximum Ratings(Note 1) Recommended Operating

Conditions

Note 1: The “Absolute Maximum Ratings” are thos e values bey ond which

the saf ety of the device cannot be gu aranteed. Th e device shoul d not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum rating.

The “R ecomm ended Oper ating Co ndition s” table will def ine the condit ions

for actu al device operation.

Note 2: ESD te s ti ng c onforms t o M I L-STD-8 83, Meth od 3015.

Commercial Version

DC Electrical Characteristics (Note 3)

VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = 0°C to +85°C

Note 3: The specified limits represe nt the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional

noise immunity and guard bandi ng can be achi ev ed by decre asin g t he all owable syste m op era ti ng r anges. Co ndi ti ons fo r t est ing shown in the ta ble s are cho-

sen to guarant ee opera t ion under “worst case” conditions .

Storage Temperat ure (TSTG)−65°C to +150°C

Maximum Junction Temperature (TJ)+150°C

Pin Potential to Ground Pin (VEE)−7.0 V to +0.5V

Input Voltage (DC) VEE to +0.5V

Output Curren t (DC Output HIGH) −50 mA

ESD (Not e 2) ≥2000V

Case Temperature (TC)

Commercial 0°C to +85°C

Industrial −40°C to +85°C

Supply Voltage (VEE)−5.7V to −4.2V

Symbol Parameter Min Typ Max Units Conditions

VOH Output HIGH Voltage −1025 −955 −870 mV VIN = VIH (Max) Loading with

VOL Output LOW Voltage −1830 −1705 −1620 mV or VIL (Min) 50Ω to −2.0V

VOHC Output HIGH Voltage −1035 mV VIN = VIH Loading with

VOLC Output LOW Voltage −1610 mV or VIL (Max) 50Ω to −2.0V

VBB Output Reference Voltage −1380 −1320 −1260 mV IVBB = −250 µA

VDIFF Input Voltage Differential 150 mV Required for Full Output Swing

VCM Common Mode Voltage VCC − 2.0 VCC − 0.5 V

VIH Single-Ended Guaranteed HIGH Signal for All

Input HIGH Vo ltage −1110 −870 mV Inputs (with one input tied to VBB)

VBB (Max ) + VDIFF

VIL Single-Ended Guaranteed LOW Signal for All

Input LOW Voltage −1830 −1530 mV Inputs (with one input tied to VBB)

VBB (Min) − VDIFF

IIL Input LOW Current 0.50 µAV

IN = VIL (Min)

IIH Input HIGH Current 240 µAV

IN = VIH (Max), Da–De = VBB,

Da–De = VIL(Min)

ICBO Input Leakage Current −10 µAV

IN = VEE, Da–De = VBB,

Da–De = VIL (Min)

IEE Power Supply Current −60 −30 mA Da–De = VBB, Da–De = VIL (Min)

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100314

Commercial Version (Con tinu ed)

DIP AC Electrical Characteristics

VEE = −4.2V to −5.7V, VCC = VCCA = GND

SOIC and PLCC AC Electrical Characteristics

VEE = −4.2V to −5.7V, VCC = VCCA = GND

Note 4: Maximum to ggle frequency at w hic h VOH and VOL DC specific ations a re m aintain ed.

Note 5: Maximum to ggle frequency at w hic h outpu t s ma int ain 150 mV swing.

Note 6: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same pack-

aged dev ice. Th e specif ications apply to any ou tputs s witchin g in the same dire ction either HI GH-to-L OW (tOSHL), or LOW- to-HIGH (tOSLH) , or in op posite

directions both HL and LH (tOST). Parameters tOST and tPS guaranteed by de s ign.

Note 7: All skews calculate d us ing input c ros s ing poin t to output c ros s ing poin t pr opagation delays.

Symbol Parameter TC = 0°CT

C = +25°CT

C = +85°CUnits Conditions

Min Max Min Max Min Max

fMAXFS Toggle Frequency 250 250 250 MHz (Note 2)

(Full Swing)

fMAXRS Toggle Frequency 700 700 700 MHz (Note 3)

(Reduced Swing)

tPLH Propagation Delay 0.65 1.90 0.65 2.00 0.70 2.00 ns

tPHL Data to Output Figures 1, 2

tTLH Transition Time 0.35 1.20 0.35 1.20 0.35 1.20 ns

tTHL 20% to 80%, 80% to 20%

Symbol Parameter TC = 0°CT

C = +25°CT

C = +85°CUnits Conditions

Min Max Min Max Min Max

fMAXFS Toggle Frequency 250 250 250 MHz (Note 4)

(Full Swing)

fMAXRS Toggle Frequency 700 700 700 MHz (Note 5)

(Reduced Swing)

tPLH Propagation Delay 0.65 1.70 0.65 1.80 0.70 1.80 ns

tPHL Data to Output Figures 1, 2

tTLH Transition Time 0.35 1.10 0.35 1.10 0.35 1.10 ns

tTHL 20% to 80%, 80% to 20%

tPLH Propagation Delay 0.70 1.50 0.80 1.60 0.90 1.80 ns PLCC only

tPHL Data to Output

tOSHL Maximum Skew Common Edge PLCC only

Output-to-Output Variation 280 280 280 ps (Note 6)(Note 7)

Data to Output Path

tOSLH Maximum Skew Common Edge PLCC only

Output-to-Output Variation 330 330 330 ps (Note 6)(Note 7)

Data to Output Path

tOST Maximum Skew Opposite Edge PLCC only

Output-to-Output Variation 330 330 330 ps (Note 6)(Note 7)

Data to Output Path

tPS Maximum Skew PLCC only

Pin (Signal) Transition Variation 320 320 320 ps (Note 6)(Note 7)

Data to Output Path

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100314

Industrial Version

PLCC DC Electrical Characteristics (Note 8)

VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = −40°C to +85°C

Note 8: The specified limits represe nt the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional

noise immunity and guard bandi ng can be achi ev ed by decre asin g t he all owable syste m op era ti ng r anges. Co ndi ti ons fo r t est ing shown in the ta ble s are cho-

sen to guarant ee opera t ion under “worst case” conditions .

PLCC AC Electrical Characteristics

VEE = −4.2V to −5.7V, VCC = VCCA = GND

Note 9: Maximum toggl e f requency at w hic h VOH and VOL D C sp ec if ic at ions are m aintained.

Note 10: Maximum toggle frequency at which outputs maintain 150 mV swing.

Symbol Parameter TC = −40°CT

C = 0°C to +85°CUnits Conditions

Min Max Min Max

VOH Output HIGH Voltage −1085 −870 −1025 −870 mV VIN = VIH (Max) Loading with

VOL Output LOW Voltage −1830 −1575 −1830 −1620 mV or VIL (Min) 50Ω to −2.0V

VOHC Output HIGH Voltage −1095 −1035 mV VIN = VIH Loading with

VOLC Output LOW Voltage −1565 −1610 mV or VIL (Min) 50Ω to −2.0V

VBB Output Reference Voltage −1395 −1255 −1380 −1260 mV IVBB = −250 µA

VDIFF Input Voltage Differential 150 150 mV Required for Full Output Swing

VCM Common Mode Voltage VCC − 2.0 VCC − 0.5 VCC − 2.0 VCC − 0.5 V

VIH Single-Ended Guaranteed HIGH Signal for All

Input HIGH Vo ltage −1115 −870 −1110 −870 mV Inputs (with one input tied to VBB)

VBB (Max) + VDIFF

VIL Single-Ended Guaranteed LOW Signal for All

Input LOW Voltage −1830 −1535 −1830 −1530 mV Inputs (with one input tied to VBB)

VBB (Min) − VDIFF

IIL Input LOW Current 0.50 0.50 µAV

IN = VIL (Min)

IIH Input HIGH Current 240 240 µAV

IN = VIH (Max), Da–De = VBB,

Da–De = VIL (Min)

ICBO Input Leakage Current −10 −10 µAV

IN = VEE, Da–De = VBB

Da–De = VIL (Min)

IEE Power Supply Current −60 −30 −60 −30 mA Da–De = VBB, Da–De = VIL (Min)

Symbol Parameter TC = −40°CT

C = +25°CT

C = +85°CUnits Conditions

Min Max Min Max Min Max

fMAXFS Toggle Frequency 250 250 250 MHz (Note 9)

(Full Swing)

fMAXRS Toggle Frequenc y 700 700 700 MHz (Note 10)

(Reduced Swing)

tPLH Propagation Delay 0.65 1.70 0.65 1.80 0.70 1.80 ns

Figures 1, 2

tPHL Data to Output

tTLH Transition Time 0.20 1.40 0.35 1.10 0.35 1.10 ns

tTHL 20% to 80%, 80% to 20%

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100314

Test Circuit

Note:

•VCC, V CCA = +2V, VEE = −2.5V

•L1 and L2 = equal length 50Ω impedance lines

•RT = 50Ω terminator internal to scope

•Decoupling 0.1 µF from GND to VCC and VEE

•All unus ed outp ut s are loaded w it h 50Ω to G ND

•CL = Fixture and stray capacitance ≤ 3 pF

FIGURE 1. AC Test Circuit

Switching Waveforms

FIGURE 2. Propagation Delay and Transition Times

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100314

Physical Dimensions inches (millimeters) unless otherwise noted

24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

Package Number M24B

24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide

Package Number N24E

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100314 Low Power Quint Different ial Line Receiver

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square

Package Number V28A

Fairchild does not assume an y responsibility fo r use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

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which, (a) are intended for surgical implant into the

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to perform when properly used in accordance with

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