MMUN2111LT1-D - ON Semiconductor

 Semiconductor Components Industries, LLC, 2001

November, 2001 – Rev. 2 1Publication Order Number:

MMUN2111LT1/D

MMUN2111LT1 Series

Preferred Devices

Bias Resistor Transistors

PNP Silicon Surface Mount Transistors

with Monolithic Bias Resistor Network

This new series of digital transistors is designed to replace a single

device and its external resistor bias network. The BRT (Bias Resistor

Transistor) contains a single transistor with a monolithic bias network

consisting of two resistors; a series base resistor and a base-emitter

resistor. The BRT eliminates these individual components by

integrating them into a single device. The use of a BRT can reduce

both system cost and board space. The device is housed in the SOT-23

package which is designed for low power surface mount applications.

•Simplifies Circuit Design

•Reduces Board Space

•Reduces Component Count

•The SOT-23 package can be soldered using wave or reflow. The

modified gull-winged leads absorb thermal stress during soldering

eliminating the possibility of damage to the die.

•Available in 8 mm embossed tape and reel. Use the Device Number

to order the 7 inch/3000 unit reel. Replace “T1” with “T3” in the

Device Number to order the 13 inch/10,000 unit reel.

MAXIMUM RATINGS (TA = 25°C unless otherwise noted)

Rating Symbol Value Unit

Collector-Base Voltage VCBO 50 Vdc

Collector-Emitter Voltage VCEO 50 Vdc

Collector Current IC100 mAdc

THERMAL CHARACTERISTICS

Characteristic Symbol Max Unit

Total Device Dissipation

TA = 25°C

Derate above 25°C

PD246 (Note 1.)

400 (Note 2.)

1.5 (Note 1.)

2.0 (Note 2.)

°C/W

Thermal Resistance –

Junction-to-Ambient RθJA 508 (Note 1.)

311 (Note 2.) °C/W

Thermal Resistance –

Junction-to-Lead RθJL 174 (Note 1.)

208 (Note 2.) °C/W

Junction and Storage

Temperature Range TJ, Tstg –55 to +150 °C

1. FR–4 @ Minimum Pad

2. FR–4 @ 1.0 x 1.0 inch Pad

SOT–23

CASE 318

STYLE 6

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A6x = Device Marking

x = A – L (See

Page 2)

M = Date Code

A6x M

MARKING DIAGRAM

Preferred devices are recommended choices for future use

and best overall value.

PIN 3

COLLECTOR

(OUTPUT)

PIN 2

EMITTER

(GROUND)

PIN 1

BASE

(INPUT)

DEVICE MARKING INFORMATION

See specific marking information in the device marking table

on page 2 of this data sheet.

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DEVICE MARKING AND RESISTOR VALUES

Device Package Marking R1 (K) R2 (K) Shipping

MMUN2111LT1

MMUN2111LT3 SOT–23 A6A 10 10 3000/Tape & Reel

10,000/Tape & Reel

MMUN2112LT1

MMUN2112LT3 SOT–23 A6B 22 22 3000/Tape & Reel

10,000/Tape & Reel

MMUN2113LT1

MMUN2113LT3 SOT–23 A6C 47 47 3000/Tape & Reel

10,000/Tape & Reel

MMUN2114LT1

MMUN2114LT3 SOT–23 A6D 10 47 3000/Tape & Reel

10,000/Tape & Reel

MMUN2115LT1 (Note 3.)

MMUN2115LT3 SOT–23 A6E 10 ∞3000/Tape & Reel

10,000/Tape & Reel

MMUN2116LT1 (Note 3.)

MMUN2116LT3 SOT–23 A6F 4.7 ∞3000/Tape & Reel

10,000/Tape & Reel

MMUN2130LT1 (Note 3.)

MMUN2130LT3 SOT–23 A6G 1.0 1.0 3000/Tape & Reel

10,000/Tape & Reel

MMUN2131LT1 (Note 3.)

MMUN2131LT3 SOT–23 A6H 2.2 2.2 3000/Tape & Reel

10,000/Tape & Reel

MMUN2132LT1 (Note 3.)

MMUN2132LT3 SOT–23 A6J 4.7 4.7 3000/Tape & Reel

10,000/Tape & Reel

MMUN2133LT1 (Note 3.)

MMUN2133LT3 SOT–23 A6K 4.7 47 3000/Tape & Reel

10,000/Tape & Reel

MMUN2134LT1 (Note 3.)

MMUN2134LT3 SOT–23 A6L 22 47 3000/Tape & Reel

10,000/Tape & Reel

ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)

Characteristic Symbol Min Typ Max Unit

OFF CHARACTERISTICS

Collector-Base Cutoff Current (VCB = 50 V, IE = 0) ICBO – – 100 nAdc

Collector-Emitter Cutoff Current (VCE = 50 V, IB = 0) ICEO – – 500 nAdc

Emitter-Base Cutoff Current MMUN2111LT1

(VEB = 6.0 V, IC = 0) MMUN2112LT1

MMUN2113LT1

MMUN2114LT1

MMUN2115LT1

MMUN2116LT1

MMUN2130LT1

MMUN2131LT1

MMUN2132LT1

MMUN2133LT1

MMUN2134LT1

IEBO –

–

0.5

0.2

0.1

0.2

0.9

1.9

4.3

2.3

1.5

0.18

0.13

mAdc

Collector-Base Breakdown Voltage (IC = 10 µA, IE = 0) V(BR)CBO 50 – – Vdc

Collector-Emitter Breakdown Voltage (Note 4.)

(IC = 2.0 mA, IB = 0) V(BR)CEO 50 – – Vdc

3. New devices. Updated curves to follow in subsequent data sheets.

4. Pulse Test: Pulse Width < 300 µs, Duty Cycle < 2.0%

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ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued)

Characteristic Symbol Min Typ Max Unit

ON CHARACTERISTICS (Note 5.)

DC Current Gain MMUN2111LT1

(VCE = 10 V, IC = 5.0 mA) MMUN2112LT1

MMUN2113LT1

MMUN2114LT1

MMUN2115LT1

MMUN2116LT1

MMUN2130LT1

MMUN2131LT1

MMUN2132LT1

MMUN2133LT1

MMUN2134LT1

hFE 35

160

3.0

8.0

100

140

250

5.0

140

130

–

Collector-Emitter Saturation Voltage

(IC = 10 mA, IE = 0.3 mA)

(IC = 10 mA, IB = 5 mA) MMUN2130LT1/MMUN2131LT1

(IC = 10 mA, IB = 1 mA) MMUN2115LT1/MMUN2116LT1/

MMUN2132LT1/MMUN2133LT1/MMUN2134LT1

VCE(sat) – – 0.25 Vdc

Output Voltage (on)

(VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kΩ) MMUN2111LT1

MMUN2112LT1

MMUN2114LT1

MMUN2115LT1

MMUN2116LT1

MMUN2130LT1

MMUN2131LT1

MMUN2132LT1

MMUN2133LT1

MMUN2134LT1

(VCC = 5.0 V, VB = 3.5 V, RL = 1.0 kΩ) MMUN2113LT1

VOL –

–

0.2

Vdc

Output Voltage (off)

(VCC = 5.0 V, VB = 0.5 V, RL = 1.0 kΩ)

(VCC = 5.0 V, VB = 0.25 V, RL = 1.0 kΩ) MMUN2115LT1

MMUN2116LT1

MMUN2131LT1

MMUN2132LT1

(VCC = 5.0 V, VB = 0.050 V, RL = 1.0 kΩ) MMUN2130LT1

VOH 4.9 – – Vdc

Input Resistor MMUN2111LT1

MMUN2112LT1

MMUN2113LT1

MMUN2114LT1

MMUN2115LT1

MMUN2116LT1

MMUN2130LT1

MMUN2131LT1

MMUN2132LT1

MMUN2133LT1

MMUN2134LT1

R1 7.0

15.4

32.9

7.0

3.3

0.7

1.5

3.3

15.4

4.7

1.0

2.2

4.7

28.6

61.1

6.1

1.3

2.9

6.1

28.6

k Ω

Resistor Ratio MMUN2111LT1/MMUN2112LT1/MMUN2113LT1

MMUN2114LT1

MMUN2115LT1/MMUN2116LT1

MMUN2130LT1/MMUN2131LT1/MMUN2132LT1

MMUN2133LT1

R1/R20.8

0.17

–

0.8

0.055

1.0

0.21

–

1.0

0.1

1.2

0.25

–

1.2

0.185

5. Pulse Test: Pulse Width < 300 µs, Duty Cycle < 2.0%

MMUN2111LT1 Series

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TYPICAL ELECTRICAL CHARACTERISTICS

MMUN2111LT1

100

0.1

0.01

0.001 0

Vin, INPUT VOLTAGE (VOLTS)

IC, COLLECTOR CURRENT (mA)

TA=-25°C

25°C

123456 7 8 9 10

0.01

IC, COLLECTOR CURRENT (mA)

VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS)

0.1

0 40 60 80

1000

1 10 100

IC, COLLECTOR CURRENT (mA)

hFE, DC CURRENT GAIN (NORMALIZED)

TA=75°C

-25°C

100

75°C

010 20 30 40

VR, REVERSE BIAS VOLTAGE (VOLTS)

Cob , CAPACITANCE (pF)

TA=-25°C

25°C

75°C

f = 1 MHz

lE = 0 V

TA = 25°C

VO = 5 V

IC/IB=10

VCE = 10 V

IC, COLLECTOR CURRENT (mA)

0.1

Vin, INPUT VOLTAGE (VOLTS)

100

10 20 30 40 50

TA=-25°C

25°C

75°C

VO = 0.2 V

Figure 1. Derating Curve

250

200

150

100

-50 0 50 100 150

TA, AMBIENT TEMPERATURE (°C)

PD, POWER DISSIPATION (MILLIWATTS)

RθJA = 625°C/W

Figure 2. VCE(sat) versus IC

Figure 3. DC Current Gain Figure 4. Output Capacitance

Figure 5. Output Current versus Input Voltage Figure 6. Input Voltage versus Output Current

25°C

MMUN2111LT1 Series

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TYPICAL ELECTRICAL CHARACTERISTICS

MMUN2112LT1

Figure 7. VCE(sat) versus ICFigure 8. DC Current Gain

1000

IC, COLLECTOR CURRENT (mA)

hFE, DC CURRENT GAIN (NORMALIZED)

100

1100

TA=75°C

25°C

-25°C

Figure 9. Output Capacitance

IC, COLLECTOR CURRENT (mA)

010 20 30

TA=-25°C

75°C

Vin, INPUT VOLTAGE (VOLTS)

100

0.1 40 50

Figure 10. Output Current versus Input Voltage

100

0.1

0.01

0.001 0 1 2 3 4

Vin, INPUT VOLTAGE (VOLTS)

75°C25°C

TA=-25°C

IC, COLLECTOR CURRENT (mA)

5 6 7 8 9 10

Figure 11. Input Voltage versus Output Current

0.01

VCE(sat), MAXIMUM COLLECTOR VOLTAGE (VOLTS)

0.1

40

IC, COLLECTOR CURRENT (mA)

0 20 60 80

75°C

25°C

TA=-25°C

010 2030 40

VR, REVERSE BIAS VOLTAGE (VOLTS)

Cob , CAPACITANCE (pF)

25°C

f = 1 MHz

lE = 0 V

TA = 25°C

VO = 5 V

VO = 0.2 V

IC/IB=10 VCE = 10 V

MMUN2111LT1 Series

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TYPICAL ELECTRICAL CHARACTERISTICS

MMUN2113LT1

Figure 12. VCE(sat) versus IC

100

0.1 0 10 20 30 40

IC, COLLECTOR CURRENT (mA)

Vin , INPUT VOLTAGE (VOLTS)

TA=-25°C

25°C

75°C

50

Figure 13. DC Current Gain

Figure 14. Output Capacitance

100

0.1

0.01

0.001 010

IC, COLLECTOR CURRENT (mA)

25°C

Vin, INPUT VOLTAGE (VOLTS)

-25°C

Figure 15. Output Current versus Input Voltage

hFE , CURRENT GAIN (NORMALIZED)

1000

100

10 1 10 100

IC, COLLECTOR CURRENT (mA)

25°C

-25°C

Figure 16. Input Voltage versus Output Current

IC, COLLECTOR CURRENT (mA)

0.1

0.01 010203040

75°C

25°C

VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS)

010203040

0.8

0.6

0.4

0.2

VR, REVERSE BIAS VOLTAGE (VOLTS)

Cob , CAPACITANCE (pF)

12345 6789

f = 1 MHz

lE = 0 V

TA = 25°C

VO = 5 V

VO = 2 V

IC/IB=10

TA=75°C

TA=-25°C

MMUN2111LT1 Series

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TYPICAL ELECTRICAL CHARACTERISTICS

MMUN2114LT1

Vin, INPUT VOLTAGE (VOLTS)

0.1 01020304050

100

10246810

4.5

3.5

2.5

1.5

0.5

00 2 4 6 81015202530 404550

VR, REVERSE BIAS VOLTAGE (VOLTS)

Vin, INPUT VOLTAGE (VOLTS)

IC, COLLECTOR CURRENT (mA)

Figure 17. VCE(sat) versus IC

IC, COLLECTOR CURRENT (mA)

020406080

VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS)

Figure 18. DC Current Gain

Figure 19. Output Capacitance Figure 20. Output Current versus Input Voltage

Cob , CAPACITANCE (pF)

Figure 21. Input Voltage versus Output Current

IC, COLLECTOR CURRENT (mA)

0.1

0.01

0.001

f = 1 MHz

lE = 0 V

TA = 25°C

LOAD

+12 V

Figure 22. Inexpensive, Unregulated Current Source

Typical Application

for PNP BRTs

TA=-25°C

75°C

25°C

TA=75°C25°C

-25°C

VO = 5 V

VO = 0.2 V TA=-25°C

25°C

75°C

IC/IB=10

hFE, DC CURRENT GAIN (NORMALIZED)

1 10 100

IC, COLLECTOR CURRENT (mA)

-25°C

25°C

TA=75°C

VCE = 10 V

180

160

140

120

100

02 4 6 8 1520405060708090

MMUN2111LT1 Series

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The values for the equation are found in the maximum

ratings table on the data sheet. Substituting these values

into the equation for an ambient temperature TA of 25°C,

one can calculate the power dissipation of the device which

in this case is 225 milliwatts.

INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE

MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS

Surface mount board layout is a critical portion of the

total design. The footprint for the semiconductor packages

must be the correct size to insure proper solder connection

interface between the board and the package. With the

correct pad geometry, the packages will self align when

subjected to a solder reflow process.

SOT–23

inches

0.037

0.95

0.037

0.95

0.079

2.0

0.035

0.9

0.031

0.8

SOT–23 POWER DISSIPATION

PD = TJ(max) – TA

RθJA

PD = 150°C – 25°C

556°C/W = 225 milliwatts

The power dissipation of the SOT–23 is a function of the

pad size. This can vary from the minimum pad size for

soldering to a pad size given for maximum power dissipa-

tion. Power dissipation for a surface mount device is deter-

mined b y T J(max), the maximum rated junction temperature

of the die, RθJA, the thermal resistance from the device

junction to ambient, and the operating temperature, TA.

Using the values provided on the data sheet for the SOT–23

package, PD can be calculated as follows:

The 556°C/W for the SOT–23 package assumes the use

of the recommended footprint on a glass epoxy printed

circuit board to achieve a power dissipation of 225 milli-

watts. There are other alternatives to achieving higher

power dissipation from the SOT–23 package. Another

alternative would be to use a ceramic substrate or an

aluminum core board such as Thermal Clad. Using a

board material such as Thermal Clad, an aluminum core

board, the power dissipation can be doubled using the same

footprint.

SOLDERING PRECAUTIONS

The melting temperature of solder is higher than the

rated temperature of the device. When the entire device is

heated to a high temperature, failure to complete soldering

within a short time could result in device failure. There-

fore, the following items should always be observed in

order to minimize the thermal stress to which the devices

are subjected.

•Always preheat the device.

•The delta temperature between the preheat and

soldering should be 100°C or less.*

•When preheating and soldering, the temperature of the

leads and the case must not exceed the maximum

temperature ratings as shown on the data sheet. When

using infrared heating with the reflow soldering

method, the difference shall be a maximum of 10°C.

•The soldering temperature and time shall not exceed

260°C for more than 10 seconds.

•When shifting from preheating to soldering, the

maximum temperature gradient shall be 5°C or less.

•After soldering has been completed, the device should

be allowed to cool naturally for at least three minutes.

Gradual cooling should be used as the use of forced

cooling will increase the temperature gradient and

result in latent failure due to mechanical stress.

•Mechanical stress or shock should not be applied

during cooling.

* Soldering a device without preheating can cause exces-

sive thermal shock and stress which can result in damage

to the device.

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STEP 1

PREHEAT

ZONE 1

RAMP"

STEP 2

VENT

SOAK"

STEP 3

HEATING

ZONES 2 & 5

RAMP"

STEP 4

HEATING

ZONES 3 & 6

SOAK"

STEP 5

HEATING

ZONES 4 & 7

SPIKE"

STEP 6

VENT

STEP 7

COOLING

200°C

150°C

100°C

50°C

TIME (3 TO 7 MINUTES TOTAL) TMAX

SOLDER IS LIQUID FOR

40 TO 80 SECONDS

(DEPENDING ON

MASS OF ASSEMBLY)

205° TO 219°C

PEAK AT

SOLDER JOINT

DESIRED CURVE FOR LOW

MASS ASSEMBLIES

100°C

150°C

160°C

140°C

Figure 23. Typical Solder Heating Profile

DESIRED CURVE FOR HIGH

MASS ASSEMBLIES

170°C

For any given circuit board, there will be a group of

control settings that will give the desired heat pattern. The

operator must set temperatures for several heating zones,

and a figure for belt speed. Taken together, these control

settings make up a heating “profile” for that particular

circuit board. On machines controlled by a computer, the

computer remembers these profiles from one operating

session t o the next. Figure 7 shows a typical heating profile

for use when soldering a surface mount device to a printed

circuit board. This profile will vary among soldering

systems but it is a good starting point. Factors that can

affect the profile include the type of soldering system in

use, density and types of components on the board, type of

solder used, and the type of board or substrate material

being used. This profile shows temperature versus time.

SOLDER STENCIL GUIDELINES

Prior to placing surface mount components onto a printed

circuit board, solder paste must be applied to the pads. A

solder stencil is required to screen the optimum amount of

solder paste onto the footprint. The stencil is made of brass

or stainless steel with a typical thickness of 0.008 inches.

The stencil opening size for the surface mounted package

should be the same as the pad size on the printed circuit

board, i.e., a 1:1 registration.

TYPICAL SOLDER HEATING PROFILE

The line on the graph shows the actual temperature that

might be experienced on the surface of a test board at or

near a central solder joint. The two profiles are based on a

high density and a low density board. The Vitronics

SMD310 convection/infrared reflow soldering system was

used to generate this profile. The type of solder used was

62/36/2 Tin Lead Silver with a melting point between

177–189°C. When this type of furnace is used for solder

reflow work, the circuit boards and solder joints tend to

heat first. The components on the board are then heated by

conduction. The circuit board, because i t has a lar ge surface

area, absorbs the thermal energy more efficiently, then

distributes this energy to the components. Because of this

effect, the main body of a component may be up to 30

degrees cooler than the adjacent solder joints.

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PACKAGE DIMENSIONS

SOT–23

TO–236AB

CASE 318–08

ISSUE AF

STYLE 6:

PIN 1. BASE

2. EMITTER

3. COLLECTOR

DIM

MIN MAX MIN MAX

MILLIMETERS

0.1102 0.1197 2.80 3.04

INCHES

B0.0472 0.0551 1.20 1.40

C0.0350 0.0440 0.89 1.11

D0.0150 0.0200 0.37 0.50

G0.0701 0.0807 1.78 2.04

H0.0005 0.0040 0.013 0.100

J0.0034 0.0070 0.085 0.177

K0.0140 0.0285 0.35 0.69

L0.0350 0.0401 0.89 1.02

S0.0830 0.1039 2.10 2.64

V0.0177 0.0236 0.45 0.60

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. MAXIMUM LEAD THICKNESS INCLUDES LEAD

FINISH THICKNESS. MINIMUM LEAD THICKNESS

IS THE MINIMUM THICKNESS OF BASE

MATERIAL.

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Notes

MMUN2111LT1 Series

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ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes

without further notice to any products herein. SCILLC makes no warranty , representation or guarantee regarding the suitability of its products for any particular

purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,

including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or

specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be

validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.

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intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or

death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold

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attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim

alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.

PUBLICATION ORDERING INFORMATION

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4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031

Phone: 81–3–5740–2700

Email: r14525@onsemi.com

ON Semiconductor Website: http://onsemi.com

For additional information, please contact your local

Sales Representative.

MMUN2111LT1/D

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