Data Sheet Rev. 2.6
www.infineon.com/OPTIREG-Linear 1 2018-11-20
OPTIREG™ Linear TLE4269
5 V low drop fixed voltage regulator
Features
Output voltage tolerance ≤ ±2%
150 mA current capability
Very low current consumption
•Early warning
Reset output low down to VQ=1V
Overtemperature protection
Reverse polarity proof
Adjustable reset threshold
Very low drop voltage
Wide temperature range
Integrated pull-up resistor at logic outputs
Green Product (RoHS compliant)
Potential applications
General automotive applications.
Product validation
Qualified for automotive applications. Product validation according to AEC-Q100/101.
Description
The OPTIREG™ Linear TLE4269 is an automotive voltage regulator with a 5 V fixed output. The maximum
operating voltage is 45 V. The output is able to drive 150 mA load. The device features short-circuit protection.
The thermal shutdown feature switches the output off when the junction temperature exceeds 150°C to
ensure the device is not damaged by overheating. A reset signal is generated when the output voltage drops
below VQ< 4.65 V. The reset threshold voltage can be decreased by an external connection of a voltage divider.
The reset delay time can be set by an external capacitor. Reset and sense output have integrated pull-up
resistors. If the integrated resistors are not required, the TLE4279 can be used instead. It is also possible to
supervise the input voltage by using an integrated comparator to give a low voltage warning.
Type Package Marking
TLE4269G PG-DSO-8 TLE 4269
TLE4269GM PG-DSO-14 TLE 4269
TLE4269GL PG-DSO-20 TLE 4269
Data Sheet 2 Rev. 2.6
2018-11-20
OPTIREG™ Linear TLE4269
5 V low drop fixed voltage regulator
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Potential applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Product validation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 General product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5.1 Application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5.2 Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table of contents
Data Sheet 3 Rev. 2.6
2018-11-20
OPTIREG™ Linear TLE4269
5 V low drop fixed voltage regulator
Block diagram
1 Block diagram
Figure 1 Block diagram
AEB01669
Control
Saturation
Current and
Reference
Trimming
20 kΩΩk20
Amplifier
Error
Reference
Ι
D
RADJ
SI
Q
RO
SO
&
Data Sheet 4 Rev. 2.6
2018-11-20
OPTIREG™ Linear TLE4269
5 V low drop fixed voltage regulator
Pin configuration
2 Pin configuration
Figure 2 Pin configuration PG-DSO-8 (top view)
Table 1 Pin definitions and functions (TLE4269G)
Pin No. Symbol Function
1I Input
connected with a ceramic capacitor to GND directly at the IC.
2SI Sense input
if not needed connect to Q.
3RADJReset threshold adjust
if not needed connect to GND.
4D Reset delay
to select delay time, connect to GND via capacitor.
5GNDGround
6ROReset output
the open collector output is connected to the 5 V output via an integrated 20 kΩ
pull-up resistor;
leave open if the reset function is not needed
7SOSense output
the open collector output is connected to the 5 V output via an integrated 20 kΩ
pull-up resistor;
leave open if the sense comparator is not needed.
8Q 5V output
connect to GND with a 10 μF capacitor, ESR < 10 Ω
GND
RO
SO
D5
6
7
RADJ
8
4
3
2
1
AEP01668
Q
ΙS
Ι
PG-DSO-8
Data Sheet 5 Rev. 2.6
2018-11-20
OPTIREG™ Linear TLE4269
5 V low drop fixed voltage regulator
Pin configuration
Figure 3 Pin configuration PG-DSO-14 (top view)
Table 2 Pin definitions and functions (TLE4269GM)
Pin No. Symbol Function
1RADJReset threshold adjust
if not needed connect to GND.
2DReset delay
to select delay time; connect to GND via capacitor.
3, 4, 5, 6 GND Ground
7ROReset output
the open collector output is connected to the 5 V output via an integrated 20 kΩ
pull-up resistor;
leave open if the reset function is not needed
8SOSense output
the open collector output is connected to the 5 V output via an integrated 20 kΩ
pull-up resistor;
leave open if the sense comparator is not needed.
9Q5V Output
connect to GND with a 10 μF capacitor, ESR < 10 Ω.
10, 11, 12 GND Ground
13 I Input
connected with a ceramic capacitor to GND directly at the IC.
14 SI Sense input
if not needed connect to Q.
AEP02248
Q
GND
SI
GND
RO
GND
Ι
10
9
GND GND
1
2
3
4
5
GND
6
7SO
14
13
12
11
D
GND
8
RADJ
PG-DSO-14
Data Sheet 6 Rev. 2.6
2018-11-20
OPTIREG™ Linear TLE4269
5 V low drop fixed voltage regulator
Pin configuration
Figure 4 Pin configuration PG-DSO-20 (top view)
Table 3 Pin definitions and functions (TLE4269GL)
Pin No. Symbol Function
1RADJReset threshold adjust
if not needed connect to ground.
2DReset delay
to select delay time, connect to GND via external capacitor.
4 - 7,
14 - 17
GND Ground
10 RO Reset output
the open collector output is connected to the 5 V output via an integrated 20 kΩ
pull-up resistor;
leave open if the reset function is not needed
11 SO Sense output
the open collector output is connected to the 5 V output via an integrated 20 kΩ
pull-up resistor;
leave open if the sense comparator is not needed.
12 Q Output
connect to GND with a 10 μF capacitor, ESR < 10 Ω.
19 I Input
connected with a ceramic capacitor to GND directly at the IC.
20 SI Sense input
if not needed connect to Q.
N.C.
12
11
N.C.
N.C.
GND
1
2
3
4
20
5
19
6
18
7
N.C.
17
8
Q
16
9
15
10
14
13
RADJ
D
GND
Ι
AEP01802
N.C.
GND
GND
RO
S
GND
SO
GND
GND
GND
Ι
PG-DSO-20
Data Sheet 7 Rev. 2.6
2018-11-20
OPTIREG™ Linear TLE4269
5 V low drop fixed voltage regulator
General product characteristics
3 General product characteristics
3.1 Absolute maximum ratings
Table 4 Absolute maximum ratings
Tj = -40°C to 150°C
Parameter Symbol Values Unit Note or
Test Condition
Min. Typ. Max.
Input
Input voltage VI-40 45 V
Input current II––––Internal limited
Sense input
Input voltage VSI -40 45 V
Input current ISI 1–1mA
Reset threshold
Voltage VRADJ -0.3 7 V
Current IRADJ -10 10 mA
Reset delay
Voltage VD-0.3 7 V
Current ID––––Internal limited
Ground
Current IGND 50 mA
Reset output
Voltage VR-0.3 7 V
Current IR––––Internal limited
Sense output
Voltage VSO -0.3 7 V
Current ISO ––––Internal limited
5V output
Output voltage VQ-0.5 7 V
Output current IQ-10 mA
Temperature
Junction temperature Tj 150 °C
Storage temperature TStg -50 150 °C
Operating range
Input voltage VI––45V
Junction temperature Tj-40 150 °C
Data Sheet 8 Rev. 2.6
2018-11-20
OPTIREG™ Linear TLE4269
5 V low drop fixed voltage regulator
General product characteristics
Thermal data
Junction-ambient Rthja
200
70
70
K/W
K/W
K/W
PG-DSO-8
PG-DSO-14
PG-DSO-20
Junction-pin Rthjp
–30
30
30
K/W
K/W
K/W
PG-DSO-81)
PG-DSO-142)
PG-DSO-202)
1) Measured to pin 5.
2) Measured to pin 4.
Table 4 Absolute maximum ratings (cont’d)
Tj = -40°C to 150°C
Parameter Symbol Values Unit Note or
Test Condition
Min. Typ. Max.
Data Sheet 9 Rev. 2.6
2018-11-20
OPTIREG™ Linear TLE4269
5 V low drop fixed voltage regulator
General product characteristics
3.2 Electrical characteristics
Table 5 Electrical characteristics
VI = 13.5 V; -40°C ≤ Tj ≤ 125°C
Parameter Symbol Values Unit Note or Test Condition
Min. Typ. Max.
Output voltage VQ4.90 5.00 5.10 V 1 mA ≤ IQ ≤ 100 mA,
6 V ≤ VI ≤ 16 V
Current limit IQ150 200 500 mA
Current consumption;
Iq = II - IQ
Iq 240 300 μA IQ ≤ 1 mA, Tj < 85°C
Current consumption;
Iq = II - IQ
Iq 250 700 μA IQ = 10 mA
Current consumption;
Iq = II - IQ
Iq–2 8 mAIQ = 50 mA
Drop voltage Vdr 0.25 0.5 V IQ = 100 mA1)
1) Drop voltage = VI - VQ measured when the output voltage has dropped 100 mV from the nominal value obtained at
13.5 V input.
Load regulation VQ–1030mVIQ = 5 mA to 100 mA
Line regulation VQ–1040mVVI = 6 V to 26 V,
IQ = 1 mA
Reset generator
Switching threshold VRT 4.50 4.65 4.80 V
Reset adjust switching
threshold
VRADJ, TH 1.26 1.35 1.44 V VQ > 3.5 V
Reset pull-up 10 20 40
Saturation voltage VRO, SAT –0.10.4VRintern
Upper delay switching
threshold
VUD 1.4 1.8 2.2 V
Lower delay switching
threshold
VLD 0.3 0.45 0.60 V
Saturation voltage delay
capacitor
VD, SAT –– 0.1VVQ < VRT
Charge current ID3.0 6.5 9.5 μA VD = 1 V
Delay time L → H td17 28 ms CD = 100 nF
Delay time H → L tt–1 μsCD = 100 nF
Input voltage sense
Sense threshold high VSI, high 1.24 1.31 1.38 V
Sense threshold low VSI, low 1.16 1.20 1.28 V
Sense output low voltage VSO, low –0.10.4VVSI < 1.20 V; VQ > 3 V, Rintern
Sense pull-up 10 20 40
Sense input current ISI -1 0.1 1 μA
Data Sheet 10 Rev. 2.6
2018-11-20
OPTIREG™ Linear TLE4269
5 V low drop fixed voltage regulator
Functional description
4 Functional description
The control amplifier compares a reference voltage, made highly accurate by resistance balancing, with a
voltage proportional to the output voltage and drives the base of the series PNP transistor via a buffer.
Saturation control as a function of the load current prevents any over-saturation of the power element.
The reset output RO is in high-state if the voltage on the delay capacitor CD is greater or equal VUD. The delay
capacitor CD is charged with the current ID for output voltages greater than the reset threshold VRT. If the output
voltage gets lower than VRT (‘reset condition’) a fast discharge of the delay capacitor CD sets in and as soon as
VD gets lower than VLD the reset output RO is set to low-level.
The time gap for the delay capacitor discharge is the reset reaction time tRR.
The reset threshold VRT can be decreased via an external voltage divider connected to the pin RADJ. In this case
the reset condition is reached if VQ<VRT and VRADJ <VRAQDJ, TH. Dimensioning the voltage divider (Figure 5)
according to:
(4.1)
the reset threshold can be decreased down to 3.5 V. If the reset-adjust-option is not needed the RADJ-pin
should be connected to GND causing the reset threshold to go to its default value (typ. 4.65 V).
A built in comparator compares the signal of the pin SI, normally fed by a voltage divider from the input
voltage, with the reference and gives an early warning on the pin SO. It is also possible to superwise another
voltage e.g. of a second regulator, or to build a watchdog circuit with few external components.
VTHRES
VRAD J TH,()
RADJ1 RADJ2
+()×
RADJ2
-----------------------------------------------------------------------------=
Data Sheet 11 Rev. 2.6
2018-11-20
OPTIREG™ Linear TLE4269
5 V low drop fixed voltage regulator
Application information
5 Application information
The input capacitor CI is necessary for compensating line influences. Using a resistor of approx. 1 Ω in series
with CI, the oscillating circuit consisting of input inductivity and input capacitance can be damped. The output
capacitor CQ is necessary for the stability of the regulating circuit. Stability is guaranteed at values ≥ 10 μF and
an ESR ≤ 10 Ω within the operating temperature range. For small tolerances of the reset delay the spread of
the capacitance of the delay capacitor and its temperature coefficient should be noted.
5.1 Application diagram
Figure 5 Measuring circuit
Figure 6 Reset timing diagram
AED01542
Thermal
t
d
Power-on-Reset Voltage Dip Secondary Overload
at OutputSpike
t
V
LD
V
RO, SAT
RT
V
t
RR
<
RR
t
at Input Undervoltage
Shutdown
V
V
RO
D
V
t
t
t
t
Q
V
V
I
V
UD
d
d
I
C
D
D
=
Data Sheet 12 Rev. 2.6
2018-11-20
OPTIREG™ Linear TLE4269
5 V low drop fixed voltage regulator
Application information
Figure 7 Sense timing diagram
AED03049
t
Sense
t
SI, High
V
SI, Low
V
Input
Voltage
High
Low
Output
Sense
Data Sheet 13 Rev. 2.6
2018-11-20
OPTIREG™ Linear TLE4269
5 V low drop fixed voltage regulator
Application information
5.2 Typical performance characteristics
Charge current ID versus
junction temperature Tj
Switching voltage VUD and VLD versus
junction temperature Tj
Drop voltage Vdr versus
output current IQ
Reset adjust switching threshold VRADJ,TH versus
junction temperature Tj
AED01803
-40
Ι
D
04080120 C 160
0
Ι
V= 13.5 V
2
4
6
8
10
12
14
16
Aμ
1.0 V=VC
j
T
AED01804
-40
V
04080120 C 160
0
Ι
V= 13.5 V
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
V
V
LD
UD
V
D
j
T
AED01805
0
V
dr
mV
0
=25C
Ι
Q
30 60 90 120 180mA
C125=
100
200
300
400
500
j
T
j
T
AED01806
-40
VRADJ, TH
04080120 C 160
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
V
j
T
Data Sheet 14 Rev. 2.6
2018-11-20
OPTIREG™ Linear TLE4269
5 V low drop fixed voltage regulator
Application information
Current consumption IQ versus
input voltage VI
Output voltage VQ versus
input voltage VI
Sense threshold VSI versus
junction temperature Tj
Output voltage VQ versus
junction temperature Tj
AED01807
0
Ι
q
mA
10 20 30 40 V50
0
5
10
15
20
25
30
Ι
V
R
L
=50
Ω
Ω
33=
L
R
Ω
100=
L
R
R
L
= 200
Ω
AED01808
0
VQ
V
2468V10
0
2
4
6
8
10
12
Ι
V
RL=50
Ω
AED01809
-40 04080120 C 160
1.0
Ι
V= 13.5 V
V
SI
1.1
1.2
1.3
1.4
1.5
1.6
V
Sense Output High
Sense Output Low
j
T
AED01671
-40
VQ
V
04080
120 C 160
4.6
4.7
4.8
4.9
5.0
5.1
Ι
V= 13.5 V
5.2
j
T
Data Sheet 15 Rev. 2.6
2018-11-20
OPTIREG™ Linear TLE4269
5 V low drop fixed voltage regulator
Application information
Output current IQ versus
input voltage VI
Current consumption IQ versus
output current IQ
Current consumption Iq versus
output current IQ
AED01810
0
Ι
Q
mA
10 20 30 40 V50
0
=25C
Ι
V
50
100
150
200
250
300
350
C125=
j
T
j
T
AED01811
0
Ι
q
mA
0
=25 C
Ι
Q
13.5 V=V
Ι
20 40 60 80 120mA
2
4
6
8
10
12
j
T
AED01812
0
Ι
q
mA
0
=25 C
Ι
Q
13.5 V=V
Ι
mA
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
10 20 30 40 50
j
T
Data Sheet 16 Rev. 2.6
2018-11-20
OPTIREG™ Linear TLE4269
5 V low drop fixed voltage regulator
Package information
6 Package information
Figure 8 PG-DSO-8
1)
Figure 9 PG-DSO-14
1)
1) Dimensions in mm
1) Does not include plastic or metal protrusion of 0.15 max. per side
-0.06
-0.2
+0.1
5
0.41
8x
1
1)
4
8
1.27
5
A
0.1
0.2
M
A
(1.45)
0.175
1.75 MAX.
B
B6
±0.2
0.64
4
-0.2
0.19
+0.06
0.35 x 45°
1)
±0.25
MAX.
Index
Marking
±0.07
2) Lead width can be 0.61 max. in dambar area
GPS01229
Data Sheet 17 Rev. 2.6
2018-11-20
OPTIREG™ Linear TLE4269
5 V low drop fixed voltage regulator
Package information
Figure 10 PG-DSO-20
1)
Green product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant
with government regulations the device is available as a green product. Green products are RoHS-Compliant
(i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
Further information on packages
https://www.infineon.com/packages
1) Dimensions in mm
GPS05094
1.27
0.2 20x
0.35
+0.15 2)
12.8
1)
-0.2
110
1120
2.65 MAX.
2.45
20x
0.1
-0.2
0.2-0.1
Index Marking
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Does not include dambar protrusion of 0.05 max. per side
0.35 x 45˚
-0.21)
7.6
8˚ MAX.
±0.3
10.3
0.4
+0.8
0.23
+0.09
Data Sheet 18 Rev. 2.6
2018-11-20
OPTIREG™ Linear TLE4269
5 V low drop fixed voltage regulator
Revision history
7 Revision history
Revision Date Changes
2.6 2018-11-20 Update layout and structure
Updated packaged drawing “PG-DSO-14”
Editorial changes
2.5 2013-11-25 Package version changed:
- PG-DSO-20-35 to PG-DSO-20
Package naming harmonized according to Infineon standards:
- PG-DSO-8-16 to PG-DSO-8
- PG-DSO-14-30 to PG-DSO-14
2.4 2007-03-20 Initial version of RoHS-compliant derivate of TLE4269
Page 1: AEC certified statement added
Page 1 and Page 16 : RoHS compliance statement and Green product feature added
Page 1 and Page 16 : Package changed to RoHS compliant version
Legal Disclaimer updated
2.3 2004-01-01
Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
Edition 2018-11-20
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2018 Infineon Technologies AG.
All Rights Reserved.
Do you have a question about any
aspect of this document?
Email: erratum@infineon.com
Document reference
Z8F52238104
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hereby disclaims any and all warranties and liabilities
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