TCA 3727
Semiconductor Group 24 1998-02-01
Application Hints
The TCA 3727 is intended to drive both phases of a stepper motor. Special care has
been taken to provide high efficiency, robustness and to minimize external components.
Power Supply
The T CA 3 727 will work with s up ply vo ltag es rang ing from 5 V to 50 V at pin Vs. As the
circuit operates with chopper regulation of the current, interference generation problems
can arise in some applications. Therefore the power supply should be decoupled by a
0.22 µF ceramic capacitor located near the package. Unstabilized supplies may even
afford higher capacities.
Current Sensing
The current in the windings of the stepper motor is sensed by the voltage drop across R1
and R2. Depending on the selected current internal comparators will turn off the sink
transistor as soon as the voltage drop reaches certain thresholds (typical 0 V, 0.25 V,
0.5 V and 0.75 V); (R1, R2=1 Ω). These thresholds are neither affected by variations of
VL nor by variations of VS.
Due to chopper control fast current rises (up to 10 A/µs) will occure at the sensing
resistors R1 and R2. To prevent malfunction of the current sensing mechanism R1 and R2
should be pure ohmic. The resistors should be wired to GND as directly as possible.
Capacitive loads such as long cables (with high wire to wire capacity) to the motor should
be avoided for the same reason.
Synchronizing Several Choppers
In some applications synchrone chopping of several stepper motor drivers may be
desireabl e to reduce aco ust ic i nterfe renc e. This can be done by forcing the o sci lla tor of
the TCA 3727 by a pulse generator overdriving the oscillator loading currents
(approximately Š±100 µA). In these applications lo w level should be bet ween 0 V and
1 V while high level should be between 2.6 V and VL.
Optimizing Noise Immunity
Unused inputs should always be wired to proper voltage levels in order to obtain highest
possible noise immunity.
To prevent crossconduction of the output stages the TCA 3727 uses a special break
before make timing of the power transistors. This timing circuit can be triggered by short
glitches (some hundred nano seconds) at the Phas e inputs causing the ou tput stage to
become high res is tive du ring some mic roseconds. Thi s w il l l ead to a f ast current decay
during that time. To achieve maximum current accuracy such glitches at the Phase
inputs should be avoided by proper control signals.