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BSS138K N-Channel Logic Level Enhancement Mode Field Effect Transistor Features * * * * * * * * * Low On-Resistance D Low Gate Threshold Voltage Low Input Capacitance Fast Switching Speed S Low Input/Output Leakage G Ultra-Small Surface Mount Package SOT - 23 Marking : SK Pb Free / RoHS Compliant Green Compound ESD HBM = 2000 V as per JEDEC A114A; ESD CDM = 2000 V as per JEDEC C101C Absolute Maximum Ratings(1) Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Values are at TA = 25C unless otherwise noted. Symbol Parameter Value Units VDSS Drain-Source Voltage 50 V VGSS Gate-Source Voltage 12 V Continuous 0.22 Pulsed 0.88 ID Drain Current TJ Operating Junction Temperature Range -55 to +150 C Storage Temperature Range -55 to +150 C TSTG A Note: 1. These ratings are limiting values above which the serviceability of any semiconductor device maybe impaired. Thermal Characteristics Symbol PD RJA Parameter Value Units Total Device Dissipation 350 mW Derating above TA = 25C 2.8 mW/C Thermal Resistance, Junction to Ambient(2) 350 C/W Note: 2. Device mounted on FR-4 PCB, 1 inch x 0.85 inch x 0.062 inch. Minimum land pad size. Package Marking and Ordering Information Device Marking Device Reel Size Tape Width Quantity SK BSS138K 7" 8 mm 3000 units (c) 2010 Fairchild Semiconductor Corporation BSS138K Rev. 1.3.0 www.fairchildsemi.com 1 BSS138K -- N-Channel Logic Level Enhancement Mode Field Effect Transistor May 2013 Values are at TA = 25C unless otherwise noted Symbol Parameter Test Condition Min. Typ. Max. Units Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 10 A BVDSS TJ Breakdown Voltage Temperature Coefficient ID = 250 A, Referenced to 25C Zero Gate Voltage Drain Current VDS = 50 V, VGS = 0 V 0.1 VGS = 12 V, VDS = 0 V 1 IDSS IGSS Gate-Body Leakage 50 V 0.11 V/C VGS = 10 V, VDS = 0 V 0.5 VGS = 5 V, VDS = 0 V 0.05 A A On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 A VGS(th) TJ Gate Threshold Voltage Temperature Coefficient ID = 1 mA, Referenced to 25C RDS(ON) Static Drain-Source On-Resistance ID(ON) gFS 0.6 1.2 -1.4 V mV/C VGS = 1.8V, ID = 50 mA, 2.5 VGS = 2.5 V, ID = 50 mA 2.0 VGS = 5V, ID = 50 mA 1.6 On-State Drain Current VGS = 10 V, VDS = 5 V 0.2 A Forward Transconductance VDS = 10 V, ID = 200 mA 200 mS Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance RG Gate Resistance 58 VDS = 25 V, VGS = 0 V, f = 1.0 MHz 9.75 VDS = 5 V, VGS = 10 mV 281 pF 5.2 Switching Characteristics tD(ON) Turn-On Delay Time tr Turn-On Rise Time tD(OFF) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Change Qgs Gate-Source Change Qgd Gate-Drain Change 5 VDD = 30 V, ID = 0.29 A, VGS = 10 V, RGEN = 6 5 60 ns 35 2.4 VDS = 25 V, ID = 0.2 A, VGS = 10 V, IG = 0.1 mA 0.5 nC 0.5 Drain-Source Diode Characteristics and Maximum Ratings Vsd Drain-Source Diode Forward Voltage VGS = 0 V, IS = 115 mA (c) 2010 Fairchild Semiconductor Corporation BSS138K Rev. 1.3.0 1.2 V www.fairchildsemi.com 2 BSS138K -- N-Channel Logic Level Enhancement Mode Field Effect Transistor Electrical Characteristics 2.00 VGS = 10V 4V 5V 1.5 RDS(on), () DRANI-SOURCE ON-RESISTANCE ID. DRAIN-SOURCE CURRENT(A) 2.0 3V 1.0 2V 0.5 2 4 6 8 10 6V 5V 4.5V 1.50 4V VGS = 3V 1.25 1.00 0.2 0.4 9V 8V 7V 0.75 0.0 0.0 0 1.75 0.6 10V 0.8 1.0 ID. DRAIN-SOURCE CURRENT(A) VDS. DRAIN-SOURCE VOLTAGE (V) Figure 2. On-Resistance Variation with Gate Voltage and Drain Current Figure 1. On-Region Characteristics RDS(on) () DRANI-SOURCE ON-RESISTANCE 2.5 VDS = 10V ID = 500 mA 2.0 1.5 1.0 0.5 -50 0 50 100 150 o TJ. JUNCTION TEMPERATURE( C) Figure 4. On-Resistance Variation with Gate-Source Voltage Figure 3. On-Resistance Variation with Temperature Vth, Gate-Source Threshold Voltage (V) ID. DRAIN-SOURCE CURRENT(A) 3.0 VDS = 10V 2.5 o 25( C) o TJ = -25( C) 2.0 1.5 1.0 o o 75( C) 0.5 2.0 2.5 3.0 3.5 4.0 4.5 o 125( C) 150( C) 5.0 5.5 VDS = VGS 1.0 ID = 1 mA ID = 0.25 mA 0.5 0.0 -50 6.0 0 50 100 150 o TJ. JUNCTION TEMPERATURE( C) VGS. GATE-SOURCE VOLTAGE (V) Figure 6. Gate Threshold Variation with Temperature Figure 5. Transfer Characteristics (c) 2010 Fairchild Semiconductor Corporation BSS138K Rev. 1.3.0 1.5 www.fairchildsemi.com 3 BSS138K -- N-Channel Logic Level Enhancement Mode Field Effect Transistor Typical Performance Characteristics BSS138K -- N-Channel Logic Level Enhancement Mode Field Effect Transistor Typical Performance Characteristics (Continue) IS Reverse Drain Current, [mA] VGS = 0 V 100 o 150 C o 25 C 10 o -55 C 1 0.0 0.2 0.4 0.6 0.8 1.0 VSD, Body Diode Forward Voltage [V] Figure 7. Reverse Drain Current Variation with Diode Forward Voltage and Temperature (c) 2010 Fairchild Semiconductor Corporation BSS138K Rev. 1.3.0 www.fairchildsemi.com 4 BSS138K -- N-Channel Logic Level Enhancement Mode Field Effect Transistor Physical Dimensions SOT-23 0.95 2.920.20 3 1.40 1.30+0.20 -0.15 1 2.20 2 0.60 0.37 (0.29) 0.95 0.20 1.00 A B 1.90 1.90 LAND PATTERN RECOMMENDATION SEE DETAIL A 1.20 MAX 0.10 0.00 (0.93) 0.10 C C 2.400.30 NOTES: UNLESS OTHERWISE SPECIFIED GAGE PLANE 0.23 0.08 A) REFERENCE JEDEC REGISTRATION TO-236, VARIATION AB, ISSUE H. B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS ARE INCLUSIVE OF BURRS, MOLD FLASH AND TIE BAR EXTRUSIONS. D) DIMENSIONING AND TOLERANCING PER ASME Y14.5M - 1994. E) DRAWING FILE NAME: MA03DREV10 0.25 0.20 MIN (0.55) SEATING PLANE SCALE: 2X Figure 8. 3LEAD, SOT23, JEDEC TO-236, LOW PROFILE (ACTIVE) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. For current tape and reel specifications, visit Fairchild Semiconductor's online packaging area: http://www.fairchildsemi.com/packaging/tr/SOT23-3L_tr.pdf. (c) 2010 Fairchild Semiconductor Corporation BSS138K Rev. 1.3.0 www.fairchildsemi.com 5 TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. 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