2011-2013 Microchip Technology Inc. DS22276B-page 1
MCP1754/MCP1754S
Features
• High PSRR: >70 dB @ 1 kHz typical
• 56.0 µA Typical Quiescent Current
• Input Operating Voltage Range: 3.6V to16.0V
• 150 mA Output Current for All Output Voltages
• Low Drop Out Voltage, 300 mV Typical @
150 mA
• 0.4% Typical Output Voltage Tolerance
• Standard Output Voltage Options (1.8V, 2.5V,
2.8V, 3.0V, 3.3V, 4.0V, 5.0V)
• Output Voltage Range 1.8V to 5.5V in 0.1V
Increments (tighter increments also possible per
design)
• Output Voltage Tolerances of ±2.0% Over Entire
Temperature Range
• Stable with Minimum 1.0 µF Output Capacitance
• Power Good Output
• Shutdown Input
• True Current Foldback Protection
• Short-Circuit Protection
• Overtemperature Protection
Applications
• Battery-Powered Devices
• Battery-Powered Alarm Circuits
• Smoke Detectors
•CO
2 Detectors
• Pagers and Cellular Phones
• Smart Battery Packs
•PDAs
• Digital Cameras
• Microcontroller Power
• Consumer Products
• Battery-Powered Data Loggers
Related Literature
• AN765, “Using Microchip’s Micropower LDOs”,
DS00765, Microchip Technology Inc., 2007
• AN766, “Pin-Compatible CMOS Upgrades to
BiPolar LDOs”, DS00766,
Microchip Technology Inc., 2003
• AN792, “A Method to Determine How Much
Power a SOT23 Can Dissipate in an Application”,
DS00792, Microchip Technology Inc., 2001
Description
The MCP1754/MCP1754S is a family of CMOS low
dropout (LDO) voltage regulators that can deliver up to
150 mA of current while consuming only 56.0 µA of
quiescent current (typical). The input operating range is
specified from 3.6V to 16.0V, making it an ideal choice
for four to six primary cell battery-powered applications,
12V mobile applications and one to three-cell Li-Ion-
powered applications.
The MCP1754/MCP1754S is capable of delivering
150 mA with only 300 mV (typical) of input to output
voltage differential. The output voltage tolerance of the
MCP1754/MCP1754S is typically ±0.2% at +25°C and
±2.0% maximum over the operating junction
temperature range of -40°C to +125°C. Line regulation
is ±0.01% typical at +25°C.
Output voltages available for the MCP1754/MCP1754S
range from 1.8V to 5.5V. The LDO output is stable when
using only 1 µF of output capacitance. Ceramic,
tantalum or aluminum electrolytic capacitors may all be
used for input and output. Overcurrent limit and
overtemperature shutdown provide a robust solution for
any application.
The MCP1754/MCP1754S family introduces a true
current foldback feature. When the load impedance
decreases beyond the MCP1754/MCP1754S load
rating, the output current and voltage will gracefully
foldback towards 30 mA at about 0V output. When the
load impedance decreases and returns to the rated
load, the MCP1754/MCP1754S follows the same
foldback curve as the device comes out of current
foldback.
Package options for the MCP1754S include the SOT-
23A, SOT-89-3, SOT-223-3 and 2x3 DFN-8.
Package options for the MCP1754 include the SOT-23-
5, SOT-223-5, and 2x3 DFN-8.
150 mA, 16V, High Performance LDO
MCP1754/MCP1754S
DS22276B-page 2 2011-2013 Microchip Technology Inc.
Package Types - MCP1754S
Package Types - MCP1754
1
3
2
VIN
GND VOUT
123
VIN GND VOUT
3-Pin SOT-23A 3-Pin SOT-89
GND
Tab is connected to GND
8-Lead 2X3 DFN(*)
123
SOT-223-3
4
GND
VIN VOUT
GND
2
NC
NC
GND
NC
NC
1
2
3
4
8
7
6
5NC
VIN
VOUT
EP
9
* Includes Exposed Thermal Pad (EP); see Ta ble 3-2.
(Note: The 3-lead SOT-223 (DB) is not a
standard package for output voltages
below 3.0V)
12
SOT23-5
12 3
SOT-223-5
45
PIN FUNCTION
1 /SHDN
5 PWRGD
3 GND
4 VOUT
2 VIN
4
3
5
PIN FUNCTION
4 PWRGD
2 GND
1 VIN
5 VOUT
3 /SHDN
Tab is connected to GND
8-Lead 2X3 DFN(*)
3
NC
PWRGD
GND
NC
NC
1
2
3
4
8
7
6
5SHDN
VIN
VOUT
EP
9
* Includes Exposed Thermal Pad (EP); see Table 3-1.
2011-2013 Microchip Technology Inc. DS22276B-page 3
MCP1754/MCP1754S
Functional Block Diagrams
+
-
MCP1754S
VIN VOUT
GND
+VIN
Error Amplifier
Voltage
Reference
Over Current
Over Temperature
MCP1754/MCP1754S
DS22276B-page 4 2011-2013 Microchip Technology Inc.
Typical Application Circuits
EA
+
–
VOUT
PMOS
Rf
Cf
ISNS
Overtemperature
VREF
Comp
92% of VREF
TDELAY
VIN
Driver w/limit
and SHDN
GND
Soft-Start
Sense
Undervoltage
Lock Out
VIN
Reference
SHDN
SHDN
SHDN
Sensing
(UVLO)
PWRGD
MCP1754
MCP1754S
CIN
1 µF Ceramic
COUT
1 µF Ceramic
VOUT
5.0V
IOUT
30 mA
VIN
VOUT
12V
+
GND
2011-2013 Microchip Technology Inc. DS22276B-page 5
MCP1754/MCP1754S
1.0 ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings †
Input Voltage, VIN..................................................................+17.6V
VIN, PWRGD, SHDN ..................... (GND-0.3V) to (VIN+0.3V)
VOUT .................................................. (GND-0.3V) to (+5.5V)
Internal Power Dissipation ............ Internally-Limited (Note 6)
Output Short Circuit Current ................................. Continuous
Storage temperature .....................................-55°C to +150°C
Maximum Junction Temperature.....................165°C (Note 7)
Operating Junction Temperature...................-40°C to +150°C
ESD protection on all pins kV HBM and 200V MM
† Notice: Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied.
Exposure to maximum rating conditions for extended periods
may affect device reliability.
AC/DC CHARACTERISTICS
Electrical Specifications: Unless otherwise specified, all limits are established for VIN = VR + 1V, Note 1, ILOAD = 1 mA, COUT =
1µF (X7R), C
IN = 1 µF (X7R), TA = 25°C, tr(VIN) = 0.5V/µs, SHDN = VIN, PWRGD = 10K to VOUT
.
Boldface type applies for junction temperatures, TJ (Note 7) of -40°C to +125°C.
Parameters Sym Min Typ Max Units Conditions
Input / Output Characteristics
Input Operating Voltage VIN 3.6 —16.0 V
Output Voltage Operating
Range
VOUT-RANGE 1.8 —5.5 V
Input Quiescent Current Iq—56 90 µA IL = 0 mA
Input Quiescent Current for
SHDN mode
ISHDN —0.1 5µA SHDN = GND
Ground Current IGND — 150 250 µA ILOAD = 150 mA
Maximum Output Current IOUT 150 ——mA
Output Soft Current
Limit
IOUT_SCL — 250 — mA VIN = VIN(MIN), VOUT 0.1V,
Current measured 10 ms after load
is applied
Output Pulse Current
Limit
IOUT_PCL — 250 — mA Pulse Duration < 100 ms, Duty
Cycle < 50%, VOUT 0.1V, Note 6
Output Short Circuit
Foldback Current
IOUT_SC —30 — mAV
IN = VIN(MIN), VOUT = GND
Output Voltage Overshoot on
Startup
VOVER —0.5 —%V
OUT VIN = 0 to 16V, ILOAD = 150 mA
Output Voltage Regulation VOUT VR-2.0% VR±0.2% VR+2.0% VNote 2
VOUT Temperature
Coefficient
TCVOUT — 22 ppm/°C Note 3
Note 1: The minimum VIN must meet two conditions: VIN3.6V and VIN VR + VDROPOUT(MAX).
2: VR is the nominal regulator output voltage when the input voltage VIN = VRated + VDROPOUT(MAX) or ViIN = 3.6V (which-
ever is greater); IOUT = 1 mA.
3: TCVOUT = (VOUT-HIGH - VOUT-LOW) *106 / (VR * Temperature), VOUT-HIGH = highest voltage measured over the
temperature range. VOUT-LOW = lowest voltage measured over the temperature range.
4: Load regulation is measured at a constant junction temperature using low duty cycle pulse testing. Changes in output
voltage due to heating effects are determined using thermal regulation specification TCVOUT
.
5: Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below the output volt-
age value that was measured with an applied input voltage of VIN = VR + 1V or VIN = 3.6V (whichever is greater).
6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction to air (i.e., TA, TJ, JA). Exceeding the maximum allowable power
dissipation causes the device operating junction temperature to exceed the maximum 150°C rating. Sustained junc-
tion temperatures above 150°C can impact the device reliability.
7: The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the
desired junction temperature. The test time is small enough such that the rise in the junction temperature over the
ambient temperature is not significant.
MCP1754/MCP1754S
DS22276B-page 6 2011-2013 Microchip Technology Inc.
Line Regulation VOUT/(VOUT-
XVIN)
-0.05 ±0.01 +0.05 %/V VR + 1V VIN 16V
Load Regulation VOUT/VOUT -1.1 -0.4 0%I
L = 1.0 mA to 150 mA, Note 4
Dropout Voltage (Note 5)V
DROPOUT — 300 500 mV IL = 150 mA
Dropout Current IDO —50 85 µA VIN = 0.95VR, IOUT = 0 mA
Undervoltage Lockout
Undervoltage Lockout UVLO — 2.95 — V Rising VIN
Undervoltage Lockout Hyster-
esis
UVLOHYS — 285 — mV Falling VIN
Shutdown Input
Logic High Input VSHDN-HIGH 2.4 —V
IN(MAX) V
Logic Low Input VSHDN-LOW 0.0 — 0.8 V
Shutdown Input Leakage
Current
SHDNILK —
—
0.100
0.500
0.500
2.0
µA SHDN = GND
SHDN = 16V
Power Good Output
PWRGD Input Voltage Oper-
ating Range
VPWRGD_VIN 1.7 —V
IN VI
SINK = 1 mA
PWRGD Threshold Voltage
(Referenced to VOUT)
VPWRGD_TH 90 92 94 %VOUT Falling Edge of VOUT
PWRGD Threshold
Hysteresis
VPWRGD_HYS —2.0 —%V
OUT Rising Edge of VOUT
PWRGD Output Voltage Low VPWRGD_L —0.20.6 VI
PWRGD_SINK = 5.0 mA,
VOUT = 0V
PWRGD Output Sink
Current
IPWRGD_L 5.0 ——mAV
PWRGD 0.4V
PWRGD Leakage Current IPWRGD_LK —40700 nA VPWRGD Pullup = 10 K to VIN, VIN
= 16V
PWRGD Time Delay TPG — 100 — µs Rising Edge of VOUT
,
RPULLUP = 10 k
Detect Threshold to PWRGD
Active Time Delay
TVDET_PWRGD — 200 — µs Falling Edge of VOUT after
Transition from
VOUT = VPRWRGD_TH + 50 mV, to
VPWRGD_TH - 50 mV,
RPULLUP = 10k to VIN
AC Performance
AC/DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise specified, all limits are established for VIN = VR + 1V, Note 1, ILOAD = 1 mA, COUT =
1µF (X7R), C
IN = 1 µF (X7R), TA = 25°C, tr(VIN) = 0.5V/µs, SHDN = VIN, PWRGD = 10K to VOUT
.
Boldface type applies for junction temperatures, TJ (Note 7) of -40°C to +125°C.
Parameters Sym Min Typ Max Units Conditions
Note 1: The minimum VIN must meet two conditions: VIN3.6V and VIN VR + VDROPOUT(MAX).
2: VR is the nominal regulator output voltage when the input voltage VIN = VRated + VDROPOUT(MAX) or ViIN = 3.6V (which-
ever is greater); IOUT = 1 mA.
3: TCVOUT = (VOUT-HIGH - VOUT-LOW) *106 / (VR * Temperature), VOUT-HIGH = highest voltage measured over the
temperature range. VOUT-LOW = lowest voltage measured over the temperature range.
4: Load regulation is measured at a constant junction temperature using low duty cycle pulse testing. Changes in output
voltage due to heating effects are determined using thermal regulation specification TCVOUT
.
5: Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below the output volt-
age value that was measured with an applied input voltage of VIN = VR + 1V or VIN = 3.6V (whichever is greater).
6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction to air (i.e., TA, TJ, JA). Exceeding the maximum allowable power
dissipation causes the device operating junction temperature to exceed the maximum 150°C rating. Sustained junc-
tion temperatures above 150°C can impact the device reliability.
7: The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the
desired junction temperature. The test time is small enough such that the rise in the junction temperature over the
ambient temperature is not significant.
2011-2013 Microchip Technology Inc. DS22276B-page 7
MCP1754/MCP1754S
Output Delay From VIN To
VOUT = 90% VREG
TDELAY — 240 — µs VIN = 0V to 16V, VOUT = 90% VR,
tr (VIN)= 5V/µs,
COUT = 1 µF, SHDN = VIN
Output Delay From VIN To
VOUT > 0.1V
TDELAY_START —80 — µsV
IN = 0V to 16V, VOUT 0.1V,
tr (VIN)= 5V/µs,
COUT = 1 µF, SHDN = VIN
Output Delay From SHDN
to VOUT = 90% VREG
TDELAY_SHDN — 160 — µs VIN = 16V, VOUT = 90% VR,
COUT = 1 µF, SHDN = GND to VIN
Output Noise eN—3 —µV/(Hz)
1/2 IL = 50 mA, f = 1 kHz,
COUT = 1 µF
Power Supply Ripple Rejec-
tion Ratio
PSRR — 72 — dB VR = 5V, f = 1 kHz, IL = 150 mA,
VINAC = 1V pk-pk, CIN = 0 µF,
VIN = VR + 1.5V
Thermal Shutdown
Temperature
TSD — 150 — °C Note 6
Thermal Shutdown
Hysteresis
TSD — 10 — °C
AC/DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise specified, all limits are established for VIN = VR + 1V, Note 1, ILOAD = 1 mA, COUT =
1µF (X7R), C
IN = 1 µF (X7R), TA = 25°C, tr(VIN) = 0.5V/µs, SHDN = VIN, PWRGD = 10K to VOUT
.
Boldface type applies for junction temperatures, TJ (Note 7) of -40°C to +125°C.
Parameters Sym Min Typ Max Units Conditions
Note 1: The minimum VIN must meet two conditions: VIN3.6V and VIN VR + VDROPOUT(MAX).
2: VR is the nominal regulator output voltage when the input voltage VIN = VRated + VDROPOUT(MAX) or ViIN = 3.6V (which-
ever is greater); IOUT = 1 mA.
3: TCVOUT = (VOUT-HIGH - VOUT-LOW) *106 / (VR * Temperature), VOUT-HIGH = highest voltage measured over the
temperature range. VOUT-LOW = lowest voltage measured over the temperature range.
4: Load regulation is measured at a constant junction temperature using low duty cycle pulse testing. Changes in output
voltage due to heating effects are determined using thermal regulation specification TCVOUT
.
5: Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below the output volt-
age value that was measured with an applied input voltage of VIN = VR + 1V or VIN = 3.6V (whichever is greater).
6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction to air (i.e., TA, TJ, JA). Exceeding the maximum allowable power
dissipation causes the device operating junction temperature to exceed the maximum 150°C rating. Sustained junc-
tion temperatures above 150°C can impact the device reliability.
7: The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the
desired junction temperature. The test time is small enough such that the rise in the junction temperature over the
ambient temperature is not significant.
MCP1754/MCP1754S
DS22276B-page 8 2011-2013 Microchip Technology Inc.
TEMPERATURE SPECIFICATIONS (Note 1)
Parameters Sym Min Typ Max Units Conditions
Temperature Ranges
Specified Temperature Range TA-40 +125 °C
Operating Temperature Range TJ-40 +150 °C
Storage Temperature Range TA-55 +150 °C
Thermal Package Resistance
Thermal Resistance, SOT-223-3 JA
JC
—
—
62
15
—
—
°C/W
Thermal Resistance, SOT-223-5 JA
JC
—
—
62
15
—
—
°C/W
Thermal Resistance, SOT-23A-3 JA
JC
—
—
336
110
—
—
°C/W
Thermal Resistance, SOT-89-3 JA
JC
—
—
153.3
100
—
—
°C/W
Thermal Resistance, 2X3 DFN JA
JC
—
—
93
26
—
—
°C/W
Note 1: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction to air (i.e., TA, TJ, JA). Exceeding the maximum allowable power
dissipation causes the device operating junction temperature to exceed the maximum 150°C rating. Sustained junction
temperatures above 150°C can impact the device reliability.
2011-2013 Microchip Technology Inc. DS22276B-page 9
MCP1754/MCP1754S
2.0 TYPICAL PERFORMANCE CURVES
Note: Unless otherwise indicated VR = 3.3V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 1 mA, TA = +25 °C,
VIN = VR + 1V or VIN = 3.6V (whichever is greater), SHDN = VIN, package = SOT223.
Note: Junction Temperature (TJ) is approximated by soaking the device under test to an ambient temperature equal to the
desired junction temperature. The test time is small enough such that the rise in junction temperature over the ambient
temperature is not significant.
FIGURE 2-1: Quiescent Current vs. Input
Voltage.
FIGURE 2-2: Quiescent Current vs. Input
Voltage.
FIGURE 2-3: Quiescent Current vs. Input
Voltage.
FIGURE 2-4: Ground Current vs. Load
Current.
FIGURE 2-5: Quiescent Current vs.
Junction Temperature.
FIGURE 2-6: Quiescent Current vs. Input
Voltage.
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
40
50
60
70
80
3456789101112131415
16
Quiescent Current (µA)
Input Voltage (V)
VOUT = 1.8V
IOUT = 0 µA
+25°C
+130°C
-45°C
0°C
+90°C
40
45
50
55
60
65
70
3579111315
Quiescent Current (µA)
Input Voltage (V)
VOUT = 3.3V
IOUT = 0 µA
+25°C
+130°C
-45°C
0°C
+90°C
0
10
20
30
40
50
60
70
80
1.0 3.0 5.0 7.0 9.0 11.0 13.0 15.0
17.0
Quiescent Current (µA)
Input Voltage (V)
V
OUT
= 5.0V
IOUT
= 0 µA
+25°C
+130°C
-45°C
0°C
+90°C
40
60
80
100
120
140
160
180
0 20 40 60 80 100 120 140
160
GND Current (µA)
Load Current (mA)
VOUT = 5.0V
VOUT = 3.3V
VOUT = 1.8V
0
10
20
30
40
50
60
70
80
-45 -20 5 30 55 80 105
130
Quiescent Current (µA)
Junction Temperature (°C)
VOUT = 5.0V VOUT = 1.8V
VOUT = 3.3V
0
10
20
30
40
50
60
70
80
0
24681012141618
Quiescent Current (µA)
Input Voltage (V)
V
OUT
= 5.0V
+25°C
MCP1754/MCP1754S
DS22276B-page 10 2011-2013 Microchip Technology Inc.
Note: Unless otherwise indicated VR = 3.3V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 1 mA, TA = +25 °C,
VIN = VR + 1V or VIN = 3.6V (whichever is greater), SHDN = VIN, package = SOT223.
FIGURE 2-7: Output Voltage vs. Input
Voltage.
FIGURE 2-8: Output Voltage vs. Input
Voltage.
FIGURE 2-9: Output Voltage vs. Input
Voltage.
FIGURE 2-10: Output Voltage vs. Load
Current.
FIGURE 2-11: Output Voltage vs. Load
Current.
FIGURE 2-12: Output Voltage vs. Load
Current.
1.800
1.802
1.804
1.806
1.808
1.810
1.812
1.814
3456789101112131415
16
Output Voltage (V)
Input Voltage (V)
VOUT = 1.8V
+25°C
+130°C
-45°C
0°C
+90°C
3.290
3.292
3.294
3.296
3.298
3.300
3.302
3.304
3.306
3.308
3.310
456789101112131415
16
Output Voltage (V)
Input Voltage (V)
VOUT = 3.3V
+25°C
+130°C
-45°C
0°C
+90°C
5.000
5.004
5.008
5.012
5.016
5.020
6 7 8 9 10 11 12 13 14 15
16
Output Voltage (V)
Input Voltage (V)
VOUT = 5.0V
+25°C
+130°C
-45°C
0°C
+90°C
1.790
1.795
1.800
1.805
1.810
1.815
0 25 50 75 100 125
150
Output Voltage (V)
Load Current (mA)
VOUT = 1.8V
25°C
90°C
130°C
0°C
-45°C
3.280
3.285
3.290
3.295
3.300
3.305
3.310
0 25 50 75 100 125
150
Output Voltage (V)
Load Current (mA)
VOUT = 3.3V
25°C90°C
0°C
-45°C
130°C
4.980
4.985
4.990
4.995
5.000
5.005
5.010
5.015
5.020
0 25 50 75 100 125
150
Output Voltage (V)
Load Current (mA)
VOUT = 5.0V
25°C
90°C
0°C
-45°C
130°C
2011-2013 Microchip Technology Inc. DS22276B-page 11
MCP1754/MCP1754S
Note: Unless otherwise indicated VR = 3.3V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 1 mA, TA = +25 °C,
VIN = VR + 1V or VIN = 3.6V (whichever is greater), SHDN = VIN, package = SOT223.
FIGURE 2-13: Dropout Voltage vs. Load
Current.
FIGURE 2-14: Dropout Voltage vs. Load
Current.
FIGURE 2-15: Dynamic Line Response.
FIGURE 2-16: Dynamic Line Response.
FIGURE 2-17: Short Circuit Current vs.
Input Voltage.
0.000
0.100
0.200
0.300
0.400
0.500
0 153045607590105120135
150
Dropout Voltage (V)
Load Current (mA)
VOUT = 3.3V
+25°C
+130°C
-45°C
0°C
+90°C
0.000
0.050
0.100
0.150
0.200
0.250
0.300
0.350
0.400
0 153045607590105120135
150
Dropout Voltage (V)
Load Current (mA)
VOUT = 3.3V
+25°C
+130°C
-45°C
0°C
+90°C
0
10
20
30
40
50
468101214
16
Short Circuit Current (mA)
Input Voltage (V)
VOUT = 3.3V
25°C
90°C
130°C
0°C
-45°C
MCP1754/MCP1754S
DS22276B-page 12 2011-2013 Microchip Technology Inc.
Note: Unless otherwise indicated VR = 3.3V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 1 mA, TA = +25 °C,
VIN = VR + 1V or VIN = 3.6V (whichever is greater), SHDN = VIN, package = SOT223.
FIGURE 2-18: Load Regulation vs.
Temperature.
FIGURE 2-19: Load Regulation vs.
Temperature.
FIGURE 2-20: Load Regulation vs.
Temperature.
FIGURE 2-21: Line Regulation vs.
Temperature.
FIGURE 2-22: Line Regulation vs.
Temperature.
FIGURE 2-23: Line Regulation vs.
Temperature.
-1.50
-1.40
-1.30
-1.20
-1.10
-1.00
-0.90
-0.80
-0.70
-0.60
-0.50
-45 -20 5 30 55 80 105
130
Load Regulation (%)
Temperature (°C)
VOUT=1.8V
Iout = 1 mA to 150 mA
VIN = 12V
VIN = 16V
VIN = 10V
VIN = 5V
VIN = 3.6V
-1.00
-0.80
-0.60
-0.40
-0.20
0.00
-45 -20 5 30 55 80 105
130
Load Regulation (%)
Temperature (°C)
VOUT=3.3V
Iout = 1 mA to 150 mA
VIN = 16V
VIN = 5V
VIN = 10V
VIN = 12V
VIN = 4.3V
-1.00
-0.80
-0.60
-0.40
-0.20
0.00
-45 -20 5 30 55 80 105
130
Load Regulation (%)
Temperature (°C)
VOUT= 5V
Iout = 1 mA to 150 mA
VIN = 16V
VIN = 6V
VIN = 10V
VIN = 12V
-0.03
-0.02
-0.01
0.00
0.01
-45 -20 5 30 55 80 105
130
Line Regulation (%/V)
Temperature (°C)
VOUT=1.8V
150 mA
0 mA
50 mA
100 mA
10 mA
-0.03
-0.02
-0.01
0.00
0.01
-45 -20 5 30 55 80 105
130
Line Regulation (%/V)
Temperature (°C)
VOUT=3.3V
150 mA
0 mA
50 mA
100 mA
10 mA
-0.03
-0.02
-0.01
0.00
0.01
-45 -20 5 30 55 80 105
130
Line Regulation (%/V)
Temperature (°C)
VOUT=5V
150 mA
0 mA
50 mA
100 mA
10 mA
2011-2013 Microchip Technology Inc. DS22276B-page 13
MCP1754/MCP1754S
Note: Unless otherwise indicated VR = 3.3V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 1 mA, TA = +25 °C,
VIN = VR + 1V or VIN = 3.6V (whichever is greater), SHDN = VIN, package = SOT223.
FIGURE 2-24: Power Supply Ripple
Rejection vs. Frequency.
FIGURE 2-25: Power Supply Ripple
Rejection vs. Frequency.
FIGURE 2-26: Output Noise vs. Frequency
(3 lines, VR = 1.2V, 3.3V, 5.0V).
FIGURE 2-27: Power Up Timing.
FIGURE 2-28: Startup From Shutdown.
FIGURE 2-29: Short Circuit Current
Foldback.
0.00
0.25
0.50
0.75
1.00
1.25
1.50
1.75
2.00
0.00 0.05 0.10 0.15 0.20 0.25
0.30
Output Voltage (V)
Output Current (A)
Increasing Load
Decreasing Load
VIN = 3.6V
VOUT = 1.8V
MCP1754/MCP1754S
DS22276B-page 14 2011-2013 Microchip Technology Inc.
Note: Unless otherwise indicated VR = 3.3V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 1 mA, TA = +25 °C,
VIN = VR + 1V or VIN = 3.6V (whichever is greater), SHDN = VIN, package = SOT223.
FIGURE 2-30: Short Circuit Current
Foldback.
FIGURE 2-31: Short Circuit Current
Foldback.
FIGURE 2-32: Dynamic Load Response.
FIGURE 2-33: Dynamic Load Response.
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
0.00 0.05 0.10 0.15 0.20 0.25
0.30
Output Voltage (V)
Output Current (A)
Increasing Load
Decreasing Load
VIN = 4.3V
VOUT = 3.3V
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
0.00 0.05 0.10 0.15 0.20 0.25
0.30
Output Voltage (V)
Output Current (A)
Increasing Load
Decreasing Load
VIN = 6V
VOUT = 5V
2011-2013 Microchip Technology Inc. DS22276B-page 15
MCP1754/MCP1754S
3.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1 and Table 3-2.
3.1 Ground Terminal (GND)
Regulator ground. Tie GND to the negative side of the
output and the negative side of the input capacitor.
Only the LDO bias current flows out of this pin; there is
no high current. The LDO output regulation is
referenced to this pin. Minimize the voltage drops
between this pin and the negative side of the load.
3.2 Regulated Output Voltage (VOUT)
Connect VOUT to the positive side of the load and the
positive terminal of the output capacitor. The positive
side of the output capacitor should be physically
located as close to the LDO VOUT pin as is practical.
The current flowing out of this pin is equal to the DC
load current.
3.3 Unregulated Input Voltage (VIN)
Connect VIN to the input unregulated source voltage.
Like all low dropout linear regulators, low source
impedance is necessary for the stable operation of the
LDO. The amount of capacitance required to ensure
low source impedance depends on the proximity of the
input source capacitors or battery type. For most
applications, 1 µF of capacitance ensures stable
operation of the LDO circuit. The input capacitor should
have a capacitance value equal to or larger than the
output capacitor for performance applications. The
input capacitor supplies the load current during
transients and improves performance. For applications
that have load currents below 10 mA, the input
capacitance requirement can be lowered. The type of
capacitor used may be ceramic, tantalum or aluminum
electrolytic. The low ESR characteristics of the ceramic
yields better noise and PSRR performance at high
frequency.
TABLE 3-1: MCP1754 PIN FUNCTION TABLE
Pin No.
SOT223-5
Pin No.
SOT23-5
Pin No.
2X3 DFN Name Function
3 2 4 GND Ground Terminal
451V
OUT Regulated Voltage Output
218V
IN Unregulated Supply Voltage
——3,6,7 NC No Connection
5 4 2 PWRGD Open Drain Power Good Output
135SHDN
Shutdown Input
EP —EP GND Exposed Pad, Connected to GND
TABLE 3-2: MCP1754S PIN FUNCTION TABLE
Pin No.
SOT223-3
Pin No.
SOT23A
Pin No.
SOT89
Pin No.
2X3 DFN Name Function
2124GNDGround Terminal
3231V
OUT Regulated Voltage Output
1318V
IN Unregulated Supply Voltage
———2,3,5,6,7 NC No Connection
EP —EP EP GND Exposed Pad, Connected to GND
MCP1754/MCP1754S
DS22276B-page 16 2011-2013 Microchip Technology Inc.
3.4 Shutdown Input (SHDN)
The SHDN input is used to turn the LDO output voltage
on and off. When the SHDN input is at a logic high
level, the LDO output voltage is enabled. When the
SHDN input is pulled to a logic low level, the LDO
output voltage is disabled. When the SHDN input is
pulled low, the PWRGD output also goes low and the
LDO enters a low quiescent current shutdown state.
3.5 Power Good Output (PWRGD)
The PWRGD output is an open-drain output used to
indicate when the LDO output voltage is within 92%
(typically) of its nominal regulation value. The PWRGD
threshold has a typical hysteresis value of 2%. The
PWRGD output is delayed by 100 µs (typical) from the
time the LDO output is within 92% + 2% (typical
hysteresis) of the regulated output value on power-up.
This delay time is internally fixed. The PWRGD pin may
be pulled up to VIN or VOUT
. Pulling up to VOUT
conserves power when the device is in shutdown (/
SHDN = 0V) mode.
3.6 Exposed Pad (EP)
Some of the packages have an exposed metal pad on
the bottom of the package. The exposed metal pad
gives the device better thermal characteristics by
providing a good thermal path to either the PCB or heat
sink to remove heat from the device. The exposed pad
of the package is internally connected to GND.
2011-2013 Microchip Technology Inc. DS22276B-page 17
MCP1754/MCP1754S
4.0 DEVICE OVERVIEW
The MCP1754/MCP1754S is a 150 mA output current,
Low Dropout (LDO) voltage regulator. The low dropout
voltage of 300 mV typical at 150 mA of current makes
it ideal for battery-powered applications. The input
voltage range is 3.6V to 16.0V. Unlike other high output
current LDOs, the MCP1754/MCP1754S typically
draws only 150 µA of quiescent current for a 150 mA
load. The MCP1754 adds a shutdown control input pin
and a power good output pin. The output voltage
options are fixed.
4.1 LDO Output Voltage
The MCP1754/MCP1754S LDO has a fixed output
voltage. The output voltage range is 1.8V to 5.5V.
4.2 Output Current and Current
Limiting
The MCP1754/MCP1754S LDO is tested and ensured
to supply a minimum of 150 mA of output current. The
MCP1754/MCP1754S has no minimum output load, so
the output load current can go to 0 mA and the LDO will
continue to regulate the output voltage to within
tolerance.
The MCP1754/MCP1754S also incorporates a true
output current foldback. If the output load presents an
excessive load due to a low impedance short circuit
condition, the output current and voltage will fold back
towards 30 mA and 0V respectively.
The output voltage and current resume normal levels
when the excessive load is removed. If the overload
condition is a soft overload, the MCP1754/MCP1754S
supplies higher load currents of up to typically 250 mA.
This allows for device usage in applications that have
pulsed load currents having an average output current
value of 150 mA or less.
Output overload conditions may also result in an over-
temperature shutdown of the device. If the junction
temperature rises above 150°C (typical), the LDO
shuts down the output. See Section 4.8
“Overtemperature Protection” for more information
on overtemperature shutdown.
4.3 Output Capacitor
The MCP1754/MCP1754S requires a minimum output
capacitance of 1 µF for output voltage stability.
Ceramic capacitors are recommended because of their
size, cost and environmentally robust qualities.
Aluminum-electrolytic and tantalum capacitors can be
used on the LDO output as well. The Equivalent Series
Resistance (ESR) of the electrolytic output capacitor
should be no greater than 2.0 . The output capacitor
should be located as close to the LDO output as is
practical. Ceramic materials X7R and X5R have low
temperature coefficients and are well within the
acceptable ESR range required. A typical 1 µF X7R
0805 capacitor has an ESR of 50 milliohms.
Larger LDO output capacitors are used with the
MCP1754/MCP1754S to improve dynamic
performance and power supply ripple rejection
performance. A maximum of 1000 µF is
recommended. Aluminum-electrolytic capacitors are
not recommended for low temperature applications of
< -25°C.
FIGURE 4-1: Typical Current Foldback.
2
3
4
5
6
V
OUT (V)
Typical Current FoldBack - 5V Output
Increasing Load Decreasing Load
0
1
2
0.000 0.050 0.100 0.150 0.200 0.250
V
IOUT (A)
MCP1754/MCP1754S
DS22276B-page 18 2011-2013 Microchip Technology Inc.
4.4 Input Capacitor
Low input source impedance is necessary for the LDO
output to operate properly. When operating from
batteries or in applications with long lead length (>
10 inches) between the input source and the LDO,
some input capacitance is recommended. A minimum
of 1.0 µF to 4.7 µF is recommended for most
applications.
For applications that have output step load
requirements, the input capacitance of the LDO is very
important. The input capacitance provides the LDO
with a good local low-impedance source to pull the
transient currents from in order to respond quickly to
the output load step. For good step response
performance, the input capacitor should be of
equivalent or higher value than the output capacitor.
The capacitor should be placed as close to the input of
the LDO as is practical. Larger input capacitors also
help reduce any high-frequency noise on the input and
output of the LDO and reduce the effects of any
inductance that exists between the input source
voltage and the input capacitance of the LDO.
4.5 Power Good Output (PWRGD)
The open drain PWRGD output is used to indicate
when the output voltage of the LDO is within 94%
(typical value, see Section 1.0 “Electrical
Characteristics” for minimum and maximum
specifications) of its nominal regulation value.
As the output voltage of the LDO rises, the open drain
PWRGD output is actively held low until the output
voltage has exceeded the power good threshold plus
the hysteresis value. Once this threshold has been
exceeded, the power good time delay is started (shown
as TPG in the Electrical Characteristics table). The
power good time delay is fixed at 100 µs (typical). After
the time delay period, the PWRGD open drain output
becomes inactive and may be pulled high by an
external pull-up resistor, indicating that the output
voltage is stable and within regulation limits. The power
good output is typically pulled up to VIN or VOUT
. Pulling
the signal up to VOUT conserves power during
Shutdown mode.
If the output voltage of the LDO falls below the power
good threshold, the power good output will transition
low. The power good circuitry has a 200 µs delay when
detecting a falling output voltage, which helps to
increase noise immunity and avoid false triggering of
the power good output during fast output transients.
See Figure 4-2 for power good timing characteristics.
When the LDO is put into Shutdown mode using the
SHDN input, the power good output is pulled low
immediately, indicating that the output voltage is out of
regulation. The timing diagram for the power good out-
put when using the shutdown input is shown in
Figure 4-3.
The power good output is an open-drain output that can
be pulled up to any voltage equal to or less than the
LDO input voltage. This output is capable of sinking
5mA (V
PWRGD < 0.4V).
FIGURE 4-2: Power Good Timing.
FIGURE 4-3: Power Good Timing from
Shutdown.
4.6 Shutdown Input (SHDN)
The SHDN input is an active-low input signal that turns
the LDO on and off. The SHDN threshold is a fixed
voltage level. The minimum value of this shutdown
threshold required to turn the output ON is 2.4V. The
maximum value required to turn the output OFF is 0.8V.
TPG
TVDET_PWRGD
VPWRGD_TH
VOUT
PWRGD
VOL
VOH
VIN
SHDN
VOUT
TDELAY_SHDN
PWRGD
TPG
2011-2013 Microchip Technology Inc. DS22276B-page 19
MCP1754/MCP1754S
The SHDN input ignores low going pulses (pulses
meant to shut down the LDO) that are up to 400 ns in
pulse width. If the shutdown input is pulled low for more
than 400 ns, the LDO enters Shutdown mode. This
small bit of filtering helps to reject any system noise
spikes on the shutdown input signal.
On the rising edge of the SHDN input, the shutdown
circuitry has a 70 µs delay before allowing the LDO
output to turn on. This delay helps to reject any false
turn-on signals or noise on the SHDN input signal. After
the 70 µs delay, the LDO output enters its soft-start
period as it rises from 0V to its final regulation value. If
the SHDN input signal is pulled low during the 70 µs
delay period, the timer resets and the delay time starts
over again on the next rising edge of the SHDN input.
The total time from the SHDN input going high (turn-on)
to the LDO output being in regulation is typically
160 µs. See Figure 4-4 for a timing diagram of the
SHDN input.
FIGURE 4-4: Shutdown Input Timing
Diagram.
4.7 Dropout Voltage and
Undervoltage Lockout
Dropout voltage is defined as the input-to-output
voltage differential at which the output voltage drops
2% below the nominal value that was measured with a
VR + 1.0V differential applied. The MCP1754/
MCP1754S LDO has a very low dropout voltage
specification of 300 mV (typical) at 150 mA of output
current. See Section 1.0 “Electrical Characteristics”
for maximum dropout voltage specifications.
The MCP1754/MCP1754S LDO operates across an
input voltage range of 3.6V to 16.0V and incorporates
input Undervoltage Lockout (UVLO) circuitry that
keeps the LDO output voltage off until the input voltage
reaches a minimum of 2.95V (typical) on the rising
edge of the input voltage. As the input voltage falls, the
LDO output remains on until the input voltage level
reaches 2.70V (typical).
For high-current applications, voltage drops across the
PCB traces must be taken into account. The trace
resistances can cause significant voltage drops
between the input voltage source and the LDO. For
applications with input voltages near 3.0V, these PCB
trace voltage drops can sometimes lower the input
voltage enough to trigger a shutdown due to
undervoltage lockout.
4.8 Overtemperature Protection
The MCP1754/MCP1754S LDO has temperature-
sensing circuitry to prevent the junction temperature
from exceeding approximately 150°C. If the LDO
junction temperature does reach 150°C, the LDO
output is turned off until the junction temperature cools
to approximately 137°C, at which point the LDO output
automatically resumes normal operation. If the internal
power dissipation continues to be excessive, the
device will again shut off. The junction temperature of
the die is a function of power dissipation, ambient tem-
perature and package thermal resistance. See
Section 5.0 “Application Circuits & Issues” for
more information on LDO power dissipation and junc-
tion temperature.
SHDN
VOUT
70 µs 90 µs
TDELAY_SHDN
400 ns (typ)
MCP1754/MCP1754S
DS22276B-page 20 2011-2013 Microchip Technology Inc.
NOTES:
2011-2013 Microchip Technology Inc. DS22276B-page 21
MCP1754/MCP1754S
5.0 APPLICATION CIRCUITS &
ISSUES
5.1 Typical Application
The MCP1754/MCP1754S is most commonly used as
a voltage regulator. Its low quiescent current and low
dropout voltage make it ideal for many battery-powered
applications.
FIGURE 5-1: Typical Application Circuit.
5.1.1 APPLICATION INPUT CONDITIONS
5.2 Power Calculations
5.2.1 POWER DISSIPATION
The internal power dissipation of the MCP1754/
MCP1754S is a function of input voltage, output
voltage and output current. The power dissipation, as a
result of the quiescent current draw, is so low that it is
insignificant (56.0 µA x VIN). The following equation
can be used to calculate the internal power dissipation
of the LDO.
EQUATION
The maximum continuous operating junction
temperature specified for the MCP1754/MCP1754S is
+150°C. To estimate the internal junction temperature
of the MCP1754/MCP1754S, the total internal power
dissipation is multiplied by the thermal resistance from
junction to ambient (RJA). The thermal resistance from
junction to ambient for the SOT23A pin package is
estimated at 336 °C/W.
EQUATION
The maximum power dissipation capability of a pack-
age is calculated given the junction-to-ambient thermal
resistance and the maximum ambient temperature for
the application. The following equation can be used to
determine the package maximum internal power dis-
sipation.
EQUATION
EQUATION
EQUATION
Package Type = SOT23
Input Voltage Range = 3.6V to 4.8V
VIN maximum = 4.8V
VOUT typical = 1.8V
IOUT = 50 mA maximum
MCP1754S
GND
VOUT
VIN CIN
1µF Ceramic
COUT
1 µF Ceramic
VOUT
VIN
3.6V to 4.8V
1.8V
IOUT
50 mA
PLDO VIN MAX
VOUT MIN
–IOUT MAX
=
PLDO = LDO Pass device internal power dissipation
VIN(MAX) = Maximum input voltage
VOUT(MIN) = LDO minimum output voltage
TJMAX
PTOTAL RJA
TAMAX
+=
TJ(MAX) = Maximum continuous junction
temperature
PTOTAL = Total device power dissipation
RJA = Thermal resistance from junction to ambient
TA(MAX) = Maximum ambient temperature
PDMAX
TJMAX
TAMAX
–
RJA
---------------------------------------------------
=
PD(MAX) = Maximum device power dissipation
TJ(MAX) = Maximum continuous junction
temperature
TA(MAX) = Maximum ambient temperature
RJA = Thermal resistance from junction to ambient
TJRISE
PDMAX
RJA
=
TJ(RISE) = Rise in device junction temperature over
the ambient temperature
PD(MAX) = Maximum device power dissipation
RJA = Thermal resistance from junction to ambient
TJTJRISE
TA
+=
TJ = Junction Temperature
TJ(RISE) = Rise in device junction temperature over
the ambient temperature
TA = Ambient temperature
MCP1754/MCP1754S
DS22276B-page 22 2011-2013 Microchip Technology Inc.
5.3 Voltage Regulator
Internal power dissipation, junction temperature rise,
junction temperature and maximum power dissipation
are calculated in the following example. The power
dissipation, as a result of ground current, is small
enough to be neglected.
5.3.1 POWER DISSIPATION EXAMPLE
Device Junction Temperature Rise
The internal junction temperature rise is a function of
internal power dissipation and the thermal resistance
from junction to ambient for the application. The thermal
resistance from junction to ambient (RJA) is derived
from an EIA/JEDEC standard for measuring thermal
resistance for small surface mount packages. The EIA/
JEDEC specification is JESD51-7, “High Effective
Thermal Conductivity Test Board for Leaded Surface
Mount Packages”. The standard describes the test
method and board specifications for measuring the
thermal resistance from junction to ambient. The actual
thermal resistance for a particular application can vary
depending on many factors, such as copper area and
thickness. Refer to AN792, “A Method to Determine
How Much Power a SOT23 Can Dissipate in an
Application”, (DS00792), for more information regarding
this subject.
Junction Temperature Estimate
To estimate the internal junction temperature, the
calculated temperature rise is added to the ambient or
offset temperature. For this example, the worst-case
junction temperature is estimated as follows:
Maximum Package Power Dissipation Examples at
+40°C Ambient Temperature
5.4 Voltage Reference
The MCP1754/MCP1754S can be used not only as a
regulator, but also as a low quiescent current voltage
reference. In many microcontroller applications, the
initial accuracy of the reference can be calibrated using
production test equipment or by using a ratio
measurement. When the initial accuracy is calibrated,
the thermal stability and line regulation tolerance are
the only errors introduced by the MCP1754/
MCP1754S LDO. The low cost, low quiescent current
and small ceramic output capacitor are all advantages
when using the MCP1754/MCP1754S as a voltage
reference.
FIGURE 5-2: Using the MCP1754/MCP1754S
as a Voltage Reference.
5.5 Pulsed Load Applications
For some applications, there are pulsed load current
events that may exceed the specified 150 mA
maximum specification of the MCP1754/MCP1754S.
The internal current limit of the MCP1754/MCP1754S
prevents high peak load demands from causing non-
recoverable damage. The 150 mA rating is a maximum
Package
Package Type
=
SOT23
Input Voltage
VIN = 3.6V to 4.8V
LDO Output Voltages and Currents
VOUT =1.8V
IOUT =50mA
Maximum Ambient Temperature
TA(MAX) = +40°C
Internal Power Dissipation
Internal Power dissipation is the product of the LDO
output current multiplied by the voltage across the
LDO (VIN to VOUT).
PLDO(MAX) =(V
IN(MAX) - VOUT(MIN)) x IOUT(MAX)
PLDO = (4.8V - (0.97 x 1.8V)) x 50 mA
PLDO = 152.7 milli-Watts
TJ(RISE) =P
TOTAL x RJA
TJ(RISE) = 152.7 milliwatts x 336.0°C/Watt
TJ(RISE) = 51.3°C
TJ =T
J(RISE) + TA(MAX)
TJ = 91.3°C
SOT23 (336.0°C/Watt = RJA)
PD(MAX) = (125°C - 40°C) / 336°C/W
PD(MAX) = 253 milliwatts
SOT89 (153.3°C/Watt = RJA)
PD(MAX) = (125°C - 40°C) / 153.3°C/W
PD(MAX) = 554 milliwatts
PICmicro®
MCP1754S
GND
VIN
CIN
1µF COUT
1µF
Bridge Sensor
VOUT VREF
ADO
AD1
Ratio Metric Reference
56 µA Bias microcontroller
2011-2013 Microchip Technology Inc. DS22276B-page 23
MCP1754/MCP1754S
average continuous rating. As long as the average
current does not exceed 150 mA, pulsed higher load
currents can be applied to the MCP1754/MCP1754S.
The typical current limit for the MCP1754/MCP1754S is
250 mA (TA +25°C).
MCP1754/MCP1754S
DS22276B-page 24 2011-2013 Microchip Technology Inc.
NOTES:
2011-2013 Microchip Technology Inc. DS22276B-page 25
MCP1754/MCP1754S
6.0 PACKAGING INFORMATION
6.1 Package Marking Information
Legend: XX...X Customer-specific information
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available characters
for customer-specific information.
3
e
3
e
XXXXXXX
NNN
XXXYYWW
3-Lead SOT-223 (MCP1754S) Example:
1754S18
EDB1130
256
Part Number Code
MCP1754ST-3302E/DB 1754S33
MCP1754ST-5002E/DB 1754S50
3-Lead SOT-23A (MCP1754S) Example:
XXNN
NNN
3-Lead SOT-89 (MCP1754S) Example:
JC25
MT1130
256
Part Number Code
MCP1754ST-1802E/CB JCNN
MCP1754ST-3302E/CB JDNN
MCP1754ST-5002E/CB JENN
Part Number Code
MCP1754ST-1802E/MB MTYYWW
MCP1754ST-3302E/MB MUYYWW
MCP1754ST-5002E/MB MVYYWW
MCP1754/MCP1754S
DS22276B-page 26 2011-2013 Microchip Technology Inc.
Package Marking Information (Continued)
5-Lead SOT-23 (2x3)
(MCP1754)
Example:
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DS22276B-page 30 2011-2013 Microchip Technology Inc.
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2011-2013 Microchip Technology Inc. DS22276B-page 37
MCP1754/MCP1754S
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
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MCP1754/MCP1754S
DS22276B-page 38 2011-2013 Microchip Technology Inc.
NOTES:
2011-2013 Microchip Technology Inc. DS22276B-page 39
MCP1754/MCP1754S
APPENDIX A: REVISION HISTORY
Revision B (April 2013)
The following is the list of modifications:
1. Updated Note 5 in the AC/DC Characteristics
table.
2. Updated Figure 2-20.
3. Minor grammatical and spelling corrections.
Revision A (August 2011)
• Original data sheet for the MCP1754/MCP1754S
family of devices.
MCP1754/MCP1754S
DS22276B-page 40 2011-2013 Microchip Technology Inc.
NOTES:
2011-2013 Microchip Technology Inc. DS22276B-page 41
MCP1754/MCP1754S
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
MCP1754: 150 mA, 16V High Performance LDO
MCP1754T: 150 mA, 16V High Performance LDO
(Tape and Reel) (SOT)
MCP1754S: 150 mA, 16V High Performance LDO
MCP1754ST: 150 mA, 16V High Performance LDO
(Tape and Reel) (SOT)
Tape and Reel: T = Tape and Reel
Output Voltage*: 18 = 1.8V “Standard”
33 = 3.3V “Standard”
50 = 5.0V “Standard”
*Contact factory for other voltage options
Extra Feature Code: 0 = Fixed
Tolerance: 2 = 2% (Standard)
Temperature Range: E = -40°C to +125°C
Package: *DB = Plastic Small Outline, (SOT-223), 3-lead
CB = Plastic Small Outline, (SOT-23A), 3-lead
MB = Plastic Small Outline, (SOT-89), 3-lead
DC = Plastic Small Outline, (SOT223), 5-lead
OT = Plastic Small Outline, (SOT-23), 5-lead
MC = Plastic Dual Flat, No Lead, (2x3 DFN), 8-lead
*Note: The 3-lead SOT-223 (DB) is not a standard package
for output voltages below 3.0V
PART NO. X- XX
PackageTape
and Reel
Device
Examples:
a) MCP1754T-1802E/DC: 1.8V, 5LD SOT-223,
Tape and Reel
b) MCP1754T-3302E/DC: 3.3V, 5LD SOT-223,
Tape and Reel
c) MCP1754T-5002E/DC: 5.0V, 5LD SOT-223,
Tape and Reel
a) MCP1754T-1802E/CB: 1.8V, 3LD SOT-23A,
Tape and Reel
b) MCP1754T-3302E/CB: 3.3V, 3LD SOT-23A,
Tape and Reel
c) MCP1754T-5002E/CB: 5.0V, 3LD SOT-23A,
Tape and Reel
a) MCP1754T-1802E/MB: 1.8V, 3LD SOT-89,
Tape and Reel
b) MCP1754T-3302E/MB: 3.3V, 3LD SOT-89,
Tape and Reel
c) MCP1754T-5002E/MB: 5.0V, 3LD SOT-89,
Tape and Reel
a) MCP1754T-1802E/OT: 1.8V, 5LD SOT-23,
Tape and Reel
b) MCP1754T-3302E/OT: 3.3V, 5LD SOT-23,
Tape and Reel
c) MCP1754T-5002E/OT: 5.0V, 5LD SOT-23,
Tape and Reel
a) MCP1754T-1802E/MC: 1.8V, 8LD DFN,
Tape and Reel
b) MCP1754T-3302E/MC: 3.3V, 8LD DFN,
Tape and Reel
c) MCP1754T-5002E/MC: 5.0V, 8LD DFN,
Tape and Reel
a) MCP1754ST-1802E/MC: 1.8V, 8LD DFN,
Tape and Reel
b) MCP1754ST-3302E/MC: 3.3V, 8LD DFN,
Tape and Reel
c) MCP1754ST-5002E/MC: 5.0V, 8LD DFN,
Tape and Reel
a) MCP1754ST-3302E/DB: 3.3V, 3LD SOT-223,
Tape and Reel
b) MCP1754ST-5002E/DB: 5.0V, 3LD SOT-223,
Tape and Reel
X/
Temp.
X
Tolerance
X
Feature
Code
XX
Output
Voltage
MCP1754/MCP1754S
DS22276B-page 42 2011-2013 Microchip Technology Inc.
NOTES:
2011-2013 Microchip Technology Inc. DS22276B-page 43
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash
and UNI/O are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MTP, SEEVAL and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
Analog-for-the-Digital Age, Application Maestro, BodyCom,
chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,
Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA
and Z-Scale are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip
Technology Germany II GmbH & Co. & KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2011-2013, Microchip Technology Incorporated, Printed in
the U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 978-1-62077-161-7
Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
QUALITYMANAGEMENTS
YSTEM
CERTIFIEDBYDNV
== ISO/TS16949==
DS22276B-page 44 2011-2013 Microchip Technology Inc.
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11/29/11
