ASM3I2110AF-20-JT - Alliance Semiconductor

Alliance Semiconductor

2575 Augustine Drive • Santa Clara CA • Tel: 408-855-4900 • Fax: 408-855-4999 • www.alsc.com

rev 1.1

November 2003 ASM3P2110A

Features

 Generates an EMI optimized clocking

signal at output.

 Input frequency – 12.75 MHz.

 Output Frequency – 51 MHz (modulated)

 Frequency Deviation: ±1%.

 Modulation Rate: 30 KHz.

 Supply voltage range 3.3V.

 Available in commercial and industrial

temperature ranges.

 Available in 20-pin 150-mil SSOP package.

Product Description

The ASM3P2110A is a versatile spread spectrum

frequency modulator. The ASM3P2110A reduces

electromagnetic interference (EMI) at the clock source.

The ASM3P2110A allows significant system cost savings

by reducing the number of circuit board layers and

shielding that are required to pass EMI regulations. The

ASM3P2110A modulates the output of PLL in order to

spread the bandwidth of a synthesized clock, thereby

decreasing the peak amplitudes of its harmonics. This

results in significantly lower system EMI compared to the

typical narrow band signal produced by oscillators and

most clock generators. Lowering EMI by increasing a

signal’s bandwidth is called spread spectrum clock

generation.

Block Diagram

VDD

Crystal

Oscillator

REFOUT

XIN

XOUT

VSS

ClockOut

(51MHz)

PLL

+

SS

Output

Buffer

SSON

Peak Reducing EMI Solution 2 of 8

rev 1.1

November 2003 ASM3P2110A

Pin Configuration

Pin Description

Pin # Pin Name Pin Type Description

1 X2 O

Crystal connection or external reference frequency input. This pin has

dual functions. It can be connected to either an external crystal or an

reference clock.

2 X1 I

Crystal connection. If using an external reference, this pin must be left

unconnected.

3 VDD P Power supply to the entire chip. (3.3V)

9, 11,

13-16,

18, 19

NC - No connection.

10 CLK O Modulated output (51MHz).

12 SSON I

Digital logic input used to enable spread spectrum function. (Active

HIGH). Spread spectrum is enabled when HIGH, disabled when LOW.

This pin has an internal pull-low resistor.

17 GND P Ground connection.

20 REFOUT O Un-modulated reference output clock of the input frequency.

X2

ASM3P2110A

X1

N

C

CLK

SSON

REFOUT

1

4

2

3

5

6

7

8

9

10 11

12

13

20

15

19

18

14

16

17

N

C

N

C

N

C

N

C

N

C

N

C

N

C

GND

N

C

N

C

N

C

N

C

N

C

Peak Reducing EMI Solution 3 of 8

rev 1.1

November 2003 ASM3P2110A

Absolute Maximum Ratings

Symbol Parameter Rating Unit

VDD Supply voltage, DC (GND – 0.5) to 7 V

VI Input voltage, DC (GND-0.5) to (VDD+0.5) V

VO Output voltage, DC (GND-0.5) to (VDD + 0.5) V

IIK Input clamp current (VI <0 or VI > VDD) -50 to +50 mA

IOK Output clamp current (VI <0 or VI > VDD) -50 to +50 mA

TS Storage temperature -65 to +150 °C

TA Ambient temperature range, under bias -25 to +85 °C

TJ Junction temperature 150 °C

Lead temperature (soldering 10 sec) 260 °C

Input static discharge voltage protection

(MIL –STD 883E, Method 3015.7) 2 kV

Note: These are stress ratings only and functional operation is not implied. Exposure to absolute maximum

ratings for extended periods may affect device reliability.

Operating Conditions

Crystal Specifications

Fundamental AT cut parallel resonant crystal

Nominal frequency 12.75MHz

Frequency tolerance ± 50 ppm or better at 25°C

Operating temperature range -20°C to +85°C

Storage temperature -40°C to +85°C

Load capacitance 18pF

Shunt capacitance 7pF maximum

ESR 25 Ω

Parameter Symbol Condition / Description Min Typ Max Unit

Supply Voltage VDD 3.3V ± 10% 3 3.3 3.6 V

Ambient Operating

Temperature

Range

TA

-20 +85 °C

Crystal Resonator

Frequency FXIN 12.75 MHz

Output Driver Load

Capacitance CL 15 pF

Peak Reducing EMI Solution 4 of 8

rev 1.1

November 2003 ASM3P2110A

DC Electrical Characteristics

Parameter Symbol Conditions / Description Min Typ Max Unit

Overall

Supply Current,

Dynamic IDD VDD=3.3V, FCLK=12.75MHz,

CL=15pF 43 mA

All input pins

High-Level Input

Voltage VIH V

DD=3.3V 2.0 VDD+0.3 V

Low-Level Input

Voltage VIL V

DD=3.3V VSS-0.3 0.8 V

High-Level Input

Current IIH -1 1 µA

Low-Level Input

Current (pull-up) IIL -20 -36 -80 µA

High-Level Output

Source Current IxOH V

DD=V(XIN) = 3.3V, VO=0V 10 21 30 mA

Low-Level Output

Source Current IxOL V

DD=3.3V, V(XIN)=VO=5.5V -10 -21 -30 mA

Clock Outputs

High-Level Output

Source Current IOH V

O=2.4V -20 mA

Low-Level Output

Sink Current IOL V

O=0.4V 23 mA

ZOH V

O=0.5VDD; output driving high 29 Ω

Output Impedance ZOL Vo=0.5VDD; output driving low 27 Ω

Peak Reducing EMI Solution 5 of 8

rev 1.1

November 2003 ASM3P2110A

AC Electrical Characteristics

Parameter Symbol Conditions/ Description Min Typ Max Unit

Rise Time tr VO = 0.3V to 3.0V;

CL = 15pF 2.1 ns

Fall Time tf VO = 3.0V to 0.3V;

CL = 15pF 1.9 ns

Clock Duty

Cycle

Ratio of pulse width (as measured from

rising edge to next falling edge at 2.5V)

to one clock period

45 55 %

On rising edges 500 µs apart at 2.5 V

relative to an ideal clock, PLL B inactive * 45 ps

Jitter, Long

Term Tj (LT) On rising edges 500 µs apart at 2.5 V

relative to an ideal clock, PLL B active * 165

From rising edge to next rising edge at

2.5 V, PLL B inactive * 110 ps

Jitter, peak to

peak Tj (∆T) From rising edge to next rising edge at

2.5 V, PLL B active * 390

* CL = 15 pF, Input clock frequency = 12.75 MHz, Output frequency = 51 MHz

Peak Reducing EMI Solution 6 of 8

rev 1.1

November 2003 ASM3P2110A

Package Information

20-Pin SSOP package

Symbol Dimensions in inches Dimensions in millimeters

Min Max Min Max

A 0.053 0.069 1.35 1.75

A1 0.004 0.010 0.10 0.25

B 0.008 0.012 0.20 0.30

C 0.007 0.010 0.19 0.25

D 0.337 0.344 8.56 8.74

E 0.150 0.157 3.81 3.99

e 0.025 BSC 0.635BSC

H 0.228 0.244 5.79 6.20

L 0.016 0.050 0.41 1.27

θ 0° 8° 0° 8°

D

E H

D

A1

A

θ

L

C

B

e

Peak Reducing EMI Solution 7 of 8

rev 1.1

November 2003 ASM3P2110A

Ordering Codes

Part number Package Configuration Temperature Range

ASM3P2110AF-20-JT 20-pin SSOP TUBE Commercial

ASM3P2110AF-20-JR 20-pin SSOP TAPE & REEL Commercial

ASM3I2110AF-20-JT 20-pin SSOP TUBE Industrial

ASM3I2110AF-20-JR 20-pin SSOP TAPE & REEL Industrial

Ordering Information

ASM3P2110AF-20-JR

Licensed under US patent #5,488,627, #6,646,463 and #5,631,920.

OR - SOT23/T/R ST – SOIC, TUBE

TT – TSSOP, TUBE SR - SOIC, T/R

TR – TSSOP, T/R QR – QFN, T/R

QT - QFN, TUBE VT – TVSOP, TUBE

BT - BGA, TUBE VR – TVSOP, T/R

BR – BGA, T/R JR – SSOP, T/R

JT - SSOP, TUBE

PIN COUNT

X = Automotive I = Industrial P or n/c = Commercial

1 – reserved 6 – power management

2 - Non PLL based 7 – power management

3 – EMI Reduction 8 – power management

4 – DDR support products 9 – Hi performance

5

–

STD Zero Dela

y

Buffe

r

0 - reserved

Alliance Semiconductor Mixed Signal Product

PART NUMBER

Pb FREE

Peak Reducing EMI Solution 8 of 8

rev 1.1

November 2003 ASM3P2110A

trademarks or registered trademarks of Alliance. All other brand and product names may be the trademarks of their

respective companies. Alliance reserves the right to make changes to this document and its products at any time without

notice. Alliance assumes no responsibility for any errors that may appear in this document. The data contained herein

represents Alliance's best data and/or estimates at the time of issuance. Alliance reserves the right to change or correct this

data at any time, without notice. If the product described herein is under development, significant changes to these

specifications are possible. The information in this product data sheet is intended to be general descriptive information for

potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or

customer. Alliance does not assume any responsibility or liability arising out of the application or use of any product

described herein, and disclaims any express or implied warranties related to the sale and/or use of Alliance products

including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual

property rights, except as express agreed to in Alliance's Terms and Conditions of Sale (which are available from Alliance).

All sales of Alliance products are made exclusively according to Alliance's Terms and Conditions of Sale. The purchase of

products from Alliance does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or any

other intellectual property rights of Alliance or third parties. Alliance does not authorize its products for use as critical

components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant

injury to the user, and the inclusion of Alliance products in such life-supporting systems implies that the manufacturer

assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use.

Alliance Semiconductor Corporation

2575, Augustine Drive,

Santa Clara, CA 95054

Tel# 408-855-4900

Fax: 408-855-4999

www.alsc.com

Preliminary Information

Part Number: ASM3P2110A

Document Version: v1.1

Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to Dan Hariton / Alliance Semiconductor, dated 11-11-2003