Rev 2.0 ©2012 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, CA 94089-1706 Tel: (408) 747-1155 Fax: (408) 747-1286
www.aldinc.com
ALD1107/ALD1117
A
DVANCED
L
INEAR
D
EVICES,
I
NC.
QUAD/DUAL P-CHANNEL MATCHED PAIR MOSFET ARRAY
GENERAL DESCRIPTION
The ALD1107/ALD1117 are monolithic quad/dual P-channel enhance-
ment mode matched MOSFET transistor arrays intended for a broad range
of precision analog applications. The ALD1107/ALD1117 offer high input
impedance and negative current temperature coefficient. The transistor
pairs are matched for minimum offset voltage and differential thermal
response, and they are designed for precision analog switching and
amplifying applications in +2V to +12V systems where low input bias
current, low input capacitance and fast switching speed are desired. These
MOSFET devices feature very large (almost infinite) current gain in a low
frequency, or near DC, operating environment. The ALD1107/ALD1117
are building blocks for differential amplifier input stages, transmission
gates, and multiplexer applications, current sources and many precision
analog circuits.
APPLICATIONS
• Precision current mirrors
• Precision current sources
• Voltage choppers
• Differential amplifier input stage
• Voltage comparator
• Data converters
• Sample and Hold
• Analog signal processing
BLOCK DIAGRAM
FEATURES
• Low threshold voltage of -0.7V
• Low input capacitance
• Low Vos 2mV typical
• High input impedance -- 1014Ω typical
• Negative current (IDS) temperature coefficient
• Enhancement-mode (normally off)
• DC current gain 109
• Low input and output leakage currents
• RoHS compliant
PIN CONFIGURATION
TOP VIEW
SBL, PBL, DB PACKAGES
TOP VIEW
SAL, PAL, DA PACKAGES
Operating Temperature Range*
0°C to +70°C0°C to +70°C -55°C to +125°C
8-Pin SOIC 8-Pin Plastic Dip 8-Pin CERDIP
Package Package Package
ALD1117SAL ALD1117PAL ALD1117DA
14-Pin SOIC 14-Pin Plastic Dip 14-Pin CERDIP
Package Package Package
ALD1107SBL ALD1107PBL ALD1107DB
ORDERING INFORMATION (“L” suffix denotes lead-free (RoHS))
* Contact factory for leaded (non-RoHS) or high temperature versions.
BLOCK DIAGRAM
DP2
GP2
SP2
GP1
SP1
1
2
3
45
6
7
8
DP1
V+
V-
ALD1117
DP2
GP2
SP2
GP3
SP3
GP1
SP1
DP4
GP4
1
2
3
4
5
6
78
9
10
11
12
13
14
DP1
V
+
V
-
DP3
SP4
ALD1107
D
P1
(1) D
P2
(8)
~
G
P1
(2)
S
P1
(3) S
P2
(6)
V - (4)
V+ (5)
G
P2
(7)
ALD1117
D
P1
(1) D
P2
(14)
G
P1
(2)
S
P1
(3) S
P2
(12)
V+ (11)
G
P2
(13)
D
P3
(10) D
P4
(5)
G
P3
(9)
S
P3
(8) S
P4
(7)
~
V- (4)
V+ (11)
G
P4
(6)
ALD1107