SN74LVC2G07 www.ti.com SCES308J - AUGUST 2001 - REVISED AUGUST 2012 DUAL BUFFER/DRIVER WITH OPEN DRAIN OUTPUTS Check for Samples: SN74LVC2G07 FEATURES 1 * 2 * * * * * * Available in the Texas Instruments NanoFreeTM Package Supports 5-V VCC Operation Inputs and Open-Drain Outputs Accept Voltages up to 5.5 V Max tpd of 3.7 ns at 3.3 V Low Power Consumption, 10-A Max ICC 24-mA Output Drive at 3.3 V Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25C DCK PACKAGE (TOP VIEW) DBV PACKAGE (TOP VIEW) 1A 1 6 1Y 1A GND 2 5 3 4 2 6 5 3 4 * * * Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25C Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) - 1000-V Charged-Device Model (C101) YZP PACKAGE (BOTTOM VIEW) 1Y VCC VCC 2A 2A 1 * 2Y 2A 3 4 2Y GND 2 5 VCC 1A 1 6 1Y DRY PACKAGE (TOP VIEW) 1A 1 6 1Y GND 2 5 VCC 2A 3 4 2Y DSF PACKAGE (TOP VIEW) 1A 1 6 1Y GND 2 5 VCC 2A 3 4 2Y 2Y DESCRIPTION/ORDERING INFORMATION This dual buffer/driver is designed for 1.65-V to 5.5-V VCC operation. The output of the SN74LVC2G07 is open drain and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wiredAND functions. The maximum sink current is 32 mA. NanoFreeTM package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoFree is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2001-2012, Texas Instruments Incorporated SN74LVC2G07 SCES308J - AUGUST 2001 - REVISED AUGUST 2012 www.ti.com ORDERING INFORMATION PACKAGE (1) TA -40C to 85C (2) Reel of 3000 SN74LVC2G07YZPR _ _ _CV_ SOT (SOT-23) - DBV QFN - DRY Reel of 3000 SN74LVC2G07DBVR C07_ (4) Reel of 5000 SN74LVC2G07DRYR CV (4) Reel of 5000 SN74LVC2G07DSFR CV Reel of 3000 SN74LVC2G07DCKR Reel of 250 SN74LVC2G07DCKT SOT (SC-70) - DCK (2) (3) (4) TOP-SIDE MARKING (3) NanoFreeTM - WCSP (DSBGA) 0.23-mm Large Bump - YZP (Pb-free) QFN - DSF (1) ORDERABLE PART NUMBER CV_ For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site. YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, * = Pb-free). ESD protection exceeds 150-V machine model. FUNCTION TABLE (EACH BUFFER/DRIVER) INPUT A OUTPUT Y L L H Z LOGIC DIAGRAM (POSITIVE LOGIC) 1A 2A 2 1 6 3 4 1Y 2Y Submit Documentation Feedback Copyright (c) 2001-2012, Texas Instruments Incorporated Product Folder Links: SN74LVC2G07 SN74LVC2G07 www.ti.com SCES308J - AUGUST 2001 - REVISED AUGUST 2012 ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage range -0.5 6.5 V VI Input voltage range (2) -0.5 6.5 V VO Voltage range applied to any output in the high-impedance or power-off state (2) -0.5 6.5 V VO Voltage range applied to any output in the high or low state (2) -0.5 6.5 V IIK Input clamp current VI < 0 -50 mA IOK Output clamp current VO < 0 -50 mA IO Continuous output current 50 mA 100 mA (3) Continuous current through VCC or GND JA Package thermal impedance (4) DBV package 165 DCK package 259 YZP package 123 DRY package 234 DSF package Tstg (1) (2) (3) (4) C/W 300 Storage temperature range -65 150 C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. The value of VCC is provided in the recommended operating conditions table. The package thermal impedance is calculated in accordance with JESD 51-7. RECOMMENDED OPERATING CONDITIONS (1) VCC Supply voltage Operating Data retention only High-level input voltage MAX 5.5 1.5 VCC = 1.65 V to 1.95 V VIH MIN 1.65 UNIT V 0.65 x VCC VCC = 2.3 V to 2.7 V 1.7 VCC = 3 V to 3.6 V V 2 VCC = 4.5 V to 5.5 V 0.7 x VCC VCC = 1.65 V to 1.95 V 0.35 x VCC VCC = 2.3 V to 2.7 V 0.7 VCC = 3 V to 3.6 V 0.8 VIL Low-level input voltage VI Input voltage 0 5.5 V VO Output voltage 0 5.5 V VCC = 4.5 V to 5.5 V 0.3 x VCC VCC = 1.65 V 4 VCC = 2.3 V IOL Low-level output current t/v Input transition rise or fall rate 8 16 VCC = 3 V 32 VCC = 1.8 V 0.15 V, 2.5 V 0.2 V 20 VCC = 3.3 V 0.3 V 10 (1) Operating free-air temperature mA 24 VCC = 4.5 V VCC = 5 V 0.5 V TA V ns/V 5 -40 85 C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Submit Documentation Feedback Copyright (c) 2001-2012, Texas Instruments Incorporated Product Folder Links: SN74LVC2G07 3 SN74LVC2G07 SCES308J - AUGUST 2001 - REVISED AUGUST 2012 www.ti.com ELECTRICAL CHARACTERISTICS over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOL = 100 A VOL 1.65 V to 5.5 V 0.1 1.65 V 0.45 IOL = 8 mA 2.3 V 0.3 IOL = 32 mA VI = 5.5 V or GND VI or VO = 5.5 V ICC VI = 5.5 V or GND, IO = 0 ICC One input at VCC - 0.6 V, Other inputs at VCC or GND CI VI = VCC or GND UNIT V 0.55 4.5 V Ioff (1) 0.4 3V IOL = 24 mA A inputs MAX IOL = 4 mA IOL = 16 mA II MIN TYP (1) VCC 0.55 0 to 5.5 V 5 A 0 10 A 1.65 V to 5.5 V 10 A 3 V to 5.5 V 500 A 3.3 V 3.5 pF All typical values are at VCC = 3.3 V, TA = 25C. SWITCHING CHARACTERISTICS over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) PARAMETER tpd FROM (INPUT) TO (OUTPUT) A Y VCC = 1.8 V 0.15 V VCC = 2.5 V 0.2 V VCC = 3.3 V 0.3 V VCC = 5 V 0.5 V MIN MAX MIN MAX MIN MAX MIN MAX 1.5 8.6 1 4.4 1 3.7 1 2.9 UNIT ns OPERATING CHARACTERISTICS TA = 25C PARAMETER Cpd 4 Power dissipation capacitance TEST CONDITIONS f = 10 MHz VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V VCC = 5 V TYP TYP TYP TYP 3 3 4 4 Submit Documentation Feedback UNIT pF Copyright (c) 2001-2012, Texas Instruments Incorporated Product Folder Links: SN74LVC2G07 SN74LVC2G07 www.ti.com SCES308J - AUGUST 2001 - REVISED AUGUST 2012 PARAMETER MEASUREMENT INFORMATION (OPEN DRAIN) VLOAD S1 RL From Output Under Test Open GND CL (see Note A) RL TEST S1 tPZL (see Notes E and F) tPLZ (see Notes E and G) tPHZ/tPZH VLOAD VLOAD VLOAD LOAD CIRCUIT INPUTS VCC 1.8 V 0.15 V 2.5 V 0.2 V 3.3 V 0.3 V 5 V 0.5 V VI tr/tf VCC VCC 3V VCC 2 ns 2 ns 2.5 ns 2.5 ns VM VLOAD CL RL V VCC/2 VCC/2 1.5 V VCC/2 2 x VCC 2 x VCC 6V 2 x VCC 30 pF 30 pF 50 pF 50 pF 1 k 500 500 500 0.15 V 0.15 V 0.3 V 0.3 V VI Timing Input VM 0V tW tsu VI Input VM VM th VI Data Input VM VM 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VI VM Input VM 0V tPLH VOH VM VOL tPHL VM VM 0V tPLZ Output Waveform 1 S1 at VLOAD (see Note B) tPLH VLOAD/2 VM tPZH VOH Output VM tPZL tPHL VM Output VI Output Control VM VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS Output Waveform 2 S1 at GND (see Note B) VOL + V VOL tPHZ VM VOH - V VOH 0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators have the following characteristics: PRR 10 MHz, ZO = 50 . D. The outputs are measured one at a time, with one transition per measurement. E. Because this device has open-drain outputs, tPLZ and tPZL are the same as tPD. F. tPZL is measured at VM. G. tPLZ is measured at VOL + V. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms Submit Documentation Feedback Copyright (c) 2001-2012, Texas Instruments Incorporated Product Folder Links: SN74LVC2G07 5 SN74LVC2G07 SCES308J - AUGUST 2001 - REVISED AUGUST 2012 www.ti.com REVISION HISTORY Changes from Revision H (June 2008) to Revision I * Added new orderable parts, DRY and DSF. ......................................................................................................................... 2 Changes from Revision I (July 2012) to Revision J * 6 Page Page Updated pin out packages. ................................................................................................................................................... 1 Submit Documentation Feedback Copyright (c) 2001-2012, Texas Instruments Incorporated Product Folder Links: SN74LVC2G07 PACKAGE OPTION ADDENDUM www.ti.com 16-Aug-2012 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) SN74LVC2G07DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC2G07DBVRE4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC2G07DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC2G07DCKR ACTIVE SC70 DCK 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC2G07DCKRE4 ACTIVE SC70 DCK 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC2G07DCKRG4 ACTIVE SC70 DCK 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC2G07DCKT ACTIVE SC70 DCK 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC2G07DCKTE4 ACTIVE SC70 DCK 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC2G07DCKTG4 ACTIVE SC70 DCK 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC2G07DRYR ACTIVE SON DRY 6 5000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC2G07DSFR ACTIVE SON DSF 6 5000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC2G07YEPR OBSOLETE WCSP YEP 6 TBD Call TI SN74LVC2G07YZPR ACTIVE DSBGA YZP 6 3000 Green (RoHS & no Sb/Br) SNAGCU Call TI Level-1-260C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 16-Aug-2012 TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN74LVC2G07 : * Enhanced Product: SN74LVC2G07-EP NOTE: Qualified Version Definitions: * Enhanced Product - Supports Defense, Aerospace and Medical Applications Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) SN74LVC2G07DBVR SOT-23 DBV 6 3000 178.0 9.2 SN74LVC2G07DBVR SOT-23 DBV 6 3000 180.0 SN74LVC2G07DBVR SOT-23 DBV 6 3000 178.0 SN74LVC2G07DCKR SC70 DCK 6 3000 SN74LVC2G07DCKR SC70 DCK 6 SN74LVC2G07DCKR SC70 DCK SN74LVC2G07DCKT SC70 DCK SN74LVC2G07DCKT SC70 W Pin1 (mm) Quadrant 3.3 3.2 1.55 4.0 8.0 Q3 9.2 3.17 3.23 1.37 4.0 8.0 Q3 9.0 3.23 3.17 1.37 4.0 8.0 Q3 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3 3000 180.0 9.2 2.3 2.55 1.2 4.0 8.0 Q3 6 3000 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3 6 250 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3 DCK 6 250 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3 SN74LVC2G07DCKT SC70 DCK 6 250 180.0 9.2 2.3 2.55 1.2 4.0 8.0 Q3 SN74LVC2G07DRYR SON DRY 6 5000 180.0 9.5 1.15 1.6 0.75 4.0 8.0 Q1 SN74LVC2G07DSFR SON DSF 6 5000 180.0 9.5 1.16 1.16 0.5 4.0 8.0 Q2 SN74LVC2G07YZPR DSBGA YZP 6 3000 178.0 9.2 1.02 1.52 0.63 4.0 8.0 Q1 SN74LVC2G07YZPR DSBGA YZP 6 3000 180.0 8.4 1.02 1.52 0.63 4.0 8.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LVC2G07DBVR SOT-23 DBV 6 3000 180.0 180.0 18.0 SN74LVC2G07DBVR SOT-23 DBV 6 3000 205.0 200.0 33.0 SN74LVC2G07DBVR SOT-23 DBV 6 3000 180.0 180.0 18.0 SN74LVC2G07DCKR SC70 DCK 6 3000 180.0 180.0 18.0 SN74LVC2G07DCKR SC70 DCK 6 3000 205.0 200.0 33.0 SN74LVC2G07DCKR SC70 DCK 6 3000 180.0 180.0 18.0 SN74LVC2G07DCKT SC70 DCK 6 250 180.0 180.0 18.0 SN74LVC2G07DCKT SC70 DCK 6 250 180.0 180.0 18.0 SN74LVC2G07DCKT SC70 DCK 6 250 205.0 200.0 33.0 SN74LVC2G07DRYR SON DRY 6 5000 180.0 180.0 30.0 SN74LVC2G07DSFR SON DSF 6 5000 180.0 180.0 30.0 SN74LVC2G07YZPR DSBGA YZP 6 3000 220.0 220.0 35.0 SN74LVC2G07YZPR DSBGA YZP 6 3000 220.0 220.0 34.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. 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