CML Semiconductor Products PRODUCT INFORMATION FX0O13 HSC Tone Decoder for Pagers Features 'N'-Tone HSC Decoding EIA and CCIR Tonesets 4-Bit Parallel (HEX) Data Output e e @ Processor Interface @ Auxiliary 23.33kHz Clock Output e Low-Power (2.5V @ 500LA Requirement MIN ) Obsolete Product - For Information Only - @ Radiopaging, PMR Selcali and Remote Signalling Applications @ Selectable 560kHz or 4.48MHz Xtal/Clock Operation Automatic Power-Up Reset Facility @ 24-Pin/Lead Package Versions PURS NTR p| CO OL CIRCUITRY SIGNAL IN SIGNAL CORRELATION PROGRAM sign LIMITER) +-# PROCESS ime ma TIMER | _> Yop _> Vss COMPARISON PRESCALE CIRCUITRY T | DATA CHANGE TONE SET 18x 4 ax MEMORY STORE Ss | OUTPUTS DO |-20.5, PROBABILITY cee PRESCALER ANALYSIS. ->| OUTPUT ole _ CATCHES | 22> HOLD XTAL/CLOCK > clocks I ig CLOCK XTAL GENERATOR 23.333kHz oP <-~ CLOCK SELECT + Fig.1 Functional Block Diagram > 560kHz O/P Brief Description The FX013 is a very low-voltage continuous N-Tone EIA and CCIR HSC tone decoder which is ideal for tone-paging applications. From an analogue signal input the FX013 will produce a representative 4-bit (HEX) paraliel output word for either toneset. Hold, Data Change and Interrupt features combined with the 4-bit data output enable Processor interface and control. Altematively, the FX013 may be used in a simple passive system using the Data Change and Data Outputs This device can be used with a customer specified uProcessor or with a pre-programmed address decoder/display driver. The FX013 has on-chip automatic Power-Up Reset circuitry, which with selected time-constant components ensures the correct start-up settings for most supply conditions, making this device ideal for installation within radiopaging units. Operating at 2.5 volts with a minimum current requirement of 500A, the FX013 is available in two toneset versions to decode either EIA (A) or CCIR (C) tones. To cater for variations in design requirements the FX013 is produced in both 24-pin cerdip DIL and plastic quad packages.Pin Number Function FX013U/LG 3 10 11 12 13 14 15 16 17 Signal In: HSC input tones are a.c. coupled to this pin; de bias of the interna! high gain limiter is set up by an internal 3MQ bias resistor connected between this pin and the Signal Bias pin. Neither pin should be loaded with any other circuitry. Signal Bias: See Signal In. 23.33kHz Clock Out: A 23.333kHz buffered squarewave logic output directly derived from the oscillator frequency (nominally 560.0kHz). This pin may be used for auxiliary functions, e.g. external timing of received tone periods and for other '03 series devices. Xtal: Output from on-chip inverter. Xtal/Clock: Input to on-chip inverter. May be used in conjunction with the Xtal O/P and a 560kHz ceramic resonator/trimming capacitor, or a 4.48MHz Xtal Circuit. May also be used with a buffered input from an externally derived 560kKHz or 4.48MHz clock. 560kHz Buffered O/P: A buffered 560kHz signal is output from this pin. Clock Frequency Select: Normally at logic 1 if a 560kHz resonator is being used. If held at logic 0, a divide by 8 function is switched in after the oscillator circuit to divide down the 4.48MHz frequency to 560kHz. This pin has an internal 1MQ pullup resistor. V,,: Negative Supply (GND). Hold I/P: If taken to V,.. and a tone is input, the resulting Data Change output latches to logic 4 and the Data lines output the code for the detected tone regardless of subsequent changes to the input tone, until Hold is returned to V,,,. This facilitates interrupt/handshake routines for pProcessors when used in conjunction with the Data Change O/P. This pin has an internal 1MQ pullup resistor. Power-Up Reset (P U RS): To reset internal circuitry on power-up, a logic 1 is required at this pin for a duration of at least 1.0ms after clock is applied. For slow-rising supplies the time constant recommended by the components in Figure 2 should be increased accordingly. IRQ: Interrupt Request. This output, is latched to logic O when a tone is detected and the CS pin is at V,,, ie. chip disabled. This pin is reset to logic 1, enabling its for use in wire-ORing with similar outputs from other peripherals. This pin has internal 1kQ pulldown and 100kQ pullup resistors on-chip. CS: Chip Select. When this pin is at V,,, the chip is disabled and the data outputs DO - D3 and Data Change output go open circuit. When at V,, the chip is enabled and the IRQ output is reset to logic 1. Data Change: A 1.0 ms pulse is generated at this pin upon detection of a valid tone and new data is presented to the DO - D3 outputs. The signal from this pin can be latched at a logic 1 after detection of a tone (see Hold input). This output is tri-state. D3 Data Outputs: A 4-bit word, that represents the HEX value of the decoded tone D2 frequency, is output from these pins after a successful decode. D1 These outputs are tri-state. See Table 1. DO Voy: Positive Supply Not connected. Leave open-circuit.Application Information Fig. 2 Recommended External Componenis Vop Ts wat | \ Ce ca] : { ale | NS Vpp Fee || +1 24 v far | cna wud 2 23 | bo ss 1 |es 1 SIGNA a i XTAVGLOGK [| c b 3 22 ne mM a 44 21F- c, 1 ol SIGNAL 5 20 +> p2 == 23.333kHz op [ FXOI3 19 D8 <+|7 18 | XTAL 8 17 > DATA CHANGE a XTAL/CLOCK cs - 9 16 # 560kHz O/P 10 15 iRQ CLOCK SELECT PURS 11 14 Vv 12 13 J* HOLD ss Ry Vss Tolerance: R =+10% Component Value R, 1MQ C, 47.0pF R, 1MQ Cc, 5 - 65pF Cc, 0.01pF Cc, 47.0pF Cc, 0.001 pF Cc, 1.0nF X, 560kHz C =+20% 1023 1164 1305 1446 1587 1728 1869 2151 2433 2010 2292 459 NoTone 1446 1540 1640 1747 1860 2400 930 2247 991 2110 NotTone Table 1 Decode Frequency Tonesets aoa uenw ere er 41 OaOdadDODIOOo; Haasan 0000H 42220000 t BasaAocoA=30c00H33=00-200f 3 a |=O-02-04~0=-0+ 030+ 07 TAMVDVODFOODNOANFEF WHO].SIGNAL IN Notone Notone Vop CLOCK tresp tyr PURS Tone Data 1 Tone Data 2 DATA (D0/+/2/3) O/P DE DATA CHANGE aN J \. J \ J \. <>trus > toc Fig.3 Normal Timing Operation [not to scale] Timing Specification Min. Typ. Max. Unit INPUT : Tone 1 x Tone 2 x YP : toua 2.0 - - ms RESP toe - 330 - ms DATA x Data 1 x Data 2 bus - 10 - ms a too 05 - 10 ms > too ee too | teesp 20.0 - = 33.0 mss DATA CHANGE : tyr 33.0 - 53.0 ms <->! tuonn toata - - 2.0 ms _-_-e_, form - - 120 Us FOLD \_ tern 50.0 - ops trot. tra - - 250 ns Fig.4 HOLD Operation [not to scale] tang 20.5 - 34.0 ms thes - - 250 ns tour . - 100 ns INPUT x Valid Tone Notes: 1. 'E is the start-up (power-up reset) trina condition. __ 2. The state of DO/1/2/3 will IRQ \ / represent the input frequency - t present during and after Power- cs _ _, : Up Reset (F [Norone] in the \ f Figure 3 example). DATA O/P : . : Valid Data: thes, tour Fig.5 CS and IRQ Operartion [not to scale]Specification Absolute Maximum Ratings Exceeding the maximum rating can result in device damage. Operation of the device outside the operating limits is not implied. Supply voltage Input voltage at any pin (ref V,,= OV) Sink/source current (supply pins) (other pins) Total device dissipation @ T,,,, 25C Derating Operating Temperature (T,,,): Storage temperature range (T,,): Functional Limits ...... FX013U/LG FX013J/LG -0.3 to 7.0V -0.3 to (V,, + 0.3V) +/- 30mMA +/- 20MA 800mW Max. 10mW/C -40C to +85C -55C to +125C Min. Max. Unit Supply Voltage (V,,,) 2.5 5.5 Vat 25C All device characteristics are measured under the following conditions unless otherwise specified: Vip 5.0V Top= -40 to +85 C. Xtal/Clock or Clock In Frequency = 560kHz. Characteristics See Note Min. Typ. Max. Unit Static Values Supply Voltage (V,.=0V) 2.5 - 5.5 Vv Supply Current - 500 - pA Logic 1 Output (Source = 1 mA) 1 4.5 - - Vv Logic 0 Output (Sink = 1 mA) 1 - - 0.5 Vv Logic 1 Input Level 2 3.5 - - Vv Logic 0 Input Level 2 - - 1.5 Vv Oscillator Output Level Input Impedances Signal In - 1.0 - MQ Clock Select - 1.0 - MQ Hold i/P : 1.0 - MQ Chip Select - 10.0 - MQ Output impedances DO - D3 - 1.0 - kQ Data Change - 1.0 - kQ Oscillator Outputs - 10.0 - kQ Dynamic Values Signal Input Range 3 35.0 - Vp/2 mvrms Decode Bandwidth when P>0.995 QA 4 +20.0 - - Hz Qc 4 +1.0 - - % Not-Decode Bandwidth when P<0.03 QA 5 - - +60.0 Hz ac 5 - - +3.0 % Noise Response Rate (hours per F - F - F single character response with no input tone). QA 6 - 0.15 - /hour ac 6 - 40.0 - /nour Decode Response Time: Notone to Tone (F - F) 7 20.0 25.0 33.0 ms Tone to Notone, Tf (F - F) 7 33.0 - 53.0 ms Minimum inter-tone gap for F 8 15.0 - 28.0 ms Notes: 1. Pins 7, 8, 17 and 19, 20, 22 and 23. 2. Pins 13,14 and 16. . Anac coupled sine/squarewave. OAL single character. on With minimum tone period (Tp) specified for toneset. P = Decode Probability. (QA) SNR = 3dB. (QC) SNR = 0dB. All conditions of input SNR and amplitude with maximum Tp specified for the toneset. Gaussian input noise, bandwidth 6.0kHz, maximum input level corresponds to 1-digit code falsing rate. F = random . Delay from change of input (tone applied/removed) to change at Q0-Q3 outputs. . Included in t,,.. Minimum tone gap requirement for Noone recognition. Outputs = F after delay.Package Outlines The FX013J, the cerdip package is shown in Figure 6 and the 'LG quad plastic version in Figure 7. Pin 1 identification marking is shown on the relevant diagram and pins on both package styles number anti-clockwise when viewed from the top (marked side). Fig.6 FX013J 24-pin cerdip Package Handling Precautions The FX013 is a CMOS LSI circuit which includes input protection. However precautions should be taken to prevent static discharges which may cause damage. Fig.7 FX013LG quad plastic Package Ghqe Hh i al fa] ty anannnen ne : | t t { t F ' . , Anda . ie k v i 4 | r = Hl = ty i pe po of tS Et a ; = =. in 4, o ! +), 6 . #1 NOTE: All dimensions in mm. Angles in degrees. - we * +s ae je "| ; DIMENSION = MAX MIN aa B } Datum & Symmetry i ook 10.25 10.0 vt | s j OD 6.38 6.22 NOTE: All dimensions in mm. Y (on) 4 E 1028 100 A f= . . DIMENSION MAX. MIN, ae & ou reed A 32.03 31.50 y Pt 1.30 1.24 B 14.81 13.06 ww J 25 - c 18.61 15.14 ohm x 15.65 on D 04 7.84 - . E am? M 10 os E 288 } TYPICAL N 10 08 : Pp 6 G 4:30 4.10 R 6 } TYPICAL H a5 3.99 s 1.49 1.14 \ 1.40 TYPICAL ; oz J 18.20 16.54 v 23 TYPICAL w 0.07 Ordering Information The FX013 is available in two tonesets and two package styles: 'A' = EIA Tones 'C = CCIR Tones Please order the correct toneset in the correct package. FX013J 'A'/'C' 24-pin cerdip DIL FX013LG 'A'/'C' 24-pin plastic encapsulated bent and cropped CML does not assume any responsibility for the use of any circuitry described. No circuit patent licences are implied and CML reserves the right at any time without notice to change the said circuitry.