DS36277 www.ti.com SNLS086E - JULY 1998 - REVISED APRIL 2013 Dominant Mode Multipoint Transceiver Check for Samples: DS36277 FEATURES DESCRIPTION * The DS36277 Dominant Mode Multipoint Transceiver is designed for use on bi-directional differential busses. It is optimal for use on Interfaces that utilize Society of Automotive Engineers (SAE) J1708 Electrical Standard. 1 2 * * * * * FAILSAFE Receiver, RO = HIGH for: - OPEN Inputs - Terminated Inputs - SHORTED Inputs Optimal for Use in SAE J1708 Interfaces Compatible with Popular Interface Standards: - TIA/EIA-485 and TIA/EIA-422-A - CCITT Recommendation V.11 Bi-Directional Transceiver - Designed for Multipoint Transmission Wide Bus Common Mode Range - (-7V to +12V) Available in PDIP and SOIC Packages The device is similar to standard TIA/EIA-485 transceivers, but differs in enabling scheme. The Driver's Input is normally externally tied LOW, thus providing only two states: Active (LOW), or Disabled (OFF). When the driver is active, the dominant mode is LOW, conversely, when the driver is disabled, the bus is pulled HIGH by external bias resistors. The receiver provides a FAILSAFE feature that ensures a known output state when the Interface is in the following conditions: Floating Line, Idle Line (no active drivers), and Line Fault Conditions (open or short). The receiver output is HIGH for the following conditions: Open Inputs, Terminated Inputs (50), or Shorted Inputs. FAILSAFE is a highly desirable feature when the transceivers are used with Asynchronous Controllers such as UARTs. Connection and Logic Diagram See Package Number D (R-PDSO-G8) or P (R-PDIP-T8) 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 1998-2013, Texas Instruments Incorporated DS36277 SNLS086E - JULY 1998 - REVISED APRIL 2013 www.ti.com Truth Table Driver Inputs Outputs DE DI DO/RI DO /RI L L L H L H H L H X Z Z Receiver Inputs Output RE DO/RI-DO /RI RO L 0 mV H L -500 mV L L SHORTED H L OPEN H H X Z These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) Supply Voltage (VCC) Input Voltage (DE , RE , and DI) Unit 7 V 5.5 V -10V to +15 V 5.5 V P Package (derate 9.3 mW/C above +25C) 1168 mW D Package (derate 5.8 mW/C above +25C) 726 mW -65C to +150 C Driver Output Voltage/Receiver Input Voltage Receiver Output Voltage (RO) Maximum Package Power Dissipation @ +25C Value Storage Temperature Range Lead Temperature (Soldering 4 sec.) 260 C ESD Rating (HBM, 1.5 k, 100 pF) 7.0 kV (1) (2) "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be specified. They are not meant to imply that the devices should be operated at these limits. The tables of "Electrical Characteristics" specify conditions for device operation. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. Recommended Operating Conditions Supply Voltage, VCC Bus Voltage Operating Temperature (TA) DS36277T 2 Submit Documentation Feedback Min Max Units 4.75 5.25 V -7 +12 V -40 +85 C Copyright (c) 1998-2013, Texas Instruments Incorporated Product Folder Links: DS36277 DS36277 www.ti.com SNLS086E - JULY 1998 - REVISED APRIL 2013 Electrical Characteristics (1) (2) Over recommended Supply Voltage and Operating Temperature ranges, unless otherwise specified. Symbol Parameter Conditions Min Typ Max Units 1.5 3.6 DRIVER CHARACTERISTICS VOD Differential Output Voltage IO = 0 mA (No Load) VoDO Output Voltage IO = 0 mA (Output to GND) VoDO Output Voltage VT1 Differential Output Voltage (Termination Load) RL = 54 (485) VT1 Balance of VT1 |VT1 - VT1 | RL = 54 VOS Driver Common Mode Output Voltage RL = 54 VOS (Figure 1) RL = 100 (422) See (3) VOH Output Voltage High IOH = -22 mA VOL Output Voltage Low IOL = +22 mA IOSD Driver Short-Circuit Output Current VO = +12V V 0 6 V 1.3 2.2 5.0 V 1.7 2.6 5.0 V 0.2 V -0.2 (Figure 1) RL = 100 RL = 54 V 6 -0.2 RL = 100 Balance of VOS |VOS - VOS | 6 0 See (3) RL = 100 (Figure 2) 0.2 V 0 2.5 3.0 V 0 2.5 3.0 V -0.2 0.2 V -0.2 0.2 V 2.7 3.7 1.3 (Figure 3) VO = -7V V 2 V 92 290 mA -187 -290 mA -0.150 0 V RECEIVER CHARACTERISTICS Differential Input High Threshold Voltage (4) VO = VOH, IO = -0.4 mA VTL Differential Input Low Threshold Voltage (4) VO = VOL, IO = 8.0 mA VHST Hysteresis (5) VCM = 0V IIN Line Input Current (VCC = 4.75V, 5.25V, 0V) Other Input = 0V DE = VIH (6) IOSR Short Circuit Current VO = 0V IOZ TRI-STATE Leakage Current VO = 0.4 to 2.4V VOH Output High Voltage (Figure 12) VOL Output Low Voltage (Figure 12) VID = -0.5V, IOL = +8 mA 0.3 0.7 V VID = -0.5V, IOL = +16 mA 0.3 0.8 V VTH RIN -7V VCM +12V -0.5 -0.230 V -7V VCM +12V 80 mV VI = +12V 0.5 1.5 mA VI = -7V -0.5 -1.5 mA -15 -32 -85 mA -20 1.4 +20 A VID = 0V, IOH = -0.4 mA 2.3 3.7 VID = OPEN, IOH = -0.4 mA 2.3 3.7 RO Input Resistance 10 V V 20 k DEVICE CHARACTERISTICS VIH High Level Input Voltage VIL Low Level Input Voltage IIH High Level Input Current VIH = 2.4V IIL Low Level Input Current VIL = 0.4V VCL Input Clamp Voltage ICL = -18 mA ICC Output Low Voltage Supply Current (No Load) DE , RE , or DI 2.0 VCC V GND 0.8 V 20 A -100 A -0.7 -1.5 V DE = 0V, RE = 0V, DI = 0V 39 60 mA DE = 3V, RE = 0V, DI = 0V 24 50 mA ICCD DE = 0V, RE = 3V, DI = 0V 40 75 mA ICCX DE = 3V, RE = 3V, DI = 0V 27 45 mA ICCR (1) (2) (3) (4) (5) (6) Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground unless otherwise specified. All typicals are given for VCC = 5.0V and TA = +25C. |VT1| and |VOS| are changes in magnitude of VT1 and VOS, respectively, that occur when the input changes state. Threshold parameter limits specified as an algebraic value rather than by magnitude. Hysteresis defined as VHST = VTH - VTL. IIN includes the receiver input current and driver TRI-STATE leakage current. Submit Documentation Feedback Copyright (c) 1998-2013, Texas Instruments Incorporated Product Folder Links: DS36277 3 DS36277 SNLS086E - JULY 1998 - REVISED APRIL 2013 www.ti.com Switching Characteristics (1) Over recommended Supply Voltage and Operating Temperature ranges, unless otherwise specified. Symbol Parameter Conditions Min Typ Max Units DRIVER CHARACTERISTICS tPLHD Diff. Prop. Delay Low to High RL = 54 8 17 60 ns tPHLD Diff. Prop. Delay High to Low CL = 50 pF 8 19 60 ns tSKD Diff. Skew (|tPLHD-tPHLD|) CD = 50 pF 2 10 ns tr Diff. Rise Time (Figure 4 and Figure 5) 11 60 ns tf Diff. Fall Time 11 60 ns tPLH Prop. Delay Low to High 22 85 ns tPHL Prop. Delay High to Low RL = 27, CL = 15 pF (Figure 6 and Figure 7) 25 85 ns tPZH Enable Time Z to High 25 60 ns tPZL Enable Time Z to Low RL = 110 CL = 50 pF (Figure 8 - Figure 11 ) 30 60 ns tPHZ Disable Time High to Z 16 60 ns tPLZ Disable Time Low to Z 11 60 ns 15 37 90 ns 15 43 90 ns 6 15 ns 12 60 ns RECEIVER CHARACTERISTICS VID = -1.5V to +1.5V CL = 15 pF (Figure 13 and Figure 14) tPLH Prop. Delay Low to High tPHL Prop. Delay High to Low tSK Skew (|tPLH-tPHL|) tPZH Enable Time Z to High tPZL Enable Time Z to Low 28 60 ns tPHZ Disable Time High to Z 20 60 ns tPLZ Disable Time Low to Z 10 60 ns (1) 4 CL = 15 pF (Figure 15 and Figure 16) All typicals are given for VCC = 5.0V and TA = +25C. Submit Documentation Feedback Copyright (c) 1998-2013, Texas Instruments Incorporated Product Folder Links: DS36277 DS36277 www.ti.com SNLS086E - JULY 1998 - REVISED APRIL 2013 PARAMETER MEASUREMENT INFORMATION Figure 1. Driver VT1 and VOS Test Circuit Figure 2. Driver VOH and VOL Test Circuit Figure 3. Driver Short Circuit Test Circuit CL includes probe and stray capacitance The input pulse is supplied by a generator having the following characteristics: f=1.0 MHz, 50% duty cycle, Tr and tf<6.0 ns, Zo=50 Figure 4. Driver Differential Propagation Delay and Transition Time Test Circuit Submit Documentation Feedback Copyright (c) 1998-2013, Texas Instruments Incorporated Product Folder Links: DS36277 5 DS36277 SNLS086E - JULY 1998 - REVISED APRIL 2013 www.ti.com Figure 5. Driver Differential Propagation Delays and Transition Times CL includes probe and stray capacitance The input pulse is supplied by a generator having the following characteristics: f=1.0 MHz, 50% duty cycle, Tr and tf<6.0 ns, Zo=50 Figure 6. Driver Propagation Delay Test Circuit Figure 7. Driver Propagation Delays 6 Submit Documentation Feedback Copyright (c) 1998-2013, Texas Instruments Incorporated Product Folder Links: DS36277 DS36277 www.ti.com SNLS086E - JULY 1998 - REVISED APRIL 2013 S1 to DO for DI = 3V S1 to DO for DI = 0V CL includes probe and stray capacitance The input pulse is supplied by a generator having the following characteristics: f=1.0 MHz, 50% duty cycle, Tr and tf<6.0 ns, Zo=50 Figure 8. Driver TRl-STATE Test Circuit (tPZH, tPHZ) Figure 9. Driver TRI-STATE Delays (tPZH, tPHZ) S1 to DO for DI = 0V S1 to DO for DI = 3V CL includes probe and stray capacitance The input pulse is supplied by a generator having the following characteristics: f=1.0 MHz, 50% duty cycle, Tr and tf<6.0 ns, Zo=50 Figure 10. Driver TRI-STATE Test Circuit (tPZL, tPLZ) Figure 11. Driver TRl-STATE Delays (tPZL, tPLZ) Submit Documentation Feedback Copyright (c) 1998-2013, Texas Instruments Incorporated Product Folder Links: DS36277 7 DS36277 SNLS086E - JULY 1998 - REVISED APRIL 2013 www.ti.com Figure 12. Receiver VOH and VOL CL includes probe and stray capacitance The input pulse is supplied by a generator having the following characteristics: f=1.0 MHz, 50% duty cycle, Tr and tf<6.0 ns, Zo=50 Figure 13. Receiver Propagation Delay Test Circuit Figure 14. Receiver Propagation Delays CL includes probe and stray capacitance The input pulse is supplied by a generator having the following characteristics: f=1.0 MHz, 50% duty cycle, Tr and tf<6.0 ns, Zo=50 Diodes are 1N916 or equivalent. Figure 15. Receiver TRI-STATE Delay Test Circuit 8 Submit Documentation Feedback Copyright (c) 1998-2013, Texas Instruments Incorporated Product Folder Links: DS36277 DS36277 www.ti.com SNLS086E - JULY 1998 - REVISED APRIL 2013 S1 1.5V S2 OPEN S3 CLOSED S1 1.5V S2 CLOSED S3 CLOSED S1 -1.5V S2 CLOSED S3 OPEN S1 -1.5V S2 CLOSED S3 CLOSED Figure 16. Receiver Enable and Disable Timing Submit Documentation Feedback Copyright (c) 1998-2013, Texas Instruments Incorporated Product Folder Links: DS36277 9 DS36277 SNLS086E - JULY 1998 - REVISED APRIL 2013 www.ti.com Typical Performance Characteristics 10 Differential Output Voltage vs Output Current Differential Output Voltage vs Output Current Figure 17. Figure 18. Driver VOH vs IOH vs VCC Driver VOH vs IOH vs Temperature Figure 19. Figure 20. Driver VOL vs IOL vs VCC Driver VOL vs IOL vs Temperature Figure 21. Figure 22. Submit Documentation Feedback Copyright (c) 1998-2013, Texas Instruments Incorporated Product Folder Links: DS36277 DS36277 www.ti.com SNLS086E - JULY 1998 - REVISED APRIL 2013 Typical Performance Characteristics (continued) Receiver VOH vs IOH vs VCC Receiver VOH vs IOH vs Temperature Figure 23. Figure 24. Receiver VOL vs IOL vs VCC Receiver VOL vs IOL vs Temperature Figure 25. Figure 26. Supply Current vs Supply Voltage Supply Current vs Temperature Figure 27. Figure 28. Submit Documentation Feedback Copyright (c) 1998-2013, Texas Instruments Incorporated Product Folder Links: DS36277 11 DS36277 SNLS086E - JULY 1998 - REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) Voltage Output vs Voltage Input (Hysteresis) Figure 29. TYPICAL APPLICATIONS INFORMATION Figure 30. SAE J1708 Node with External Bias Resistors and Filters 12 Submit Documentation Feedback Copyright (c) 1998-2013, Texas Instruments Incorporated Product Folder Links: DS36277 DS36277 www.ti.com SNLS086E - JULY 1998 - REVISED APRIL 2013 REVISION HISTORY Changes from Revision D (April 2013) to Revision E * Page Changed layout of National Data Sheet to TI format .......................................................................................................... 12 Submit Documentation Feedback Copyright (c) 1998-2013, Texas Instruments Incorporated Product Folder Links: DS36277 13 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (C) Device Marking (3) (4/5) (6) DS36277TMX/NOPB ACTIVE SOIC D 8 2500 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 DS362 77TM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 Samples PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device DS36277TMX/NOPB Package Package Pins Type Drawing SOIC D 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 12.4 Pack Materials-Page 1 6.5 B0 (mm) K0 (mm) P1 (mm) 5.4 2.0 8.0 W Pin1 (mm) Quadrant 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DS36277TMX/NOPB SOIC D 8 2500 367.0 367.0 35.0 Pack Materials-Page 2 PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] A .004 [0.1] C PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .150 [3.81] .189-.197 [4.81-5.00] NOTE 3 4X (0 -15 ) 4 5 B 8X .012-.020 [0.31-0.51] .010 [0.25] C A B .150-.157 [3.81-3.98] NOTE 4 .069 MAX [1.75] .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 [0.11-0.25] 0 -8 .016-.050 [0.41-1.27] DETAIL A (.041) [1.04] TYPICAL 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] 6X (.050 ) [1.27] SYMM 5 4 (R.002 ) TYP [0.05] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X METAL SOLDER MASK OPENING EXPOSED METAL .0028 MAX [0.07] ALL AROUND SOLDER MASK OPENING METAL UNDER SOLDER MASK EXPOSED METAL .0028 MIN [0.07] ALL AROUND SOLDER MASK DEFINED NON SOLDER MASK DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] 6X (.050 ) [1.27] SYMM 5 4 (R.002 ) TYP [0.05] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES "AS IS" AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI's products are provided subject to TI's Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI's provision of these resources does not expand or otherwise alter TI's applicable warranties or warranty disclaimers for TI products. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright (c) 2020, Texas Instruments Incorporated