IRL1104SPbF
IRL1104LPbF
HEXFET® Power MOSFET
PD -95576
lAdvanced Process Technology
lSurface Mount (IRL1104S)
lLow-profile through-hole (IRL1104L)
l175°C Operating Temperature
lFast Switching
lFully Avalanche Rated
lLead-Free
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 0.9
RθJA Junction-to-Ambient(PCB Mounted,steady-state)** ––– 40
Thermal Resistance
°C/W
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 104
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 74A
IDM Pulsed Drain Current  416
PD @TA = 25°C Power Dissipation 2.4 W
PD @TC = 25°C Power Dissipation 167 W
Linear Derating Factor 1.1 W/°C
VGS Gate-to-Source Voltage ±16 V
EAS Single Pulse Avalanche Energy 340 mJ
IAR Avalanche Current62 A
EAR Repetitive Avalanche Energy17 mJ
dv/dt Peak Diode Recovery dv/dt  5.0 V/ns
TJOperating Junction and -55 to + 175
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case ) °C
Absolute Maximum Ratings
Fifth Generation HEXFETs from International Rectifier utilize
advanced processing techniques to achieve extremely low
on-resistance per silicon area. This benefit, combined with
the fast switching speed and ruggedized device design that
HEXFET Power MOSFETs are well known for, provides the
designer with an extremely efficient and reliable device for
use in a wide variety of applications.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-resistance
in any existing surface mount package. The D2Pak is
suitable for high current applications because of its low
internal connection resistance and can dissipate up to 2.0W
in a typical surface mount application.
The through-hole version (IRL1104L) is available for low-
profile applications.
Description
VDSS = 40V
RDS(on) = 0.008Ω
ID = 104A
2
D Pak
TO-262
S
D
G
07/19/04
lLogic-Level Gate Drive
www.irf.com 1
IRL1104S/LPbF
2www.irf.com
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 40 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJBreakdown Voltage Temp. Coefficient ––– 0.04 ––– V/°C Reference to 25°C, ID =1mA
––– ––– 0.008 VGS = 10V, ID = 62A
––– ––– 0.012 WVGS = 4.5V, ID = 52A
VGS(th) Gate Threshold Voltage 1.0 ––– V VDS = VGS, ID = 250µA
gfs Forward Transconductance 53 ––– ––– S VDS = 25V, ID = 62A
––– ––– 25 µA VDS =40V, VGS = 0V
––– ––– 250 VDS = 32V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 16V
Gate-to-Source Reverse Leakage ––– ––– -100 nA VGS = -16V
QgTotal Gate Charge ––– ––– 68 ID =62A
Qgs Gate-to-Source Charge ––– ––– 24 nC VDS = 32V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 34 VGS = 4.5V, See Fig. 6 and 13 
td(on) Turn-On Delay Time ––– 18 ––– VDD = 20V
trRise Time ––– 257 ––– ID =54A
td(off) Turn-Off Delay Time ––– 32 ––– RG = 3.6Ω , VGS = 4.5V
tfFall Time ––– 64 ––– RD = 0.4Ω, See Fig. 10 
Between lead,
––– ––– and center of die contact
Ciss Input Capacitance ––– 3445 ––– VGS = 0V
Coss Output Capacitance ––– 1065 ––– pF VDS = 25V
Crss Reverse Transfer Capacitance ––– 270 ––– ƒ = 1.0MHz, See Fig. 5
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
RDS(on) Static Drain-to-Source On-Resistance
IGSS
IDSS Drain-to-Source Leakage Current
LSInternal Source Inductance 7.5 nH
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
ISD ≤ 62A, di/dt ≤ 217A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
Notes:
VDD = 15V, starting TJ = 25°C, L = 0.18mH
RG = 25Ω, IAS = 62A. (See Figure 12)
Pulse width ≤ 300µs; duty cycle ≤ 2%.
** When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
Uses IRL1104 data and test conditions.
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
ISContinuous Source Current MOSFET symbol
(Body Diode) ––– ––– showing the
ISM Pulsed Source Current integral reverse
(Body Diode) ––– ––– p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS =62A, VGS = 0V
trr Reverse Recovery Time ––– 84 126 ns TJ = 25°C, IF =62A
Qrr Reverse Recovery Charge ––– 223 335 nC di/dt = 100A/µs 
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
A
104
416
S
D
G
Calculated continuous current based on maximum allowable
junction temperature;for recommended current-handling of the
package refer to Design Tip # 93-4
IRL1104S/LPbF
www.irf.com 3
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output Characteristics
-60 -40 -20 020 40 60 80 100 120 140 160 180
0.0
0.5
1.0
1.5
2.0
2.5
T , Junction Temperature( C)
R , Drain-to-Source On Resistance
(Normalized)
J
DS(on)
°
V =
I =
GS
D
10V
104A
1
10
100
1000
0.1 1 10 100
20µs PU LSE WIDTH
T = 175 C
J°
TOP
BOTTOM
VGS
15V
10V
7.0V
5.5V
4.5V
4.0V
3.5V
2.7V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
2.7V
1
10
100
1000
0.1 1 10 100
20µs PULSE WIDTH
T = 25 C
J°
TOP
BOTTOM
VGS
15V
10V
7.0V
5.5V
4.5V
4.0V
3.5V
2.7V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
2.7V
1
10
100
1000
2.0 4.0 6.0 8.0 10.0
V = 5 0 V
20µs PULSE WIDTH
DS
V , Gate-to-Sou rce Voltage (V)
I , Drain-to-Source Current (A)
GS
D
T = 25 C
J°
T = 175 C
J°
25
IRL1104S/LPbF
4www.irf.com
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
020 40 60 80
0
2
4
6
8
10
Q , Total Ga te Charge (nC)
V , Gate-to-Source Voltage (V)
G
GS
FOR TEST CIRCUIT
SEE FIGURE
I =
D
13
62 A
V = 20V
DS
V = 32V
DS
1
10
100
1000
10000
1 10 100
OPERATION IN THIS AREA LIMITED
BY RDS(on)
Single Pulse
T
T = 175 C
= 25 C
°°
J
C
V , Drain-to-Source Vol tage (V)
I , Drain Current (A)I , Drain Current (A)
DS
D
10us
100us
1ms
10ms
1 10 100
0
1000
2000
3000
4000
5000
6000
V , Drain-to-Source Vol tag e (V)
C, Capacitance (pF)
DS
V
C
C
C
=
=
=
=
0V,
C
C
C
f = 1MHz
+ C
+ C
C SHORTED
GS
iss gs gd , ds
rss gd
oss ds gd
Ciss
Coss
Crss
0.1
1
10
100
1000
0.2 0.8 1.4 2.0 2.6
V ,Sou rce-to-Drain Voltage (V)
I , Reverse Drain Current (A)
SD
SD
V = 0 V
GS
T = 175 C
J°
T = 25 C
J°
IRL1104S/LPbF
www.irf.com 5
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10a. Switching Time Test Circuit
V
DS
9
0%
1
0%
V
GS t
d(on)
t
r
t
d(off)
t
f
Fig 10b. Switching Time Waveforms
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RG
D.U.T.
4.5V
+
-
VDD
25 50 75 100 125 150 175
0
20
40
60
80
100
120
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
LIMITED BY PACKAGE
0.01
0.1
1
0.00001 0.0001 0.001 0.01 0.1 1
Notes:
1. D u ty fa cto r D = t / t
2. Peak T =P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , R ectangula r Pulse Dura t ion (se c)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
IRL1104S/LPbF
6www.irf.com
Fig 13a. Basic Gate Charge Waveform
D.U.T. V
D
S
I
D
I
G
3mA
V
GS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
Fig 13b. Gate Charge Test Circuit
QG
QGS QGD
V
G
Charge
4.5 V
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
10V
5
25 50 75 100 125 150 175
0
200
400
600
800
Starting T , Junction Temperature ( C)
E , Single Pulse Avalanche Energy (mJ)
J
AS
°
ID
TOP
BOTTOM
25A
44A
62A
IRL1104S/LPbF
www.irf.com 7
Peak Diode Recovery dv/dt Test Circuit
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
e-Applied
oltage
Reverse
Recovery
Current Body Diode Forward
Current
VGS=10V
VDD
ISD
Driver Gate Drive
D.U.T. ISD Waveform
D.U.T. VDS Waveform
Inductor Curent
D = P.W.
Period
+
-
+
+
+
-
-
-
Fig 14. For N-Channel HEXFETS
* VGS = 5V for Logic Level Devices
RG
VDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
*
IRL1104S/LPbF
8www.irf.com
D2Pak Part Marking Information
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
Note: "P " in assembly line
p os i t ion indicates "Lead-F r ee"
F530S
THIS IS AN IRF530S WITH
LOT CODE 8024
ASS EMB LE D ON WW 02, 2000
IN THE ASSEMBLY LINE "L"
ASSEMBLY
LOT CODE
INTERNATIONAL
RECTIFIER
LOGO
PART NU MB ER
DATE CODE
YEAR 0 = 2000
WEEK 02
LINE L
OR
F530S
A = AS S EMB LY SITE CODE
WEEK 02
P = D ES IGNATES LEAD -FREE
PRODUCT (OPTIONAL)
RECTIFIER
INTERNATIONAL
LOGO
LOT CODE
AS S EMB LY YEAR 0 = 2000
DATE CODE
PART NUMBER
IRL1104S/LPbF
www.irf.com 9
TO-262 Part Marking Information
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
ASSEMBLY
LOT CODE
RECTIFIER
INTERNATIONAL
ASSEMBLED ON WW 19, 1997
Note: "P" in assembly line
po s itio n indicat es "Lead-F ree"
IN THE ASSEMBLY LINE "C" LOGO
THIS IS AN IRL3103L
LOT CODE 1789
EXAMPLE:
LINE C
DATE CO DE
WEEK 19
YEAR 7 = 1997
PART NU MBER
PART NU MBER
LOGO
LOT CODE
ASSEMBLY
INTERNATIONAL
RECTIFIER
PRODUCT (OPT IONAL)
P = DESIGNATES L EAD-FR EE
A = ASSEMBLY SITE CODE
WEEK 19
YEAR 7 = 1997
DATE CODE
OR
IRL1104S/LPbF
10 www.irf.com
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 07/04
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)
3
4
4
TRR
F
EED DIRECTION
1.85 (.0 73)
1.65 (.0 65)
1.60 (.0 63)
1.50 (.0 59)
4.10 (.161)
3.90 (.153)
TRL
F
EED DIRECTION
10.90 (.429)
10.70 (.421) 1 6.10 ( . 634)
15. 90 ( .626 )
1.75 (.069)
1.25 (.049)
11.60 (.457)
11.40 (.449) 15.42 (.609)
15.22 (.601)
4.72 (.136)
4.52 (.178)
24. 30 ( .957
)
23. 90 ( .941
)
0.368 (.0145)
0.342 (.0135)
1.60 (.063)
1.50 (.059)
13.50 (.532)
12.80 (.504)
330.00
(14.173)
MAX.
27.40 (1.079)
23.90 (.941)
60.00 (2.362
)
MIN.
30.40 (1.197)
MAX.
26.40 (1.039)
24.40 (.961)
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCL UD ES FLANGE DISTORTION @ OUTER EDGE.
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/