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S
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8
9
BSS192
240 V, P-channel vertical D-MOS transistor
12 December 2014 Product data sheet
Scan or click this QR code to view the latest information for this product
1. General description
P-channel enhancement mode vertical Double-Diffused Field-Effect Transistor (D-
MOSFET) in a SOT89 (SC-62) medium power and flat lead Surface Mounted Device
(SMD) plastic package.
2. Features and benefits
Direct interface to Complementary (C-MOS) transitor and Transistor-Transistor Logic
(TTL) devices
Very fast switching
No secondary breakdown
3. Applications
Relay driver
High-speed line driver
High-side loadswitch
Switching circuits
4. Quick reference data
Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VDS drain-source voltage - - -240 V
VGS gate-source voltage
Tj = 25 °C
-20 - 20 V
IDdrain current VGS = -10 V; Tamb = 25 °C [1] - - -200 mA
Static characteristics
RDSon drain-source on-state
resistance
VGS = -10 V; ID = -200 mA; Tj = 25 °C - 10 12 Ω
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for
drain 1 cm2.
NXP Semiconductors BSS192
240 V, P-channel vertical D-MOS transistor
BSS192 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet 12 December 2014 2 / 15
5. Pinning information
Table 2. Pinning information
Pin Symbol Description Simplified outline Graphic symbol
1 S source
2 D drain
3 G gate
3 2 1
SOT89
S
D
G
017aaa257
6. Ordering information
Table 3. Ordering information
PackageType number
Name Description Version
BSS192 SOT89 plastic surface-mounted package; die pad for good heat transfer;
3 leads
SOT89
7. Marking
Table 4. Marking codes
Type number Marking code
BSS192 KB
NXP Semiconductors BSS192
240 V, P-channel vertical D-MOS transistor
BSS192 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet 12 December 2014 3 / 15
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDS drain-source voltage - -240 V
VGS gate-source voltage
Tj = 25 °C
-20 20 V
VGS = -10 V; Tamb = 25 °C; t ≤ 5 s [1] - -340 mA
VGS = -10 V; Tamb = 25 °C [1] - -200 mA
IDdrain current
VGS = -10 V; Tamb = 100 °C [1] - -120 mA
IDM peak drain current Tamb = 25 °C; single pulse; tp ≤ 10 µs - -800 mA
[2] - 560 mWTamb = 25 °C
[1] - 1 W
Ptot total power dissipation
Tsp = 25 °C - 12.5 W
Tjjunction temperature -55 150 °C
Tamb ambient temperature -55 150 °C
Tstg storage temperature -65 150 °C
Source-drain diode
ISsource current Tamb = 25 °C [1] - -200 mA
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for
drain 1 cm2.
[2] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
NXP Semiconductors BSS192
240 V, P-channel vertical D-MOS transistor
BSS192 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet 12 December 2014 4 / 15
Tj(°C)
- 75 17512525 75- 25
017aaa123
40
80
120
Pder
(%)
0
Fig. 1. MOSFET transistor: Normalized total
power dissipation as a function of junction
temperature
Tj(°C)
- 75 17512525 75- 25
017aaa124
40
80
120
Ider
(%)
0
Fig. 2. MOSFET transistor: Normalized continuous
drain current as a function of junction
temperature
aaa-014702
VDS (V)
-10-1 -103
-102
-1 -10
-10-1
-10-2
-1
ID
(A)
-10-3
Limit RDSon = VDS/ID
DC; Tsp = 25 °C
DC; Tamb = 25 °C;
drain mounting pad 1 cm2
tp = 100 µs
tp = 1 ms
tp = 10 ms
tp = 100 ms
IDM = single pulse
Fig. 3. Safe operating area; junction to ambient; continuous and peak drain currents as a function of drain-
source voltage
9. Thermal characteristics
Table 6. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
[1] - 194 225 K/Win free air
[2] - 108 125 K/W
Rth(j-a) thermal resistance
from junction to
ambient
t ≤ 5 s [2] - 37 42 K/W
NXP Semiconductors BSS192
240 V, P-channel vertical D-MOS transistor
BSS192 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet 12 December 2014 5 / 15
Symbol Parameter Conditions Min Typ Max Unit
Rth(j-sp) thermal resistance
from junction to solder
point
- 4 10 K/W
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated and mounting pad for drain 1 cm2.
aaa-014703
tp(s)
10-3 102103
10110-2 10-1
102
10
103
Zth(j-a)
(K/W)
1
duty cycle = 1
0
.
0
1
0.05
0.1
0.2
0.25
0.33
0.5
0.75
0.02
FR4 PCB, standard footprint
Fig. 4. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
aaa-014704
tp(s)
10-3 102103
10110-2 10-1
102
10
103
Zth(j-a)
(K/W)
1
0
.
0
1
0.05
0.1
0.2 0.25
0.33
0.5
0.75
0.02
duty cycle = 1
FR4 PCB, mounting pad for drain 1 cm2
Fig. 5. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
NXP Semiconductors BSS192
240 V, P-channel vertical D-MOS transistor
BSS192 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet 12 December 2014 6 / 15
10. Characteristics
Table 7. Characteristics
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
V(BR)DSS drain-source
breakdown voltage
ID = -10 µA; VGS = 0 V; Tj = 25 °C -240 - - V
VGSth gate-source threshold
voltage
ID = -1 mA; VDS = VGS; Tj = 25 °C -0.8 - -2.8 V
VDS = -200 V; VGS = 0.2 V; Tj = 25 °C - -0.1 -60 µAIDSS drain leakage current
VDS = -60 V; VGS = 0 V; Tj = 25 °C - - -200 nA
VGS = 20 V; VDS = 0 V; Tj = 25 °C - - 100 nAIGSS gate leakage current
VGS = -20 V; VDS = 0 V; Tj = 25 °C - - -100 nA
VGS = -10 V; ID = -200 mA; Tj = 25 °C - 10 12 Ω
VGS = -10 V; ID = -200 mA; Tj = 150 °C - 21 25 Ω
RDSon drain-source on-state
resistance
VGS = -4.5 V; ID = -100 mA; Tj = 25 °C - 13 18 Ω
gfs forward
transconductance
VDS = -10 V; ID = -200 mA; Tj = 25 °C - 200 - mS
Dynamic characteristics
QG(tot) total gate charge - 1.9 5 nC
QGS gate-source charge - 0.3 - nC
QGD gate-drain charge
VDS = -50 V; ID = -250 mA; VGS = -10 V;
Tj = 25 °C
- 0.6 - nC
Ciss input capacitance - 55 90 pF
Coss output capacitance - 20 30 pF
Crss reverse transfer
capacitance
VDS = -25 V; f = 1 MHz; VGS = 0 V;
Tj = 25 °C
- 5 15 pF
td(on) turn-on delay time - 3.2 6 ns
trrise time - 4.6 6 ns
td(off) turn-off delay time - 11.7 20 ns
tffall time
VDS = -50 V; ID = -250 mA; VGS = -10 V;
RG(ext) = 6 Ω; Tj = 25 °C
- 7 12 ns
Source-drain diode
VSD source-drain voltage IS = -200 mA; VGS = 0 V; Tj = 25 °C - 0.86 1.2 V
NXP Semiconductors BSS192
240 V, P-channel vertical D-MOS transistor
BSS192 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet 12 December 2014 7 / 15
VDS (V)
0 -20-16-8 -12-4
aaa-014705
-0.4
-0.6
-0.2
-0.8
-1.0
ID
(A)
0
-6 V
-5 V
VGS = -10 V
-4 V
-3 V
Tj = 25 °C
Fig. 6. Output characteristics: drain current as a
function of drain-source voltage; typical values
aaa-014706
VGS (V)
0 -3-2-1
-10-4
-10-5
-10-3
ID
(A)
-10-6
maxtypmin
Tj = 25 °C; VDS = -10 V
Fig. 7. Sub-threshold drain current as a function of
gate-source voltage
ID (A)
0 -1.0-0.8-0.4 -0.6-0.2
aaa-014707
20
10
30
40
RDSon
0
VGS = -10 V
-4 V
-5 V
Tj = 25 °C
Fig. 8. Drain-source on-state resistance as a function
of drain current; typical values
VGS (V)
0 -10-8-4 -6-2
aaa-014708
20
40
60
RDSon
(Ω)
0
Tj= 150 °C
Tj= 25 °C
ID = -200 mA
Fig. 9. Drain-source on-state resistance as a function
of gate-source voltage; typical values
NXP Semiconductors BSS192
240 V, P-channel vertical D-MOS transistor
BSS192 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet 12 December 2014 8 / 15
VGS (V)
0 -10-8-4 -6-2
aaa-014709
-0.4
-0.6
-0.2
-0.8
-1.0
ID
(A)
0
Tj= 150 °C
Tj= 25 °C
VDS > ID × RDSon
Fig. 10. Transfer characteristics: drain current as a
function of gate-source voltage; typical values
Tj (°C)
-60 1801200 60
aaa-014710
1.0
1.5
0.5
2.0
2.5
a
0
Fig. 11. Normalized drain-source on-state resistance
as a function of junction temperature; typical
values
Tj (°C)
-60 1801200 60
aaa-014711
-1.6
-0.8
-2.4
-3.2
VGS(th)
(V)
0
max
typ
min
ID = -1 mA; VDS = VGS
Fig. 12. Gate-source threshold voltage as a function of
junction temperature
VDS (V)
-10-1 -102
-10-1
aaa-014712
102
10
103
C
(pF)
1
Ciss
Coss
Crss
f = 1 MHz; VGS = 0 V
Fig. 13. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
NXP Semiconductors BSS192
240 V, P-channel vertical D-MOS transistor
BSS192 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet 12 December 2014 9 / 15
QG (nC)
0 21.50.5 1
aaa-014713
-4
-6
-2
-8
-10
VGS
(V)
0
ID = -0.25 A; VDS = -50 V; Tamb = 25 °C
Fig. 14. Gate-source voltage as a function of gate
charge; typical values
017aaa137
VGS
VGS(th)
QGS1 QGS2
QGD
VDS
QG(tot)
ID
QGS
VGS(pl)
Fig. 15. MOSFET transistor: Gate charge waveform
definitions
VSD (V)
0 -1.6-1.2-0.4 -0.8
aaa-014714
-0.4
-0.6
-0.2
-0.8
-1.0
IS
(A)
0
Tj= 150 °C
Tj= 25 °C
VGS = 0 V
Fig. 16. Source current as a function of source-drain voltage; typical values
11. Test information
t1
t2
P
t
006aaa812
duty cycle δ =
t1
t2
Fig. 17. Duty cycle definition
NXP Semiconductors BSS192
240 V, P-channel vertical D-MOS transistor
BSS192 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet 12 December 2014 10 / 15
12. Package outline
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
DIMENSIONS (mm are the original dimensions)
SOT89 TO-243 SC-62 06-03-16
06-08-29
wM
e1
e
EHE
B
B
0 2 4 mm
scale
bp3
bp2
bp1
c
D
Lp
A
Plastic surface-mounted package; exposed die pad for good heat transfer; 3 leads SOT89
1 2 3
UNIT A
mm 1.6
1.4
0.48
0.35
c
0.44
0.23
D
4.6
4.4
E
2.6
2.4
HELp
4.25
3.75
e
3.0
w
0.13
e1
1.5 1.2
0.8
bp2
bp1
0.53
0.40
bp3
1.8
1.4
Fig. 18. Package outline SOT89
NXP Semiconductors BSS192
240 V, P-channel vertical D-MOS transistor
BSS192 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet 12 December 2014 11 / 15
13. Soldering
solder lands
solder resist
occupied area
solder paste
sot089_fr
1.2
1.9
2
2.25
4.75
1
(3×)
0.7
(3×)
0.6
(3×)
1.1
(2×)
1.2
0.85 0.2
0.5
1.7
4.85
3.95
4.6
1.51.5
Dimensions in mm
Fig. 19. Reflow soldering footprint for SOT89
solder lands
solder resist
occupied area
preferred transport direction during soldering
sot089_fw
0.7
5.3
6.6
2.4
3.5
0.5
1.8
(2×)
1.5
(2×)
7.6
1.9 1.9
Dimensions in mm
Fig. 20. Wave soldering footprint for SOT89
NXP Semiconductors BSS192
240 V, P-channel vertical D-MOS transistor
BSS192 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet 12 December 2014 12 / 15
14. Revision history
Table 8. Revision history
Data sheet ID Release date Data sheet status Change notice Supersedes
BSS192 v.4 20141212 Product data sheet - BSS192 v.3
Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines
of NXP Semiconductors
Legal texts have been adapted to the new company name where appropriate
BSS192 v.3 20021120 - BSS192 v.2
BSS192 v.2 20020522 - BSS192 v.1
BSS192 v.1 19970620 -
NXP Semiconductors BSS192
240 V, P-channel vertical D-MOS transistor
BSS192 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet 12 December 2014 13 / 15
15. Legal information
15.1 Data sheet status
Document
status [1][2]
Product
status [3]
Definition
Objective
[short] data
sheet
Development This document contains data from
the objective specification for product
development.
Preliminary
[short] data
sheet
Qualification This document contains data from the
preliminary specification.
Product
[short] data
sheet
Production This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the Internet at URL http://www.nxp.com.
15.2 Definitions
Preview — The document is a preview version only. The document is still
subject to formal approval, which may result in modifications or additions.
NXP Semiconductors does not give any representations or warranties as to
the accuracy or completeness of information included herein and shall have
no liability for the consequences of use of such information.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences
of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the
relevant full data sheet, which is available on request via the local NXP
Semiconductors sales office. In case of any inconsistency or conflict with the
short data sheet, the full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product
is deemed to offer functions and qualities beyond those described in the
Product data sheet.
15.3 Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, NXP Semiconductors does not give
any representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
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or replacement of any products or rework charges) whether or not such
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Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to
make changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
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authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their
applications and products using NXP Semiconductors products, and NXP
Semiconductors accepts no liability for any assistance with applications or
customer product design. It is customer’s sole responsibility to determine
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customer’s applications and products planned, as well as for the planned
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associated with their applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default
in the customer’s applications or products, or the application or use by
customer’s third party customer(s). Customer is responsible for doing all
necessary testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications
and the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
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applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
NXP Semiconductors BSS192
240 V, P-channel vertical D-MOS transistor
BSS192 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet 12 December 2014 14 / 15
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
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Non-automotive qualified products — Unless this data sheet expressly
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NXP Semiconductors accepts no liability for inclusion and/or use of non-
automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards,
customer (a) shall use the product without NXP Semiconductors’ warranty
of the product for such automotive applications, use and specifications, and
(b) whenever customer uses the product for automotive applications beyond
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Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
15.4 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
Bitsound, CoolFlux, CoReUse, DESFire, FabKey, GreenChip,
HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE, ITEC, MIFARE,
MIFARE Plus, MIFARE Ultralight, SmartXA, STARplug, TOPFET,
TrenchMOS, TriMedia and UCODE — are trademarks of NXP
Semiconductors N.V.
HD Radio and HD Radio logo — are trademarks of iBiquity Digital
Corporation.
NXP Semiconductors BSS192
240 V, P-channel vertical D-MOS transistor
BSS192 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet 12 December 2014 15 / 15
16. Contents
1 General description ............................................... 1
2 Features and benefits ............................................1
3 Applications ........................................................... 1
4 Quick reference data ............................................. 1
5 Pinning information ............................................... 2
6 Ordering information ............................................. 2
7 Marking ................................................................... 2
8 Limiting values .......................................................3
9 Thermal characteristics .........................................4
10 Characteristics ....................................................... 6
11 Test information ..................................................... 9
12 Package outline ................................................... 10
13 Soldering .............................................................. 11
14 Revision history ................................................... 12
15 Legal information .................................................13
15.1 Data sheet status ............................................... 13
15.2 Definitions ...........................................................13
15.3 Disclaimers .........................................................13
15.4 Trademarks ........................................................ 14
© NXP Semiconductors N.V. 2014. All rights reserved
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 12 December 2014