Low Power, Low Cost
2.5 V Reference
AD680
Rev. H
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
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registered trademarks are the property of their respective owners.
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Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2005 Analog Devices, Inc. All rights reserved.
FEATURES
Low quiescent current at 250 μA max
Laser trimmed to high accuracy
2.5 V ± 5 mV max (AN, AR grades)
Trimmed temperature coefficient
20 ppm/°C max (AN, AR grades)
Low noise at 8 μV p-p from 0.1 Hz to 10 Hz
250 nV/√Hz wideband
Temperature output pin (N, R packages)
Available in three package styles
8-lead PDIP, 8-lead SOIC, and 3-pin TO-92
GENERAL DESCRIPTION
The AD680 is a band gap voltage reference that provides a fixed
2.5 V output from inputs between 4.5 V and 36 V. The
architecture of the AD680 enables the reference to be operated
at a very low quiescent current while still realizing excellent dc
characteristics and noise performance. Trimming of the high
stability thin-film resistors is performed for initial accuracy and
temperature coefficient, resulting in low errors over temperature.
The precision dc characteristics of the AD680 make it ideal for
use as a reference for DACs that require an external precision
reference. The device is also ideal for ADCs and, in general, can
offer better performance than the standard on-chip references.
Based upon its low quiescent current, which rivals that of many
incomplete 2-terminal references, the AD680 is recommended
for low power applications, such as hand-held, battery-operated
equipment.
A temperature output pin is provided on the 8-lead package
versions of the AD680. The temperature output pin provides an
output voltage that varies linearly with temperature and allows
the AD680 to be configured as a temperature transducer while
providing a stable 2.5 V output.
The AD680 is available in five grades. The AD680AN is speci-
fied for operation from −40°C to +85°C, while the AD680JN is
specified for 0°C to 70°C operation. Both the AD680AN and
AD680JN are available in 8-lead PDIP packages. The AD680AR
is specified for operation from −40°C to +85°C, while the
AD680JR is specified for 0°C to 70°C operation. Both are
available in 8-lead SOIC packages. The AD680JT is specified for
0°C to 70°C operation and is available in a 3-pin TO-92
package.
CONNECTION DIAGRAMS
*
TP DENOTES FACTORY TEST POINT.
NO CONNECTIONS SHOULD BE MADE
TO THESE PINS.
NC = NO CONNECT
AD680
TOP VIEW
(Not to Scale)
TP* 1
+VIN 2
TEMP 3
GND 4
TP*
TP*
VOUT
NC
8
7
6
5
00813-003
Figure 1. 8-Lead PDIP and 8-Lead SOIC Pin Configuration
00813-004
AD680
BOTTOM VIEW
(Not to Scale)
321
+V
IN
V
OUT
GND
Figure 2. Connection Diagram TO-92
PRODUCT HIGHLIGHTS
1. High Accuracy.
The AD680 band gap reference operates on a very low
quiescent current which rivals that of many 2-terminal
references. This makes the complete, higher accuracy AD680
ideal for use in power-sensitive applications.
2. Low Errors.
Laser trimming of both initial accuracy and temperature coef-
ficients results in low errors over temperature without the use
of external components. The AD680AN and AD680AR have
a maximum variation of 6.25 mV between −40°C and +85°C.
3. Low Noise.
The AD680 noise is low, typically 8 μV p-p from 0.1 Hz to
10 Hz. Spectral density is also low, typically 250 nV/√Hz.
4. Temperature Transducer.
The temperature output pin on the 8-lead package versions
enables the AD680 to be configured as a temperature
transducer.
5. Low Cost.
PDIP packaging provides machine insertability, while SOIC
packaging provides surface-mount capability. TO-92
packaging offers a cost-effective alternative to 2-terminal
references, offering a complete solution in the same package
in which 2-terminal references are usually found.
AD680
Rev. H | Page 2 of 12
TABLE OF CONTENTS
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
Output Protection ........................................................................ 4
ESD Caution.................................................................................. 4
Pin Configuration and Connection Diagram............................... 5
Theory of Operation ........................................................................ 6
Applying the AD680 .................................................................... 6
Noise Performance ....................................................................... 6
Turn-on Time................................................................................ 7
Dynamic Performance................................................................. 7
Load Regulation ............................................................................8
Temperature Performance............................................................8
Temperature Output Pin ..............................................................9
Differential Temperature Transducer.........................................9
Low Power, Low Voltage Reference for Data Converters ........9
4.5 V Reference from a 5 V Supply.......................................... 10
Voltage Regulator for Portable Equipment............................. 10
Outline Dimensions....................................................................... 11
Ordering Guide .......................................................................... 12
REVISION HISTORY
8/05—Rev. G to Rev. H
Changes to Ordering Guide ..........................................................11
12/04—Rev. F to Rev. G
Updated Format .................................................................Universal
Changes to Ordering Guide ..........................................................11
5/04—Rev. E to Rev. F
Changes to ORDERING GUIDE ...................................................3
5/03—Rev. D to Rev. E
Changes to ORDERING GUIDE ...................................................3
Added ESD Caution..........................................................................3
Changes to Figure 20.........................................................................7
Updated OUTLINE DIMENSIONS ...............................................8
7/01—Rev. C to Rev. D
Changes to SPECIFICATIONS........................................................2
Changes to ORDERING GUIDE ....................................................3
Table I added ......................................................................................6
AD680
Rev. H | Page 3 of 12
SPECIFICATIONS
TA = 25°C, VIN = 5 V, unless otherwise noted. Specifications in boldface are tested on all production units at final electrical test. Results
from these tests are used to calculate outgoing quality levels. All minimum and maximum specifications are guaranteed.
Table 1.
AD680AN/AD680AR AD680JN/AD680JR AD680JT
Parameter Min Typ Max Min Typ Max Min Typ Max Unit
OUTPUT VOLTAGE
Output Voltage, VO2.495 2.500 2.505 2.490 2.500 2.510 2.490 2.500 2.510 V
Initial Accuracy, VOERR −5 +5 −10 +10 −10 +10 mV
−0.20 +0.20 −0.40 +0.40 −0.40 +0.40 %
OUTPUT VOLTAGE DRIFT1
0°C to 70°C 10 10 25 10 30 ppm/°C
−40°C to +85°C 20 25 25 ppm/°C
LINE REGULATION
4.5 V ≤ +VIN ≤ 15 V 40 40 40 μV/V
(@ TMIN to TMAX) 40 40 40 μV/V
15 V ≤ +VIN ≤ 36 V 40 40 40 μV/V
(@ TMIN to TMAX) 40 40 40 μV/V
LOAD REGULATION
0 < IOUT < 10 mA 80 100 80 100 80 100 μV/mA
(@ TMIN to TMAX) 80 100 80 100 80 100 μV/mA
QUIESCENT CURRENT 195 250 195
250 195
250 μA
(@ TMIN to TMAX) 280 280 280 μA
POWER DISSIPATION 1 1.25 1
1.25 1
1.25 mW
OUTPUT NOISE
0.1 Hz to 10 Hz 8 10 8 10 8 10 μV p-p
Spectral Density, 100 Hz 250 250 250 nV/√Hz
CAPACITIVE LOAD 50 50 50 nF
LONG-TERM STABILITY 25 25 25 ppm/1,000 hr
SHORT-CIRCUIT CURRENT TO GROUND 25 50 25 50 25 50 mA
TEMPERATURE PIN
Voltage Output @ 25°C 540 596 660 540 596 660 mV
Temperature Sensitivity 2 2 mV/°C
Output Current −5 +5 −5 +5 μA
Output Resistance 12 12 kΩ
TEMPERATURE RANGE
Specified Performance −40 +85 0 70 0 70 °C
Operating Performance2−40 +85 −40 +85 −40 +85 °C
1 Maximum output voltage drift is guaranteed for all packages.
2 The operating temperature range is defined as the temperature extremes at which the device will still function. Parts may deviate from their specified performance
outside their specified temperature range.
AD680
Rev. H | Page 4 of 12
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
VIN to Ground 36 V
Power Dissipation (25°C) 500 mW
Storage Temperature −65°C to +125°C
Lead Temperature (Soldering, 10 sec) 300°C
Package Thermal Resistance θJA (All Packages) 120°C/W
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
OUTPUT PROTECTION
Output safe for indefinite short to GND and momentary short
to −VIN.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
AD680
Rev. H | Page 5 of 12
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
*
TP DENOTES FACTORY TEST POINT.
NO CONNECTIONS SHOULD BE MADE
TO THESE PINS.
NC = NO CONNECT
AD680
TOP VIEW
(Not to Scale)
TP*
1
+V
IN 2
TEMP
3
GND
4
TP*
TP*
V
OUT
NC
8
7
6
5
00813-003
Figure 3. 8-Lead PDIP and 8-Lead SOIC Pin Configuration
00813-004
AD680
BOTTOM VIEW
(Not to Scale)
321
+V
IN
V
OUT
GND
Figure 4. Connection Diagram
Table 3. Pin Function Descriptions
Pin No. Mnemonic Descriptions
1, 7, 8 TP Test Point. A factory test point. No connections are made to these pins.
2 +VIN Input Voltage.
3 TEMP Temperature Output.
4 GND Ground.
5 NC No Connect.
6 VOUT Output Voltage.
AD680
Rev. H | Page 6 of 12
THEORY OF OPERATION
Band gap references are the high performance solution for low
supply voltage operation. A typical precision band gap consists
of a reference core and buffer amplifier. Based on a new, pat-
ented band gap reference design (Figure 5), the AD680 merges
the amplifier and the core band gap function to produce a
compact, complete precision reference.
Central to the device is a high gain amplifier with an intentionally
large proportional to absolute temperature (PTAT) input offset.
This offset is controlled by the area ratio of the amplifier input
pair, Q1 and Q2, and is developed across Resistor R1. Transistor
Q12’s base emitter voltage has a complementary to absolute
temperature (CTAT) characteristic. Resistor R2 and the parallel
combination of Resistor R3 and Resistor R4 “multiply” the PTAT
voltage across the R1 resistor. Trimming the R3 and R4 resistors
to the proper ratio produces a temperature invariant of 2.5 V at
the output. The result is an accurate, stable output voltage
accomplished with a minimum number of components.
00813-005
+V
IN
Q11
TEMP
Q12
R2
R1
Q5
Q4
Q1
1
×
Q2 8
×
Q9
R5
Q8
Q3
Q7
Q6
Q10
GND
C1
R6
R7 R4
R3
V
OUT
Figure 5. Schematic Diagram
APPLYING THE AD680
The AD680 is simple to use in virtually all precision reference
applications. When power is applied to +VIN and the GND pin
is tied to ground, VOUT provides a 2.5 V output. The AD680
typically requires less than 250 μA of current when operating
from a supply of 4.5 V to 36 V.
To operate the AD680, the +VIN pin must be bypassed to the
GND pin with a 0.1 μF capacitor tied as close to the AD680 as
possible. Although the ground current for the AD680 is small,
typically 195 μA, a direct connection should be made between
the AD680 GND pin and the system ground plane.
Reference outputs are frequently required to handle fast
transients caused by input switching networks, commonly
found in ADCs and measurement instrumentation equipment.
Many of the dynamic problems associated with this situation
can be minimized with a few simple techniques. Using a series
resistor between the reference output and the load tends to
“decouple” the reference output from the transient source, or a
relatively large capacitor connected from the reference output to
ground can serve as a charge storage element to absorb and
deliver charge as required by the dynamic load. A 50 nF capaci-
tor is recommended for the AD680 in this case; this is large
enough to store the required charge, but small enough not to
disrupt the stability of the reference.
The 8-lead PDIP and 8-lead SOIC packaged versions of the
AD680 also provide a temperature output pin. The voltage on
this pin is nominally 596 mV at 25°C. This pin provides an
output linearly proportional to temperature with a
characteristic of 2 mV/°C.
NOISE PERFORMANCE
The noise generated by the AD680 is typically less than 8 μV p-p
over the 0.1 Hz to 10 Hz band. Figure 6 shows the 0.1 Hz to 10 Hz
noise of a typical AD680. The noise measurement is made with a
band-pass filter made of a 1-pole high-pass filter, with a corner
frequency at 0.1 Hz, and a 2-pole low-pass filter, with a corner
frequency at 12.6 Hz, to create a filter with a 9.922 Hz bandwidth.
00813-006
5μV
1s
100
90
0%
10
Figure 6. 0.1 Hz to 10 Hz Noise
Noise in a 300 kHz bandwidth is approximately 800 μV p-p.
Figure 7 shows the broadband noise of a typical AD680.
AD680
Rev. H | Page 7 of 12
00813-007
500μV
100
90
0%
10
50μs500μV
Figure 7. Broadband Noise at 300 kHz
TURN-ON TIME
Upon application of power (cold start), the time required for
the output voltage to reach its final value within a specified error
band is defined as the turn-on settling time. Two components
normally associated with this are the time for the active circuits
to settle, and the time for the thermal gradients on the chip to
stabilize. The turn-on settling time of the AD680 is about 20 μs
to within 0.025% of its final value, as shown in Figure 8.
00813-008
VIN
V
OUT
100
90
0%
10
10μs5V 1mV
Figure 8. Turn-On Settling Time
The AD680 thermal settling characteristic benefits from its
compact design. Once initial turn-on is achieved, the output
linearly approaches its final value; the output is typically within
0.01% of its final value after 25 ms.
DYNAMIC PERFORMANCE
The output stage of the amplifier is designed to provide the
AD680 with static and dynamic load regulation superior to
less complete references. Figure 9 to Figure 11 display the char-
acteristics of the AD680 output amplifier driving a 0 mA to
10 mA load. Longer settling times result if the reference is
forced to sink any transient current.
In some applications, a varying load may be both resistive and
capacitive in nature, or the load may be connected to the
AD680 by a long capacitive cable.
00813-009
AD680
+V
IN
V
OUT
V
OUT
V
OUT
0V
V
L
249Ω
0.1μF
Figure 9. Transient Load Test Circuit
00813-010
V
OUT
V
L
100
90
0%
10
5μs50mV2V
Figure 10. Large Scale Transient Response
00813-011
VOUT
VIN
100
90
0%
10
5μs5mV2V
Figure 11. Fine Scale Settling for Transient Load
AD680
Rev. H | Page 8 of 12
00813-012
AD680
+V
IN
V
OUT
V
OUT
V
OUT
0V
V
L
249Ω
0.1μFC
L
1000pF
Figure 12. Capacitive Load Transient Response Test Circuit
Figure 13 displays the output amplifier characteristics driving a
1,000 pF, 0 mA to 10 mA load.
00813-013
VOUT
VL
100
90
0%
10
5μs5mV2V
Figure 13. Output Response with Capacitive Load
LOAD REGULATION
Figure 14 depicts the load regulation characteristics of
the AD680.
00813-014
V
OUT
V
L
100
90
0%
10
100μs1mV1V
Figure 14. Typical Load Regulation Characteristics
TEMPERATURE PERFORMANCE
The AD680 is designed for reference applications where tem-
perature performance is important. Extensive temperature
testing and characterization ensure that the device’s performance
is maintained over the specified temperature range.
Some confusion exists in the area of defining and specifying
reference voltage error over temperature. Historically, references
have been characterized using a maximum deviation per degree
centigrade, that is, ppm/°C. However, because of nonlinearities
in temperature characteristics that originated in standard Zener
references (such as “S” type characteristics), most manufac-
turers now use a maximum limit error band approach to specify
devices. This technique involves measuring the output at three
or more different temperatures to specify an output voltage
error band.
00813-015
2.501
2.500
2.498
TEMPERATURE (°C)
–50 6002040
2.499
–10–30 80 100
SLOPE = TC
=V
MAX
– V
MIN
(T
MAX
– T
MIN
)
×
2.5V
×
10
–6
=2.501 – 2.498
(85°C – (–40°C))
×
2.5V
×
10
–6
= 9.6ppm/°C
VOLTS (V)
Figure 15. Typical AD680AN/AD680AR Temperature Drift
Figure 15 shows a typical output voltage drift for the AD680AN/
AD680AR and illustrates the test methodology. The box in
Figure 15 is bounded on the left and right sides by the operat-
ing temperature extremes, and on the top and bottom by the
maximum and minimum output voltages measured over the
operating temperature range.
The maximum height of the box for the appropriate temperature
range and device grade is shown in Table 4. Duplication of these
results requires a combination of high accuracy and stable tem-
perature control in a test system. Evaluation of the AD680 will
produce a curve similar to that in Figure 15, but output readings
could vary depending upon the test equipment used.
Table 4. Maximum Output Change in mV
Maximum Output Change (mV)
Device Grade 0°C to 70°C −40°C to +85°C
AD680JN/AD680JR 4.375 Not applicable
AD680JT 5.250 Not applicable
AD680AN Not applicable 6.250
AD680
Rev. H | Page 9 of 12
TEMPERATURE OUTPUT PIN
The 8-lead package versions of the AD680 provide a tempera-
ture output pin on Pin 3 of each device. The output of Pin 3
(TEMP) is a voltage that varies linearly with temperature. VTEMP
at 25°C is 596 mV, and the temperature coefficient is 2 mV/°C.
Figure 16 shows the output of this pin over temperature.
The temperature pin has an output resistance of 12 kΩ and is
capable of sinking or sourcing currents of up to 5 μA without
disturbing the reference output. This enables the TEMP pin to
be buffered by many inexpensive operational amplifiers that
have bias currents below this value.
760
720
680
640
600
560
520
480
440
–50 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90
00813-016
TEMPERATURE (°C)
TEMP PIN VOLTAGE (mV)
Figure 16. TEMP Pin Transfer Characteristics
DIFFERENTIAL TEMPERATURE TRANSDUCER
Figure 17 shows a differential temperature transducer that can
be used to measure temperature changes in the environment of
the AD680. This circuit operates from a 5 V supply. The
temperature-dependent voltage from the TEMP pin of the
AD680 is amplified by a factor of 5 to provide wider full-scale
range and more current sourcing capability. An exact gain of 5
can be achieved by adjusting the trim potentiometer until the
output varies by 10 mV/°C. To minimize resistance changes
with temperature, use resistors with low temperature
coefficients, such as metal film resistors.
00813-017
6
3
2
7
4
OP90
5V
+
–
R
F
6.98kΩ
1%
R
B
1.69kΩ
1%
R
BP
100Ω
2
3
4
AD680
TEMP
GND
V
IN
0.1μF
5V
Δ
V
OUT
Δ
T= 10mV/°C
Figure 17. Differential Temperature Transducer
LOW POWER, LOW VOLTAGE REFERENCE FOR
DATA CONVERTERS
The AD680 has a number of features that make it ideally suited
for use with ADCs and DACs. The low supply voltage required
makes it possible to use the AD680 with today’s converters that
run on 5 V supplies without having to add a higher supply
voltage for the reference. The low quiescent current (195 μA),
combined with the completeness and accuracy of the AD680,
make it ideal for low power applications, such as hand-held,
battery-operated meters.
The AD7701 is an ADC that is well-suited for the AD680.
Figure 18 shows the AD680 used as the reference for this
converter. The AD7701 is a 16-bit ADC with on-chip digital
filtering intended for the measurement of wide dynamic range
and low frequency signals, such as those representing chemical,
physical, or biological processes. It contains a charge balancing
(Σ–Δ) ADC, a calibration microcontroller with on-chip static
RAM, a clock oscillator, and a serial communications port.
This entire circuit runs on ±5 V supplies. The power dissipation
of the AD7701 is typically 25 mW and, when combined with
the power dissipation of the AD680 (1 mW), the entire circuit
consumes just 26 mW of power.
00813-018
AD680
GND
0.1μF
AD7701
CAL
AGND
DGND
SC2
SC1
CLKOUT
CLKIN
SCLK
SDATA
CS
DRDY
MODE
DATA READY
READ (TRANSMIT)
SERIAL CLOCK
SERIAL DATA
SLEEP 0.1μF
10μF0.1μF
0.1μF
+5V
A
NALO
G
SUPPLY
RANGE
SELECT
CALIBRATE
ANALOG
INPUT
ANALOG
GND
–5V
ANALOG
SUPPLY
0.1μF
0.1μF10μF
V
IN
V
OUT
AV
DD
DV
DD
DV
SS
V
REF
A
IN
AV
SS
BP/UP
Figure 18. Low Power, Low Voltage Supply Reference
for the AD7701 16-Bit ADC
AD680
Rev. H | Page 10 of 12
4.5 V REFERENCE FROM A 5 V SUPPLY
The AD680 can be used to provide a low power, 4.5 V reference,
as shown in Figure 19. In addition to the AD680, the circuit
uses a low power op amp and a transistor in a feedback con-
figuration that provides a regulated 4.5 V output for a power
supply voltage as low as 4.7 V. The high quality tantalum 10 μF
capacitor (C1) in parallel with the ceramic 0.1 μF capacitor (C2)
and the 3.9 Ω resistor (R5) ensure a low output impedance up to
approximately 50 MHz (see Figure 19).
00813-019
6
3
2
7
4
OP90
+IN V+
V–
OUT
–IN
R1
2kΩ
1%
CF
0.1μF
R4
3.57kΩ
R2
2.5kΩ
1%
AD680
V
OUT
GND
V
IN
0.1μF
R3
1kΩCC
3.3μF
2N2907A
4.7V TO 15V
C1
10μF
+C2
0.1μF
R5
3.9Ω
Figure 19. 4.5 V Reference Running from a Single 5 V Supply
VOLTAGE REGULATOR FOR PORTABLE
EQUIPMENT
The AD680 is ideal for providing a stable, low cost, low power
reference voltage in portable equipment power supplies.
Figure 20 shows how the AD680 can be used in a voltage
regulator that not only has low output noise (as compared to a
switch mode design) and low power, but it also has a very fast
recovery after current surges. Some caution should be taken in
the selection of the output capacitors. Too high an ESR (effective
series resistance) could endanger the stability of the circuit. A solid
tantalum capacitor, 16 V or higher, and an aluminum electro-
lytic capacitor, 10 V or higher, are recommended for C1 and C2,
respectively. Also, the path from the ground side of C1 and C2
to the ground side of R1 should be kept as short as possible.
00813-020
2
3
7
6
4
OP777
+
–
R3
510kΩ
IRF9530
AD680
V
OUT
GND
V
IN
C1
68μF
TANT
+C2
1000μF
ELECT
+
2
6
TEMP
3
4
0.1μF
CHARGE
R
INPUT
6V
LEAD-ACID
BATTERY
+
R2
402kΩ1%
R1
402kΩ1%
Figure 20. Voltage Regulator for Portable Equipment
AD680
Rev. H | Page 11 of 12
OUTLINE DIMENSIONS
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099)× 45°
8°
0°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
41
85
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2440)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MS-012AA
Figure 21. 8-Lead Standard Small Outline Package [SOIC]
Narrow Body
(R-8)
Dimensions show in millimeters and (inches)
COMPLIANT TO JEDEC STANDARDS MS-001-BA
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
SEATING
PLANE
0.015
(0.38)
MIN
0.210
(5.33)
MAX
PIN 1
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
8
14
50.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.100 (2.54)
BSC
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
0.060 (1.52)
MAX
0.430 (10.92)
MAX
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
PLANE
0.005 (0.13)
MIN
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 22. 8-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body
(N-8)
Dimensions shown in inches and (millimeters)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS TO-226AA
0.115 (2.92)
0.080 (2.03)
0.115 (2.92)
0.080 (2.03)
0.165 (4.19)
0.125 (3.18)
1
2
3
BOTTOM VIEW
SQ
0.019 (0.482)
0.016 (0.407)
0.105 (2.66)
0.095 (2.42)
0.055 (1.40)
0.045 (1.15)
SEATING
PLANE
0.500 (12.70) MIN
0.205 (5.21)
0.175 (4.45)
0.210 (5.33)
0.170 (4.32)
0.135 (3.43)
MIN
0.050 (1.27)
MAX
Figure 23. 3-Pin Plastic Header-Style Package [TO-92]
(T-3)
Dimensions shown in inches and (millimeters)
AD680
Rev. H | Page 12 of 12
ORDERING GUIDE
Initial
Accuracy
Model
Output
Voltage
VO (V) (mV) (%)
Temperature
Coefficient
(ppm/°C)
Package
Description Package Option
Parts per
Reel
Temperature Range
(°C)
AD680AR 2.5 5 0.20 20 SOIC R-8 −40 to +85
AD680AR-REEL 2.5 5 0.20 20 SOIC R-8 2,500 −40 to +85
AD680AR-REEL7 2.5 5 0.20 20 SOIC R-8 1,000 −40 to +85
AD680ARZ12.5 5 0.20 20 SOIC R-8 −40 to +85
AD680ARZ-REEL712.5 5 0.20 20 SOIC R-8 1,000 −40 to +85
AD680JR 2.5 10 0.40 25 SOIC R-8 0 to 70
AD680JR-REEL7 2.5 10 0.40 25 SOIC R-8 1,000 0 to 70
AD680JRZ12.5 10 0.40 25 SOIC R-8 0 to 70
AD680JRZ-REEL712.5 10 0.40 25 SOIC R-8 1,000 0 to 70
AD680AN 2.5 5 0.20 20 PDIP N-8 −40 to +85
AD680ANZ12.5 5 0.20 20 PDIP N-8 −40 to +85
AD680JN 2.5 10 0.40 25 PDIP N-8 0 to 70
AD680JNZ12.5 10 0.40 25 PDIP N-8 0 to 70
AD680JT 2.5 10 0.40 30 TO-92 T-3 0 to 70
AD680JTZ12.5 10 0.40 30 TO-92 T-3 0 to 70
1 Z = Pb-free part.
©2005 Analog Devices, Inc. All rights reserved. Trademarks
and registered trademarks are the property of their respective owners.
C00813–0–8/05(H)
