MAX1491CAI+T - Maxim Integrated Products, Inc.

General Description

The MAX1491/MAX1493/MAX1495 low-power, 3.5- and

4.5-digit, analog-to-digital converters (ADCs) with inte-

grated liquid crystal display (LCD) drivers operate from a

single 2.7V to 5.25V power supply. They include an inter-

nal reference, a high-accuracy on-chip oscillator, and a

triplexed LCD driver. An internal charge pump generates

the negative supply needed to power the integrated input

buffer for single supply operation. The ADC is config-

urable for either a ±2V or ±200mV input range and it out-

puts its conversion results to an LCD. The MAX1491 is a

3.5-digit (±1999 count) device, and the MAX1493/

MAX1495 are 4.5-digit (±19,999 count) devices.

The MAX1491/MAX1493/MAX1495 do not require exter-

nal-precision integrating or auto-zero capacitors, crystal

oscillators, charge pumps, or other circuitry required

with dual slope ADCs (commonly used in panel meter

circuits). These devices also feature on-chip buffers for

the differential signal and reference inputs, allowing

direct interface with high-impedance signal sources. In

addition, the MAX1491/MAX1493/MAX1495 use continu-

ous internal offset calibration, and offer >100dB rejec-

tion of 50Hz and 60Hz line noise. The MAX1493/

MAX1495 perform enhanced offset calibration at power-

up. The MAX1495 also performs enhanced calibration

on demand. Other features include data hold and peak

hold, and a user programmable low-battery monitor.

The MAX1493/MAX1495 come in a 32-pin 7mm ✕7mm

TQFP package, and the MAX1491 comes in 28-pin

SSOP and 28-pin DIP packages. All devices in this fam-

ily operate over the 0°C to +70°C commercial tempera-

ture range.

Applications

Digital Panel Meters

Hand-Held Meters

Digital Voltmeters

Digital Multimeters

Features

♦High Resolution

MAX1495: 4.5 Digits (±19,999 Count)

MAX1493: 4.5 Digits (±19,999 Count)

MAX1491: 3.5 Digits (±1999 Count)

♦Sigma-Delta ADC Architecture

No Integrating Capacitors Required

No Autozeroing Capacitors Required

>100dB of Simultaneous 50Hz and 60Hz Rejection

♦Operate from a Single 2.7V or 5.25V Supply

♦Selectable Input Range of ±200mV or ±2V

♦Selectable Voltage Reference: Internal 2.048V or

External

♦Internal High-Accuracy Oscillator Needs No

External Components

♦Automatic Offset Calibration

♦Low Power: Maximum 980µA Operating Current

♦Small 32-Pin 7mm ✕7mm TQFP Package (4.5

Digits), 28-Pin SSOP Package (3.5 Digits), and 28-

Pin DIP Package (3.5 Digits)

♦Triplexed LCD Driver

♦Evaluation Kit Available (Order MAX1494EVKIT)

MAX1491/MAX1493/MAX1495

3.5- and 4.5-Digit, Single-Chip

ADCs with LCD Drivers

________________________________________________________________ Maxim Integrated Products 1

TOP VIEW

MAX1493

MAX1495

TQFP

32 28

293031 25

DVDD

INTREF

VNEG

DPON

GND

BP1

BP2

BP3

10 13 15

14 1611 12

DPSET2

HOLD

PEAK

SEG2

SEG1

SEG4

SEG3

SEG5

23 SEG12

24 SEG13

SEG11

SEG10

SEG9

SEG8

SEG7

SEG6

8DPSET1

RANGE

LOWBATT

REF+

REF-

AIN-

AIN+

1AVDD

PART TEMP

RANGE

PIN-

PACKAGE

RESOLUTION

(DIGITS)

MAX1491CAI 0°C to +70°C 28 SSOP 3.5

MAX1491CNI 0°C to +70°C 28 DIP 3.5

MAX1493CCJ 0°C to +70°C 32 TQFP 4.5

MAX1495CCJ 0°C to +70°C 32 TQFP 4.5

Pin Configurations

Ordering Information

19-3053; Rev 2; 5/04

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

Pin Configurations continued at end of data sheet.

EVALUATION KIT

AVAILABLE

MAX1491/MAX1493/MAX1495

3.5- and 4.5-Digit, Single-Chip

ADCs with LCD Drivers

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(AVDD = DVDD = +2.7V to +5.25V, GND = 0, VREF+ - VREF- = 2.048V (external reference), CNEG= 0.1µF. All specifications are TMIN

to TMAX, unless otherwise noted. Typical values are at +25°C, unless otherwise noted.)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional

operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to

absolute maximum rating conditions for extended periods may affect device reliability.

AVDD to GND............................................................-0.3V to +6V

DVDD to GND ...........................................................-0.3V to +6V

AIN+, AIN- to GND...............................VNEG to + (AVDD + 0.3V)

REF+, REF- to GND..............................VNEG to + (AVDD + 0.3V)

LOWBATT to GND ...................................-0.3V to (AVDD + 0.3V)

INTREF, RANGE, DPSET1, DPSET2, PEAK,

HOLD to GND......................................-0.3V to (DVDD + 0.3V)

DPON to GND..........................................-0.3V to (DVDD + 0.3V)

VNEG to GND ...........................................-2.6V to (AVDD + 0.3V)

Maximum Current into Any Pin ...........................................50mA

Continuous Power Dissipation (TA= +70°C)

32-Pin TQFP (derate 20.7mW/°C above +70°C).....1652.9mW

28-Pin SSOP (derate 9.5mW/°C above +70°C) ...........762mW

28-Pin DIP (derate 14.3mW/°C above +70°C)........1142.9mW

Operating Temperature Range...............................0°C to +70°C

Junction Temperature......................................................+150°C

Storage Temperature Range .............................-60°C to +150°C

Lead Temperature (soldering, 10s) .................................+300°C

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

DC ACCURACY

MAX1493/MAX1495 -19,999 +19,999

Noise-Free Resolution MAX1491 -1999 +1999 Count

2.000V range ±1

Integral Nonlinearity (Note 1) INL 200mV range ±1 Count

Range Change Accuracy (VAIN+ - VAIN- = 0.100V) on 200mV range /

(VAIN+ - VAIN- = 0.100V) on 2.0V range 10:1 Ratio

Rollover Error VAIN+ - VAIN- = full scale,

VAIN- - VAIN+ = full scale ±1.0 Count

Output Noise 10 µVP-P

Offset Error (Zero Input Reading) Offset VIN = 0 (Note 2) -0 +0 Reading

Gain Error (Note 3) -0.5 +0.5 %FSR

Offset Drift (Zero Reading Drift) VIN = 0 0.1 µV/°C

Gain Drift ±1 ppm/°C

INPUT CONVERSION RATE

Conversion Rate 5Hz

ANALOG INPUTS (AIN+, AIN-) (bypass to GND with 0.1µF or greater capacitors)

RANGE = GND -2.0 +2.0

Differential (Note 4) RANGE = DVDD -0.2 +0.2AIN Input Voltage Range

Absolute GND referenced -2.2V +2.2V

Normal Mode 50Hz and 60Hz

Rejection (Simultaneously) 50Hz and 60Hz ±2% 100 dB

Common-Mode 50Hz and 60Hz

Rejection (Simultaneously) CMR For 50Hz ±2% and 60Hz ±2%,

RSOURCE < 10kΩ150 dB

Common-Mode Rejection CMR At DC 100 dB

Input Leakage Current TA = +25°C10nA

Input Capacitance 10 pF

Dynamic Input Current (Note 5) -20 +20 nA

MAX1491/MAX1493/MAX1495

3.5- and 4.5-Digit, Single-Chip

ADCs with LCD Drivers

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)

(AVDD = DVDD = +2.7V to +5.25V, GND = 0, VREF+ - VREF- = 2.048V (external reference), CNEG= 0.1µF. All specifications are TMIN

to TMAX, unless otherwise noted. Typical values are at +25°C, unless otherwise noted.)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

LOW-BATTERY VOLTAGE MONITOR (LOWBATT)

LOWBATT Trip Threshold 2.048 V

LOWBATT Leakage Current 10 pA

Hysteresis 20 mV

INTERNAL REFERENCE (REF- = GND, INTREF = DVDD, bypass REF+ to GND with 4.7µF capacitors)

REF Output Voltage VREF AVDD = 5V, TA = +25°C 2.007 2.048 2.089 V

REF Output Short-Circuit Current TA = +25°C1mA

REF Output Temperature

Coefficient TCVREF AVDD = 5V 40 ppm/°C

Load Regulation ISOURCE = 0µA to 300µA,

ISINK = 0µA to 30µA, TA = +25°C (Note 6) 6 mV/µA

Line Regulation 50 µV/V

0.1Hz to 10Hz 25

Noise Voltage 10Hz to 10kHz 400 µVp-p

EXTERNAL REFERENCE (INTREF = GND, bypass REF+ and REF- to GND with 0.1µF or greater capacitors)

Differential (VREF+ - VREF-) 2.048

REF Input Voltage Absolute GND referenced -2.2 +2.2 V

Normal-Mode 50Hz and 60Hz

Rejection (Simultaneously) 50Hz and 60Hz ±2% 100 dB

Common-Mode 50Hz and 60Hz

Rejection (Simultaneously) CMR For 50Hz ±2% and 60Hz ±2%,

RSOURCE < 10kΩ150 dB

Common-Mode Rejection CMR At DC 100 dB

Input Leakage Current TA = +25°C10nA

Input Capacitance 10 pF

Dynamic Input Current (Note 5) -20 +20 nA

CHARGE PUMP

Output Voltage VNEG -2.6 -2.42 -2.3 V

DIGITAL INPUTS (INTREF, RANGE, PEAK, HOLD, DPSET1, DPSET2, DPON)

Input Current IIN VIN = 0 or DVDD -10 +10 µA

Input Low Voltage VINL 0.3 x

DVDD V

Input High Voltage VINH 0.7 x

DVDD V

Input Hysteresis VHYS DVDD = 3.0V 200 mV

MAX1491/MAX1493/MAX1495

3.5- and 4.5-Digit, Single-Chip

ADCs with LCD Drivers

4 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(AVDD = DVDD = +2.7V to +5.25V, GND = 0, VREF+ - VREF- = 2.048V (external reference), CNEG= 0.1µF. All specifications are TMIN

to TMAX, unless otherwise noted. Typical values are at +25°C, unless otherwise noted.)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

POWER SUPPLY

AVDD Voltage AVDD 2.70 5.25 V

DVDD Voltage DVDD 2.70 5.25 V

Power-Supply Rejection AVDD PSRRA(Note 7) 80 dB

Power-Supply Rejection DVDD PSRRD(Note 7) 100 dB

AVDD Current IAVDD (Note 8) 660 µA

DVDD = 5V 320

DVDD Current IDVDD DVDD = 3.3V 180 µA

LCD DRIVER

RMS Segment-On Voltage 1.92 x

DVDD V

RMS Segment-Off Voltage 1 / 3 x

DVDD V

Display Multiplex Rate 107 Hz

LCD Data-Update Rate 2.5 Hz

Note 1: Integral nonlinearity is the derivation of the analog values at any code from its theoretical value after nulling the gain error

and offset error.

Note 2: Offset calibrated.

Note 3: Offset nulled.

Note 4: The input voltage range for the analog inputs is given with respect to the voltage on the negative input of the differential pair.

Note 5: For the range of VAIN+ or VAIN- = -2.2V to +2.2V and VREF+ or VREF- = -2.2V to +2.2V.

Note 6: External load must be constant during conversion for specified accuracy. Guaranteed specification of 2mV/mA is a result of

production test limitations.

Note 7: Measured at DC by changing the power-supply voltage from 2.7V to 5.25V and measuring its effect on the conversion error.

PSRR at 50Hz and 60Hz exceeds 120dB with filter notches of 10, 20, 30, 40, 50, or 60Hz.

Note 8: Analog power-supply currents are measured with all digital inputs at either GND or DVDD. Digital power-supply currents

measured with all digital inputs at either GND or DVDD.

MAX1491/MAX1493/MAX1495

3.5- and 4.5-Digit, Single-Chip

ADCs with LCD Drivers

_______________________________________________________________________________________ 5

MAX1493/MAX1495 (±200mV INPUT RANGE)

INL vs. DISPLAY COUNT

MAX1491/3/5 toc01

DISPLAY COUNT

INL (COUNTS)

10,0000-10,000

-0.5

0.5

1.0

-1.0

-20,000 20,000

MAX1493/MAX1495 (±2V INPUT RANGE)

INL vs. DISPLAY COUNT

MAX1491/3/5 toc02

DISPLAY COUNT

INL (COUNTS)

10,0000-10,000

-0.5

0.5

1.0

-1.0

-20,000 20,000

NOISE DISTRIBUTION

MAX1491/3/5 toc03

NOISE (COUNTS)

PERCENTAGE OF UNITS (%)

0.80.70.60.50.40.30.20.10-0.1

-0.2

SUPPLY CURRENT

vs. SUPPLY VOLTAGE

MAX1491/3/5 toc04

SUPPLY VOLTAGE (V)

SUPPLY CURRENT (µA)

4.754.253.753.25

100

200

300

400

500

600

700

2.75 5.25

ANALOG SUPPLY

DIGITAL SUPPLY

MAX1493/MAX1495

GAIN ERROR vs. SUPPLY VOLTAGE

MAX1491/3/5 toc05

SUPPLY VOLTAGE (V)

GAIN ERROR (% FULL SCALE)

4.754.253.25 3.75

-0.08

-0.04

-0.06

-0.02

0.02

0.04

0.06

0.08

-0.10

2.75 5.25

MAX1493/MAX1495

GAIN ERROR vs. TEMPERATURE

MAX1491/3/5 toc06

TEMPERATURE (°C)

GAIN ERROR (% FULL SCALE)

605030 402010

-0.09

-0.08

-0.07

-0.06

-0.05

-0.04

-0.03

-0.02

-0.01

-0.10

070

Typical Operating Characteristics

(AVDD = DVDD = 5V, GND = 0, REF+ = 2.048V, REF- = GND, RANGE = DVDD, TA= +25°C.)

MAX1491/MAX1493/MAX1495

3.5- and 4.5-Digit, Single-Chip

ADCs with LCD Drivers

6 _______________________________________________________________________________________

INTERNAL REFERENCE VOLTAGE

vs. TEMPERATURE

MAX1491/3/5 toc07

TEMPERATURE (°C)

REFERENCE VOLTAGE (V)

605040302010

2.046

2.045

2.047

2.049

2.048

2.051

2.050

2.053

2.052

2.054

2.044

070

INTERNAL REFERENCE VOLTAGE

vs. ANALOG SUPPLY VOLTAGE

MAX1491/3/5 toc08

SUPPLY VOLTAGE (V)

REFERENCE VOLTAGE (V)

4.754.253.753.25

2.045

2.046

2.047

2.048

2.049

2.050

2.044

2.75 5.25

SUPPLY CURRENT

vs. TEMPERATURE

MAX1491/3/5 toc09

TEMPERATURE (°C)

SUPPLY CURRENT (µA)

605040302010

100

200

300

400

500

600

700

070

ANALOG SUPPLY

DIGITAL SUPPLY

CHARGE-PUMP OUTPUT VOLTAGE

vs. ANALOG SUPPLY VOLTAGE

MAX1491/3/5 toc10

SUPPLY VOLTAGE (V)

VNEG VOLTAGE (V)

4.754.253.753.25

-2.48

-2.46

-2.44

-2.42

-2.40

-2.50

2.75 5.25

VNEG STARTUP SCOPE SHOT

MAX1491/3/5 toc11

20ms/div

2V/div

1V/div

VDD

VNEG

CNEG = 0.1µF

OFFSET ERROR

vs. COMMON-MODE VOLTAGE

MAX1491/3/5 toc12

COMMON-MODE VOLTAGE (V)

OFFSET ERROR (COUNTS)

1.51.0-1.5 -1.0 -0.5 0 0.5

-0.15

-0.10

-0.05

0.05

0.10

0.15

0.20

-0.20

-2.0 2.0

Typical Operating Characteristics (continued)

(AVDD = DVDD = 5V, GND = 0, REF+ = 2.048V, REF- = GND, RANGE = DVDD, TA= +25°C.)

MAX1491/MAX1493/MAX1495

3.5- and 4.5-Digit, Single-Chip

ADCs with LCD Drivers

_______________________________________________________________________________________ 7

Pin Description

MAX1491 MAX1493

MAX1495

NAME FUNCTION

1 30 INTREF Internal Reference Logic Input. Connect to GND to select external reference mode. Connect

to DVDD to select the internal reference mode.

231DV

DD Digital Power Input. Connect DVDD to a 2.7V to 5.25V power supply. Bypass DVDD to GND

with a 0.1µF and a 4.7µF capacitor.

3 32 GND Ground

41AV

DD Analog Power Input. Connect AVDD to a 2.7V to 5.25V power supply. Bypass AVDD to GND

with a 0.1µF and a 4.7µF capacitor.

5 2 AIN+ Positive Analog Input. Positive side of fully differential analog input. Bypass AIN+ to GND with

a 0.1µF or greater capacitor.

6 3 AIN- Negative Analog Input. Negative side of fully differential analog input. Bypass AIN- to GND

with a 0.1µF or greater capacitor.

7 4 REF-

Negative Reference Input. For internal reference operation, connect REF- to GND. For

external reference operation, bypass REF- to GND with a 0.1µF capacitor and set VREF- from

-2.2V to +2.2V, provided VREF+ > VREF-.

8 5 REF+

Positive Reference Input. For internal reference operation, connect a 4.7µF capacitor from

REF+ to GND. For external reference operation, bypass REF+ to GND with a 0.1µF capacitor

and set VREF+ from -2.2V to +2.2V, provided VREF+ > VREF-.

9 6 LOWBATT Low Batter y Inp ut. W hen V

LOWB ATT

< 2.048V ( typ ) , the LO WBATT sym b ol on the LC D tur ns on.

10 7 RANGE Range Logic Input. RANGE controls the fully differential analog input range. Connect to GND

for the ±2V input range. Connect to DVDD for the ±200mV input range.

11 8 DPSET1 Decimal Point Logic Input 1. Controls the decimal point of the LCD. See the Decimal Point

Control section.

12 9 DPSET2 Decimal Point Logic Input 2. Controls the decimal point of the LCD. See the Decimal Point

Control section.

13 10 PEAK Peak Logic Input. Connect to DVDD to display the highest ADC value on the LCD. Connect to

GND to disable the peak function.

14 11 HOLD

Hold Logic Input. Connect to DVDD to hold the current ADC value on the LCD. Connect to

GND to update the LCD at a rate of 2.5Hz and disable the hold function. For the MAX1495,

placing the device into hold mode initiates an enhanced offset calibration. Assert HOLD high

for a minimum of 2s to ensure the completion of enhanced offset calibration.

15 12 SEG1 LCD Segment 1 Driver

16 13 SEG2 LCD Segment 2 Driver

17 14 SEG3 LCD Segment 3 Driver

18 15 SEG4 LCD Segment 4 Driver

19 16 SEG5 LCD Segment 5 Driver

20 17 SEG6 LCD Segment 6 Driver

MAX1491/MAX1493/MAX1495

3.5- and 4.5-Digit, Single-Chip

ADCs with LCD Drivers

8 _______________________________________________________________________________________

Pin Description (continued)

MAX1491 MAX1493

MAX1495

NAME FUNCTION

21 18 SEG7 LCD Segment 7 Driver

22 19 SEG8 LCD Segment 8 Driver

23 20 SEG9 LCD Segment 9 Driver

24 21 SEG10 LCD Segment 10 Driver

25 25 BP3 LCD Backplane 3 Driver

26 26 BP2 LCD Backplane 2 Driver

27 27 BP1 LCD Backplane 1 Driver

28 29 VNEG -2.5V Charge-Pump Voltage Output. Connect a 0.1µF capacitor from VNEG to GND.

— 22 SEG11 LCD Segment 11 Driver

— 23 SEG12 LCD Segment 12 Driver

— 24 SEG13 LCD Segment 13 Driver

— 28 DPON Decimal Point Enable Input. Controls the decimal point of the LCD. See the Decimal Point

Control section. Connect to DVDD to enable the decimal point.

MAX1493

MAX1495

BINARY-TO-BCD

CONVERTERS

AND

LCD DRIVERS

ADC

INPUT

BUFFERS

-2.5V

AIN+

AIN-

REF+

REF-

+2.5V

AVDD DVDD

2.048V

BANDGAP

REFERENCE

OSCILLATOR/

CLOCK

DPSET1 DPSET2

SEG1

SEG13

BP1

BP2

BP3

RANGE

CONTROL

+2.5V

GND

A = 1.22

CONTROL

CHARGE

PUMP

-2.5V

LOWBATTVNEG

INTREF

DPON HOLD PEAK

Figure 1. MAX1493/MAX1495 Functional Diagram

MAX1491/MAX1493/MAX1495

3.5- and 4.5-Digit, Single-Chip

ADCs with LCD Drivers

_______________________________________________________________________________________ 9

Detailed Description

The MAX1491/MAX1493/MAX1495 low-power, highly

integrated ADCs with LCD drivers convert a ±2V differ-

ential input voltage (one count is equal to 100µV for the

MAX1493/MAX1495 and 1mV for the MAX1491) with a

sigma-delta ADC and output the result to an LCD. An

additional ±200mV input range (one count is equal to

10µV for the MAX1493/MAX1495 and 100µV for the

MAX1491) is available to measure small signals with

increased resolution.

These devices operate from a single 2.7V to 5.25V power

supply and offer 3.5-digit (MAX1491) or 4.5-digit

(MAX1493/MAX1495) conversion results. An internal

2.048V reference, internal charge pump and a high-accu-

racy on-chip oscillator eliminate external components.

These devices also feature on-chip buffers for the dif-

ferential input signal and external reference inputs,

allowing direct interface with high-impedance signal

sources. In addition, they use continuous internal offset

calibration, and offer >100dB of 50Hz and 60Hz line

noise rejection. Other features include data hold and

peak hold, and a low-battery monitor. The MAX1495

also performs enhanced offset calibration on demand.

Analog Input Protection

Internal protection diodes limit the analog input range

from VNEG to (AVDD + 0.3V). If the analog input

exceeds this range, limit the input current to 10mA.

Internal Analog Input/

Reference Buffers

The MAX1491/MAX1493/MAX1495 analog input/refer-

ence buffers allow the use of high-impedance signal

sources. The input buffers’ common-mode input range

allows the analog inputs and reference to range from

-2.2V to +2.2V.

Modulator

The MAX1491/MAX1493/MAX1495 perform analog-to-

digital conversions using a single-bit, 3rd-order, sigma-

delta modulator. The sigma-delta modulation converts

the input signal into a digital pulse train whose average

duty cycle represents the digitized signal information.

The modulator quantizes the input signal at a much

higher sample rate than the bandwidth of the input.

The MAX1491/MAX1493/MAX1495 modulator provides

3rd-order frequency shaping of the quantization noise

resulting from the single-bit quantizer. The modulator is

fully differential for maximum signal-to-noise ratio and

minimum susceptibility to power-supply noise. A single-

bit data stream is then presented to the digital filter for

processing, to remove the frequency-shaped quantiza-

tion noise.

Digital Filtering

The MAX1491/MAX1493/MAX1495 contain an on-chip

digital lowpass filter that processes the data stream

from the modulator using a SINC4 (sinx/x)4response.

The SINC4filter has a settling time of four output data

periods (4 x 200ms).

The MAX1491/MAX1493/MAX1495 have 25% overrange

capability built into the modulator and digital filter:

Filter Characteristics

Figure 2 shows the filter frequency response. The SINC4

characteristic -3dB cutoff frequency is 0.228 times the

first notch frequency (5Hz). The oversampling ratio

(OSR) for the MAX1491 is 128 and the OSR for the

MAX1493/MAX1495 is 1024.

The output data rate for the digital filter corresponds

with the positioning of the first notch of the filter’s fre-

quency response. The notches of the SINC4filter are

repeated at multiples of the first notch frequency. The

SINC4filter provides an attenuation of better than

100dB at these notches. For example, 50Hz is equal to

10 times the first notch frequency and 60Hz is equal to

12 times the first notch frequency.

Hz N

()=

()

⎡

⎣

⎢

⎤

⎦

⎥

-N

Hf N

()

sin

⎛

⎝

⎜⎞

⎠

⎟

⎛

⎝

⎜⎞

⎠

⎟

⎡

⎣

⎢

⎤

⎦

⎥

FREQUENCY (Hz)

GAIN (dB)

5040302010

-160

-120

-80

-40

-200

060

Figure 2. Frequency Response of the SINC4Filter (Notch at 60Hz)

MAX1491/MAX1493/MAX1495

Internal Clock

The MAX1491/MAX1493/MAX1495 contain an internal

oscillator. Using the internal oscillator saves board

space by removing the need for an external clock

source. The oscillator is optimized to give 50Hz and

60Hz power supply and common-mode rejection.

Charge Pump

The MAX1491/MAX1493/MAX1495 contain an internal

charge pump to provide the negative supply voltage for

the internal analog input/reference buffers. The bipolar

input range of the analog input/reference buffers allows

the devices to accept negative inputs with high source

impedances. For the charge pump to operate correctly,

connect a 0.1µF capacitor from VNEG to GND.

LCD Driver

The MAX1491/MAX1493/MAX1495 contain the neces-

sary backplane and segment driver outputs to drive

3.5-digit (MAX1491) and 4.5-digit (MAX1493/MAX1495)

LCDs. The LCD update rate is 2.5Hz. Figures 4–7 show

the connection schemes for a standard LCD. The

MAX1491/MAX1493/MAX1495 automatically display the

results of the ADC.

Triplexing

An internal resistor string of three equal-value resistors

(52kΩ, 1% matching) is used to generate the display

drive voltages. One end of the string is connected to

DVDD and the other end is connected to GND. Note that

VLCD (VLCD = DVDD - GND) should be three times the

threshold voltage for the liquid-crystal material used.

The connection diagram for a typical 7-segment display

font with two annunciators is illustrated in Figure 3 and

Figure 8. The MAX1491/MAX1493/MAX1495 numeric

display drivers (4.5 digits, 3.5 digits) use this configura-

tion to drive a triplexed LCD with three backplanes and

13 segment driver lines (10 for 3.5 digits). Figures 4 and

5 show the assignment of the 4.5-digit display segments

and Figures 6 and 7 show the assignment of the 3.5-

digit display segments.

The voltage waveforms of the backplane lines and y

segment line (Figure 3) have been chosen as an exam-

ple. This line intersects with BP1 to form the a segment,

with BP2 to form the g segment, and with BP3 to form

the d segment. Eight different ON/OFF combinations of

the a, g, and d segments and their corresponding

waveforms of the y segment line are illustrated in

Figures 9 and 10. The schematic diagram in Figure 8

shows that each intersection acts as a capacitance

from segment line to common line. Figure 11 illustrates

the voltage across the g segment.

The RMS voltage across the segment determines the

degree of polarization for the liquid-crystal material and

thus the contrast of the segment. The RMS OFF voltage

is always VLCD / 3, whereas the RMS ON voltage is

always 1.92VLCD / 3. This is illustrated in Figure 11. The

ratio of RMS ON to OFF voltage is fixed at 1.92 for a

triplexed LCD.

Figure 12 illustrates contrast vs. applied RMS voltage

with a VLCD of 3.1V. The RMS ON voltage is 2.1V and

the RMS OFF voltage is 1.1V. The OFF segment has a

contrast of less than 5%, while the ON segments have

greater than 85% contrast.

3.5- and 4.5-Digit, Single-Chip

ADCs with LCD Drivers

10 ______________________________________________________________________________________

Table 1. List of LCD Manufacturers

MANUFACTURER WEBSITE PART NUMBER DESCRIPTION

04-0924-00 3.5 digit, 5V

04-0924-01 3.5 digit, 3V

04-0925-00 4.5 digit, 5V

DCI, Inc. www.dciincorporated.com

04-0925-01 4.5 digit, 3V

The following site has links to other custom LCD manufacturers: www.earthlcd.com/mfr.htm

XYZ

DP ANNUNCIATOR

BP1

BP2

BP3

Figure 3. Connection Diagrams for Typical Seven-Segment

Displays

MAX1491/MAX1493/MAX1495

3.5- and 4.5-Digit, Single-Chip

ADCs with LCD Drivers

______________________________________________________________________________________ 11

HOLD LOW BATTPEAK

BP1

BP2

BP3

Figure 4. Backplane Connection for the MAX1493/MAX1495 (4.5 Digits)

HOLD LOW BATT

PEAK

SEG13: PEAK, HOLD, N.C.

SEG2: A1, G1, D1

SEG12: F4, E4, DP4

SEG11: A4, G4, D4

SEG10: B4, C4, BC5

SEG9: F3, E3, DP3

SEG8: A3, G3, D3

SEG1: B1, C1, ANNUNCIATOR

SEG3: F1, E1, DP1

SEG4: B2, C2, LOWBATT

SEG5: A2, G2, D2

SEG6: F2, E2, DP2

SEG7: B3, C3, MINUS

ANNUNCIATOR

Figure 5. Segment Connection for the MAX1493/MAX1495 (4.5 Digits)

MAX1491/MAX1493/MAX1495

3.5- and 4.5-Digit, Single-Chip

ADCs with LCD Drivers

12 ______________________________________________________________________________________

HOLD LOW BATTPEAK

BP1

BP2

BP3

BP1

BP2

BP3 DP DP

XYZ

Figure 6. Backplane Connection for the MAX1491 (3.5 Digits)

HOLD LOW BATT

PEAK

SEG10: PEAK, HOLD, BC4

SEG2: A1, G1, D1

SEG9: F3, E3, DP3

SEG8: A3, G3, D3

SEG1: B1, C1, ANNUNCIATOR

SEG3: F1, E1, DP1

SEG4: B2, C2, LOWBATT

SEG5: A2, G2, D2

SEG6: F2, E2, DP2

SEG7: B3, C3, MINUS

ANNUNCIATOR

Figure 7. Segment Connection for the MAX1491 (3.5 Digits)

Figure 8. Schematic of Display Digit

MAX1491/MAX1493/MAX1495

3.5- and 4.5-Digit, Single-Chip

ADCs with LCD Drivers

______________________________________________________________________________________ 13

φ1φ2φ3φ1' φ2' φ3'

V+

V-

V+

V-

V+

V-

V+

V-

V+

V-

V+

V-

V+

V-

VLCD

BP1

BP2

BP3

ALL

OFF

a ON

g, d OFF

g ON

a, d OFF

d ON

a, g OFF

FREQUENCY = 107Hz

φ1, φ2, φ3 - - BP HIGH WITH RESPECT TO SEGMENT (BP+ TIME)

φ1', φ2', φ3' - - BP LOW WITH RESPECT TO SEGMENT (BP- TIME)

BP1 ACTIVE DURING φ1 AND φ1'

BP2 ACTIVE DURING φ2 AND φ2'

BP3 ACTIVE DURING φ3 AND φ3'

V+ = DVDD, VH = 2/3 DVDD

VL = 1/3 VLCD, V- = GND

VLCD = DVDD - GND

Figure 9. LCD Voltage Waveform—Combinations 1–4 (BP1/2/3, SEGa/d/g)

MAX1491/MAX1493/MAX1495

3.5- and 4.5-Digit, Single-Chip

ADCs with LCD Drivers

14 ______________________________________________________________________________________

φ1φ2φ3φ1' φ2' φ3'

V+

V-

V+

V-

V+

V-

V+

V-

V+

V-

V+

V-

V+

V-

VLCD

BP1

BP2

BP3

ALL

OFF

a, d ON

g OFF

a, g ON

d OFF

g, d ON

a OFF

FREQUENCY = 107Hz

φ1, φ2, φ3 - - BP HIGH WITH RESPECT TO SEGMENT (BP+ TIME)

φ1', φ2', φ3' - - BP LOW WITH RESPECT TO SEGMENT (BP- TIME)

BP1 ACTIVE DURING φ1 AND φ1'

BP2 ACTIVE DURING φ2 AND φ2'

BP3 ACTIVE DURING φ3 AND φ3'

V+ = DVDD, VH = 2/3 DVDD

VL = 1/3 VLCD, V- = GND

VLCD = DVDD - GND

Figure 10. LCD Voltage Waveform—Combinations 5–8 (BP1/2/3, SEGa/d/g)

MAX1491/MAX1493/MAX1495

3.5- and 4.5-Digit, Single-Chip

ADCs with LCD Drivers

______________________________________________________________________________________ 15

φ1φ2φ3φ1' φ2' φ3'

VLCD

-VLCD

0VRMS = VLCD / 3 (OFF)

VLCD

-VLCD

0VRMS = VLCD / 3 (OFF)

VLCD

-VLCD

0VRMS = 1.92VLCD / 3 (ON)

VLCD

-VLCD

0VRMS = 1.92VLCD / 3 (ON)

ALL

OFF

φ1, φ2, φ3 - - BP HIGH WITH RESPECT TO SEGMENT (BP+ TIME)

φ1', φ2', φ3' - - BP LOW WITH RESPECT TO SEGMENT (BP- TIME)

BP1 ACTIVE DURING φ1 AND φ1'

BP2 ACTIVE DURING φ2 AND φ2'

BP3 ACTIVE DURING φ3 AND φ3'

VG = VY - VBP2 (DIFFERENCE BETWEEN SEGMENT LINE Y AND BP2 VOLTAGE)

VOLTAGE CONTRAST RATIO = VRMS ON / VRMSOFF = 1.922

a ON

g, d OFF

a, g ON

d OFF

ALL

Figure 11. Voltage Waveforms on the g Segment

MAX1491/MAX1493/MAX1495

3.5- and 4.5-Digit, Single-Chip

ADCs with LCD Drivers

16 ______________________________________________________________________________________

012345

APPLIED VOLTAGE (VRMS)

100

CONTRAST (%)

TA = +25°C

VON = 2.1VRMS

Ø = -10°C

Ø = 0°C

Ø = +10°C

Ø = -30°C

VOFF =

1.1VRMS

Ø+

Ø-

Figure 12. Contrast vs. Applied RMS Voltage

MAX1491/MAX1493/MAX1495

3.5- and 4.5-Digit, Single-Chip

ADCs with LCD Drivers

______________________________________________________________________________________ 17

If ghosting is present on the LCD, the RMS OFF voltage

is too high. Choose an LCD with a higher RMS OFF

voltage or decrease DVDD.

Decimal Point Control

The MAX1491/MAX1493/MAX1495 allow for full deci-

mal-point control and feature leading-zero suppression.

Use DPON, DPSET1, and DPSET2 to set the value of

the decimal point. Tables 2 and 3 show the truth tables

of the DPON, DPSET1, and DPSET2 that determine

which decimal point is used.

Reference

The MAX1491/MAX1493/MAX1495 reference sets the

full-scale range of the ADC transfer function. With a

nominal 2.048V reference, the ADC full-scale range is

±2V with RANGE equal to GND. With RANGE equal to

DVDD, the full-scale range is ±200mV. A decreased ref-

erence voltage decreases full-scale range (see the

Transfer Functions section).

The MAX1491/MAX1493/MAX1495 accept either an

external reference or an internal reference. The INTREF

input selects the reference mode.

For internal reference operation, connect INTREF to

DVDD, connect REF- to GND, and bypass REF+ to

GND with a 4.7µF capacitor. The internal reference pro-

vides a nominal 2.048V source between REF+ and

GND. The internal reference temperature coefficient is

typically 40ppm/°C.

Connect INTREF to GND to use the external reference.

The external reference inputs, REF+ and REF-, are fully

differential. For a valid external reference input, VREF+

must be greater than VREF-. Bypass REF+ and REF-

with a 0.1µF or greater capacitor to GND in external ref-

erence mode.

Figure 13 shows the MAX1493/MAX1495 operating with

an external differential reference. In this mode, REF- is

connected to the top of the strain gauge and REF+ is

connected to the midpoint of the resistor-divider on the

supply.

Applications Information

Power-On

At power-on, the digital filter and modulator circuits

reset. The MAX1493/MAX1495 allow 6s for the refer-

ence to stabilize before performing enhanced offset

calibration. During these 6s, the MAX1493/MAX1495

display 1.2V to 1.5V when a stable reference is detect-

ed. If a valid reference is not found, the MAX1493/

MAX1495 time out after 6s and begin enhanced offset

calibration. Enhanced offset calibration typically lasts

2s. The MAX1493/MAX1495 begin converting after

enhanced offset calibration.

Offset Calibration

The MAX1491/MAX1493/MAX1495 offer on-chip offset

calibration. The MAX1491/MAX1493/MAX1495 calibrate

offset during every conversion cycle. The MAX1495

Table 2. Decimal-Point Control Table (MAX1493/MAX1495)

DPON DPSET1 DPSET2 DISPLAY OUTPUT ZERO INPUT READING

0 0 0 1 8 8 8 8 0

0 0 1 1 8 8 8 8 0

0 1 0 1 8 8 8 8 0

0 1 1 1 8 8 8 8 0

1 0 0 1 8 8 8.8 0.0

1 0 1 1 8 8.8 8 0.00

1 1 0 1 8.8 8 8 0.000

1 1 1 1.8 8 8 8 0.0000

Table 3. Decimal-Point Control Table (MAX1491)

DPSET1 DPSET2 DISPLAY OUTPUT ZERO INPUT READING

0 0 1 8 8.8 0.0

0 1 1 8.8 8 0.00

1 0 1.8 8 8 0.000

1 1 1 8 8 8 000

MAX1491/MAX1493/MAX1495

3.5- and 4.5-Digit, Single-Chip

ADCs with LCD Drivers

18 ______________________________________________________________________________________

offers enhanced offset calibration on demand. Connect

HOLD to DVDD for 2s to perform enhanced offset cali-

bration.

Peak

The MAX1491/MAX1493/MAX1495 feature peak detec-

tion circuitry. When activated (PEAK connected to DVDD),

the devices display only the highest voltage measured to

the LCD. First, the current ADC result is displayed. Then

the new ADC conversion result is compared to this value.

If the new value is larger than the previous peak value,

the new value is displayed. If the new value is less than

the previous peak value, the display remains unchanged.

Connect PEAK to GND to clear the peak value and dis-

able the peak function. The peak function is only valid for

the -19,487 to +19,999 range for the MAX1493/

MAX1495 and -1217 to +1999 for the MAX1491.

Hold

The MAX1491/MAX1493/MAX1495 feature data HOLD

circuitry. When activated (HOLD connected to DVDD),

the devices hold the current reading on the LCD.

Low Battery

The MAX1491/MAX1493/MAX1495 feature a low-battery

detection input. When the voltage at LOWBATT drops

below 2.048V (typ), the LOWBATT segment of the LCD

turns on.

Strain Gauge Measurement

Connect the differential inputs of the MAX1491/

MAX1493/MAX1495 to the bridge network of the strain

gauge. In Figure 13, the analog supply voltage powers

the bridge network and the MAX1491/MAX1493/

MAX1495 along with its reference voltage. The

MAX1491/MAX1493/MAX1495 handle an analog input

voltage range of ±200mV or ±2V full scale. The ana-

log/reference inputs of the part allow the analog input

range to have an absolute value anywhere between

-2.2V and +2.2V.

4–20mA Measurement

To measure 4–20mA signals, connect a shunt resistor

across AIN+ and AIN- to create the ±2V or ±200mV

input voltage (see Figure 14).

Table 4. LCD Priority Table

HOLD PEAK DISPLAYS

DVDD X Current value

GND DVDD Peak value

GND GND Latest ADC result

Figure 13. Strain-Gauge Application with the MAX1491/MAX1493/

MAX1495

MAX1491

MAX1493

MAX1495

AVDD DVDD

4.7µF

0.1µF

ANALOG SUPPLY

FERRITE

BEAD

RREF

ACTIVE

GAUGE

DUMMY

GAUGE

REF+

VNEG

REF-

AIN+

AIN-

GND

4.7µF

0.1µF

INTREF

0.1µF

Figure 14. 4–20mA Measurement

0.1µF

AIN-

AIN+

4–20mA

R = 100Ω for ±2V RANGE

10Ω for ±200mV RANGE

0.1µF

MAX1491

MAX1493

MAX1495

±1.8.8.8.8

Transfer Functions

Figures 15–18 show the MAX1491/MAX1493s’ transfer

functions. The transfer function for the MAX1493/

MAX1495 with AIN+ - AIN- ≥0 and RANGE = GND is:

The transfer function for the MAX1493 with AIN+ - AIN-

< 0 and RANGE = GND is:

The transfer function for the MAX1491 with AIN+ - AIN-

≥0 and RANGE = GND is:

The transfer function for the MAX1491 with AIN+ - AIN-

< 0 and RANGE = GND is:

The transfer function for the MAX1493/MAX1495 with

AIN+ - AIN- ≥0 and RANGE = DVDD is:

The transfer function for the MAX1493 with AIN+ - AIN-

< 0 and RANGE = DVDD is:

The transfer function for the MAX1491 with AIN+ - AIN-

≥0 and RANGE = DVDD is:

The transfer function for the MAX1491 with AIN+ - AIN-

< 0 and RANGE = DVDD is:

Counts VV

AIN AIN

REF REF

=× ×

⎛

⎝

⎜⎞

⎠

⎟×+

1 024 2000 10 1.

Counts VV

AIN AIN

REF REF

=×

⎛

⎝

⎜⎞

⎠

⎟××

1 024 2000 10. -

Counts VV

AIN AIN

REF REF

=× ×

⎛

⎝

⎜⎞

⎠

⎟×+

1 024 20 000 10 1. ,

Counts VV

AIN AIN

REF REF

=×

⎛

⎝

⎜⎞

⎠

⎟××

1 024 20 000 10. ,

Counts VV

AIN AIN

REF REF

=× ×

⎛

⎝

⎜⎞

⎠

⎟+

1 024 2000 1.

Counts VV

AIN AIN

REF REF

=×

⎛

⎝

⎜⎞

⎠

⎟×

1 024 2000.

Counts VV

AIN AIN

REF REF

=× ×

⎛

⎝

⎜⎞

⎠

⎟+

1 024 20 000 1. ,

Counts VV

AIN AIN

REF REF

=×

⎛

⎝

⎜⎞

⎠

⎟×

1 024 20 000. ,

MAX1491/MAX1493/MAX1495

3.5- and 4.5-Digit, Single-Chip

ADCs with LCD Drivers

______________________________________________________________________________________ 19

Figure 15. MAX1493/MAX1495 Transfer Function ±2V Range

-2V 0

ANALOG INPUT VOLTAGE

+2V

LCD

1 - - - -

19,999

- 0

- 1

- 2

-19,999

- 1 - - - -

-100µV100µV

Figure 16. MAX1493/MAX1495 Transfer Function ±200mV Range

-200mV 0

ANALOG INPUT VOLTAGE

+200mV

LCD

1 - - - -

19,999

- 0

- 1

- 2

-19,999

- 1 - - - -

-10µV10µV

MAX1491/MAX1493/MAX1495

Supplies, Layout, and Bypassing

Power up AVDD and DVDD before applying an analog

input and external reference voltage to the device. If

this is not possible, limit the current into these inputs to

50mA. Isolate the digital supply from the analog supply

with a low-value resistor (10Ω) or ferrite bead when the

analog and digital supplies come from the same

source. For best performance, ground the MAX1491/

MAX1493/MAX1495 to the analog ground plane of the

circuit board.

Avoid running digital lines under the device, because

these may couple noise onto the die. Run the analog

ground plane under the MAX1491/MAX1493/MAX1495

to minimize coupling of digital noise. Make the power-

supply lines to the MAX1491/MAX1493/MAX1495 as

wide as possible to provide low-impedance paths and

reduce the effects of glitches on the power-supply line.

Shield fast-switching signals, such as clocks, with digital

ground to avoid radiating noise to other sections of the

board. Avoid running clock signals near the analog

inputs. Avoid crossover of digital and analog signals.

Running traces that are on opposite sides of the board at

right angles to each other reduces feedthrough effects.

Good decoupling is important when using high-resolu-

tion ADCs. Decouple the supplies with 4.7µF and 0.1µF

ceramic capacitors to GND. Place these components

as close to the device as possible to achieve the

best decoupling.

Refer to the MAX1494 evaluation kit manual for the rec-

ommended layout. The evaluation board package

includes a fully assembled and tested evaluation board.

Definitions

INL

Integral nonlinearity (INL) is the deviation of the values

on an actual transfer function from a straight line. This

straight line is either a best-straight-line fit or a line

drawn between the end points of the transfer function,

once offset and gain errors have been nullified. INL for

the MAX1491/MAX1493/MAX1495 is measured using

the end-point method.

DNL

Differential nonlinearity (DNL) is the difference between

an actual step width and the ideal value of one count. A

DNL error specification of less than one count guarantees

no missing counts and a monotonic transfer function.

Rollover Error

Rollover error is defined as the absolute value differ-

ence between a near-positive full-scale reading and

near-negative full-scale reading. Rollover error is tested

by applying a full-scale positive voltage, swapping

AIN+ and AIN-, and then adding the results.

Zero Input Reading

Ideally, with AIN+ connected to AIN-, the MAX1491/

MAX1493/MAX1495 display a zero. Zero input reading

is the measured deviation from the ideal zero and the

actual measured point.

3.5- and 4.5-Digit, Single-Chip

ADCs with LCD Drivers

20 ______________________________________________________________________________________

Figure 18. MAX1491 Transfer Function ±2V Range

-2V 0

ANALOG INPUT VOLTAGE

+2V

LCD

1 - - -

1999

- 0

- 1

- 2

-1999

- 1 - - -

-1mV 1mV

Figure 17. MAX1491 Transfer Function ±200mV Range

-200mV 0

ANALOG INPUT VOLTAGE

+200mV

LCD

1 - - -

1999

- 0

- 1

- 2

-1999

- 1 - - -

-100µV100µV

MAX1491/MAX1493/MAX1495

3.5- and 4.5-Digit, Single-Chip

ADCs with LCD Drivers

______________________________________________________________________________________ 21

Typical Operating Circuit

MAX1493

MAX1495

(MAX1491)

0.1µF 4.7µF

0.1µF

4.7µF

10µF

LISO RHI

RLOW

2.7V TO

5.25V

AIN+

AIN-

DVDD

AVDD

LOWBATT VNEG GND REF- REF+ RANGE

INTREF

DVDD

PEAK

DPON

DPSET1

HOLD

DPSET2

BACKPLANE

CONNECTIONS

SEG1–SEG13

(SEG1–SEG10)

HOLD PEAK LOW BATTERY

VIN

Gain Error

Gain error is the amount of deviation between the mea-

sured full-scale transition point and the ideal full-scale

transition point.

Common-Mode Rejection

Common-mode rejection is the ability of a device to

reject a signal that is common to both input terminals.

The common-mode signal can be either an AC or a DC

signal or a combination of the two. CMR is often

expressed in decibels.

Normal-Mode 50Hz and 60Hz Rejection

(Simultaneously)

Normal mode rejection is a measure of how much output

changes when 50Hz and 60Hz signals are injected into

just one of the differential inputs. The MAX1491/

MAX1493/MAX1495 sigma-delta converter uses its inter-

nal digital filter to provide normal mode rejection to both

50Hz and 60Hz power-line frequencies simultaneously.

Power-Supply Rejection Ratio

Power-supply rejection ratio (PSRR) is the ratio of the

input supply change (in volts) to the change in the con-

verter output (in volts). It is measured typically

in decibels.

Enhanced Offset Calibration

Enhanced offset calibration is a more accurate calibra-

tion method that is needed in the case of the ±200mV

range and 4.5-digit resolution. The MAX1493/MAX1495

perform the enhanced offset calibration upon power-up.

The MAX1495 also performs enhanced offset calibration

on demand with the HOLD input.

MAX1491/MAX1493/MAX1495

3.5- and 4.5-Digit, Single-Chip

ADCs with LCD Drivers

22 ______________________________________________________________________________________

Pin Configurations (continued)

VNEG

BP1

BP2

BP3

SEG10

SEG9

SEG1

SEG8

SEG7

SEG6

SEG5

SEG4

SEG3

SEG2

HOLD

PEAK

DPSET2

DPSET1

RANGE

LOWBATT

REF+

REF-

AIN-

AIN+

AVDD

GND

DVDD

INTREF

SSOP OR DIP

TOP VIEW

MAX1491

Chip Information

TRANSISTOR COUNT: 79,435

PROCESS: BiCMOS

MAX1491/MAX1493/MAX1495

3.5- and 4.5-Digit, Single-Chip

ADCs with LCD Drivers

______________________________________________________________________________________ 23

Package Information

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information

go to www.maxim-ic.com/packages.)

32L/48L,TQFP.EPS

MAX1491/MAX1493/MAX1495

3.5- and 4.5-Digit, Single-Chip

ADCs with LCD Drivers

24 ______________________________________________________________________________________

Package Information (continued)

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information

go to www.maxim-ic.com/packages.)

SSOP.EPS

PACKAGE OUTLINE, SSOP, 5.3 MM

21-0056 C

REV.DOCUMENT CONTROL NO.APPROVAL

PROPRIETARY INFORMATION

TITLE:

NOTES:

1. D&E DO NOT INCLUDE MOLD FLASH.

2. MOLD FLASH OR PROTRUSIONS NOT TO EXCEED .15 MM (.006").

3. CONTROLLING DIMENSION: MILLIMETERS.

4. MEETS JEDEC MO150.

5. LEADS TO BE COPLANAR WITHIN 0.10 MM.

7.90

0∞

0.301

0.025

8∞

0.311

0.037

0∞

7.65

0.63

8∞

0.95

MAX

5.38

MILLIMETERS

DIM

SEE VARIATIONS

0.0256 BSC

0.010

0.004

0.205

0.002

0.015

0.008

0.212

0.008

INCHES

MIN MAX

0.078

0.65 BSC

0.25

0.09

5.20

0.05

0.38

0.20

0.21

MIN

1.73 1.99

MILLIMETERS

6.07

10.07

8.07

7.07

INCHES

0.239

0.397

0.317

0.278

MIN

0.249

0.407

0.328

0.289

MAX MIN

6.33

10.33

8.33

7.33

14L

16L

28L

24L

20L

MAX N

eA1 L

0.068

MAX1491/MAX1493/MAX1495

3.5- and 4.5-Digit, Single-Chip

ADCs with LCD Drivers

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are

implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 25

Package Information (continued)

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information

go to www.maxim-ic.com/packages.)

PDIPN.EPS