2017 Microchip Technology Inc. DS20005798A-page 1
MIC45205
Features
• No Compensation Required
• Up to 6A Output Current
• >93% Peak Efficiency
• Output Voltage: 0.8V to 0.85 x VIN with ±1%
Accuracy
• Adjustable Switching Frequency from 200 kHz to
600 kHz
• Enable Input and Open-Drain Power Good Output
• HyperLight Load (MIC45205-1) Improves Light
Load Efficiency
• Hyper Speed Control (MIC45205-2) Architecture
Enables Fast Transient Response
• Supports Safe Startup into Pre-Biased Output
• –40°C to +125°C Junction Temperature Range
• Thermal Shutdown Protection
• Short-Circuit Protection with Hiccup Mode
• Adjustable Current-Limit
• Available in 52-pin 8 mm × 8 mm × 3 mm QFN
Package
Applications
• High Power Density Point-of-Load Conversion
• Servers, Routers, Networking, and Base Stations
• FPGAs, DSP, and Low-Voltage ASIC Power
Supplies
• Industrial and Medical Equipment
General Description
MIC45205 is a synchronous step-down regulator
module, featuring a unique adaptive ON-time control
architecture. The module incorporates a DC/DC
controller, power MOSFETs, bootstrap diode, bootstrap
capacitor, and an inductor in a single package;
simplifying the design and layout process for the end
user.
This highly integrated solution expedites system
design and improves product time-to-market. The
internal MOSFETs and inductor are optimized to
achieve high efficiency at a low output voltage. The fully
optimized design can deliver up to 6A current under a
wide input voltage range of 4.5V to 26V, without
requiring additional cooling.
The MIC45205-1 uses Microchip’s HyperLight Load®
(HLL) and the MIC45205-2 uses Microchip’s Hyper
Speed Control® architecture that enables ultra-fast
load transient response, allowing for a reduction of
output capacitance. The MIC45205 offers 1% output
accuracy that can be adjusted from 0.8V to 0.85 x VIN
with two external resistors. Additional features include
thermal shutdown protection, input undervoltage
lockout, adjustable current-limit, and short-circuit
protection. The MIC45205 allows for safe start-up into
a pre-biased output.
Typical Application Diagram
RFB1
VOUT
UP to 6A
MIC45205
VIN
12V
COUT
CIN
GND
PVIN VOUT
RFB2
FB
SW
ILIM
PGND
BST
ANODE
EN
FREQ
ON
PG
PVDD
5VDD
RLIM
RIB
OFF
VIN CFF
RIA
26V/6A DC/DC Power Module
MIC45205
DS20005798A-page 2 2017 Microchip Technology Inc.
Functional Block Diagram
PWM
CONTROLLER
VOUT
PVIN
BST
EN
ILIM
PVDD
PGND
5VDD
FREQ
PG
SW
GND
SW
DH
DL
VIN BST
ANODE
PGND
VDD
AGND
PVDD
ILIM
PG
FB
FREQ
EN
FB
VIN
RIA
CINJ
RINJ
RIB
2017 Microchip Technology Inc. DS20005798A-page 3
MIC45205
1.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings †
VPVIN, VVIN to PGND ................................................................................................................................. –0.3V to +30V
VPVDD, V5VDD, VANODE to PGND................................................................................................................. –0.3V to +6V
VSW, VFREQ, VILIM, VEN to PGND ....................................................................................................–0.3V to (VIN + 0.3V)
VBST to VSW ................................................................................................................................................. –0.3V to +6V
VBST to PGND............................................................................................................................................ –0.3V to +36V
VPG to PGND ............................................................................................................................... –0.3V to (5VDD + 0.3V)
VFB, VRIB to PGND ...................................................................................................................... –0.3V to (5VDD + 0.3V)
PGND to GND........................................................................................................................................... –0.3V to +0.3V
Operating Ratings ‡
Supply Voltage (VPVIN, VVIN) ..................................................................................................................... +4.5V to +26V
Output Current ..............................................................................................................................................................6A
Enable Input (VEN) ..............................................................................................................................................0V to VIN
Power Good (VPG) .......................................................................................................................................... 0V to 5VDD
† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at those or any other conditions above those indicated
in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended
periods may affect device reliability.
‡ Notice: The device is not guaranteed to function outside its operating ratings.
TABLE 1-1: ELECTRICAL CHARACTERISTICS
Electrical Characteristics: VIN = VEN = 12V, VOUT = 3.3V, VBST – VSW = 5V, TJ = +25ºC. Bold values indicate
–40ºC < TJ < +125ºC, unless otherwise noted. Note 1
Parameter Symbol Min. Typ. Max. Units Conditions
Power Supply Input
Input Voltage Range VIN, PVIN 4.5 —26 V—
Quiescent Supply Current
(MIC45205-1) IQ—0.350.75 mA VFB = 1.5V
Quiescent Supply Current
(MIC45205-2) IQ—2.1 3mA VFB = 1.5V
Operating Current IIN —31— mA
VPVIN = VIN = 12V, VOUT = 1.8V,
IOUT = 0A
fSW = 600 kHz (MIC45205-2)
Shutdown Supply Current ISHDN —0.110 µA SW = unconnected, VEN = 0V
5VDD Output
5VDD Output Voltage VDD 4.8 5.1 5.4 VV
IN = 7V to 26V, I5VDD = 10 mA
5VDD UVLO Threshold UVLO 3.8 4.2 4.6 VV
5VDD rising
5VDD UVLO Hysteresis UVLO_
HYS —400— mVV
5VDD falling
LDO Load Regulation VDD(LR) 0.6 2 3.6 % I5VDD = 0 mA to 40 mA
Reference
Feedback Reference Voltage VFB
0.792 0.8 0.808 VTJ = +25°C
0.784 0.8 0.816 –40°C TJ +125°C
FB Bias Current IFB_BIAS —5500 nA VFB = 0.8V
Enable Control
EN Logic Level High ENHIGH 1.8 —— V—
MIC45205
DS20005798A-page 4 2017 Microchip Technology Inc.
EN Logic Level Low ENLOW ——0.6 V—
EN Hysteresis ENHYS —200— mV—
EN Bias Current IENBIAS —510 µA VEN = 12V
Oscillator
Switching Frequency fSW
400 600 750 kHz VFREQ = VIN, IOUT = 2A
—350— V
FREQ = 50% VIN, IOUT = 2A
Maximum Duty Cycle DMAX —85— %—
Minimum Duty Cycle DMIN —0— %V
FB = 1V
Minimum Off-Time tOFF(MIN) 140 200 260 ns —
Soft-Start
Soft-Start Time tSS — 5 — ms FB from 0V to 0.8V
Short-Circuit Protection
Current-Limit Threshold VCL_
OFFSET
–30 –14 0 mV VFB = 0.79V
Short-Circuit Threshold VSC –23 –7 9 mV VFB = 0V
Current-Limit Source Current ICL 55 70 85 µA VFB = 0.79V
Short-Circuit Source Current ISC 25 35 45 µA VFB = 0V
Leakage
SW, BST Leakage Current ISW_
LEAKAGE
— — 10 µA —
FREQ Leakage Current IFREQ_
LEAK
— — 10 µA —
Power Good (PG)
PG Threshold Voltage VPG_TH 85 90 95 % VOUT Sweep VFB from Low-to-High
PG Hysteresis VPG_HYS —6—% V
OUT Sweep VFB from High-to-Low
PG Delay Time tPG_DLY — 100 — µs Sweep VFB from Low-to-High
PG Low Voltage VPG_LOW —70200 mV VFB < 90% × VNOM, IPG = 1 mA
Thermal Protection
Overtemperature Shutdown TSHD —160— °CT
J rising
Overtemperature Shutdown
Hysteresis
TSHD_
HYS
—15— °C—
Note 1: Specification for packaged product only.
TABLE 1-1: ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Characteristics: VIN = VEN = 12V, VOUT = 3.3V, VBST – VSW = 5V, TJ = +25ºC. Bold values indicate
–40ºC < TJ < +125ºC, unless otherwise noted. Note 1
Parameter Symbol Min. Typ. Max. Units Conditions
2017 Microchip Technology Inc. DS20005798A-page 5
MIC45205
TEMPERATURE SPECIFICATIONS (Note 1)
Parameters Sym. Min. Typ. Max. Units Conditions
Temperature Ranges
Junction Operating Temperature
Range
TJ–40 — +125 °C —
Maximum Junction Temperature — — — +150 °C —
Storage Temperature Range TS–65 — +150 °C —
Lead Temperature — — — +260 °C Soldering, 10s
Package Thermal Resistances
Thermal Resistance QFN-52 JA —21.7 —°C/WNote 2
Thermal Resistance QFN-52 JC —5.0 —°C/WNote 2
Note 1: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable
junction temperature and the thermal resistance from junction to air (i.e., TA, TJ, JA). Exceeding the
maximum allowable power dissipation will cause the device operating junction temperature to exceed the
maximum +125°C rating. Sustained junction temperatures above +125°C can impact the device reliability.
2: JA and JC were measured using the MIC45205 evaluation board.
MIC45205
DS20005798A-page 6 2017 Microchip Technology Inc.
2.0 TYPICAL PERFORMANCE CURVES
FIGURE 2-1: VIN Operating Supply
Current vs. Temperature (MIC4520 5-1).
FIGURE 2-2: VDD Supply Voltage vs.
Temperature.
FIGURE 2-3: Enable Threshol d vs.
Temperature.
FIGURE 2-4: EN Bias Current vs.
Temperature.
FIGURE 2-5: Feedback Voltage vs.
Temperature.
FIGURE 2-6: Output Voltage vs.
Temperature.
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
2017 Microchip Technology Inc. DS20005798A-page 7
MIC45205
FIGURE 2-7: Switching Frequency vs.
Temperature.
FIGURE 2-8: Output Peak Current Limit
vs. Temperature.
FIGURE 2-9: Efficiency (VIN = 5V) vs.
Output Current (MIC45205-1).
FIGURE 2-10: Efficiency (VIN = 12V) vs.
Output Current (MIC45205-1).
FIGURE 2-11: Efficiency (VIN = 24V) vs.
Output Current (MIC45205-1).
FIGURE 2-12: Efficiency (VIN = 5V) vs.
Output Current (MIC45205-2).
MIC45205
DS20005798A-page 8 2017 Microchip Technology Inc.
FIGURE 2-13: Efficiency (VIN = 12V) vs.
Output Current (MIC45205-2).
FIGURE 2-14: Efficiency (VIN = 24V) vs.
Output Current (MIC45205-2).
FIGURE 2-15: Line Regulation.
FIGURE 2-16: Output Voltage vs. Input
Voltage.
FIGURE 2-17: IC Power Dissipation (VIN =
5V) vs. Output Current.
FIGURE 2-18: IC Power Dissipation (VIN =
12V) vs. Output Current.
2017 Microchip Technology Inc. DS20005798A-page 9
MIC45205
FIGURE 2-19: IC Power Dissipation (VIN =
24V) vs. Output Current.
FIGURE 2-20: VIN Soft Turn-On.
FIGURE 2-21: VIN Soft Turn-Off.
FIGURE 2-22: Enable Turn-On Delay and
Rise Time.
FIGURE 2-23: Enable Turn-Off Delay and
Fall Time.
FIGURE 2-24: VIN Start-Up with
Pre-Biased Output.
Time (2ms/div)
IIN
(2A/div)
VIN
(10V/div)
VOUT
(1V/div)
PGOOD
(5V/div)
VIN = 12V
VOUT = 1.8V
IOUT = 6A
Time (2ms/div)
IIN
(2A/div)
VIN
(10V/div)
VOUT
(1V/div)
PGOOD
(5V/div)
VIN = 12V
VOUT = 1.8V
IOUT = 6A
Time (2ms/div)
VEN
(2V/div)
VOUT
(1V/div)
IIN
(1A/div)
VIN = 12V
VOUT = 1.8V
IOUT = 6A
Time (2ms/div)
VEN
(2V/div)
VOUT
(1V/div)
IIN
(1A/div)
VIN = 12V
VOUT = 1.8V
IOUT = 6A
Time (2ms/div)
VIN
(10V/div)
VOUT
(1V/div)
PGOOD
(5V/div) VIN = 12V
VOUT = 1.8V
IOUT = 1A
VPRE-BIAS = 0.5V
MIC45205
DS20005798A-page 10 2017 Microchip Technology Inc.
FIGURE 2-25: Enable Turn-On/Off.
FIGURE 2-26: Power-Up Into Short-Circuit.
FIGURE 2-27: Enabled Into Short-Circuit.
FIGURE 2-28: Short-Circuit.
FIGURE 2-29: Output Recovery from
Short-Circuit.
FIGURE 2-30: Peak Current-Limit
Threshold.
Time (8ms/div)
VEN
(2V/div)
VOUT
(1V/div)
IIN
(1A/div)
VIN = 12V
VOUT = 1.8V
IOUT = 6A
Time (2ms/div)
VIN
(10V/div)
VOUT
(20mV/div)
IIN
(500mA/div)
VIN = 12V, VOUT = 1.8V
IOUT = SHORT CIRCUIT
Time (400μs/div)
VEN
(2V/div)
VOUT
(20mV/div)
VIN = 12V
VOUT = 1.8V
IOUT = SHORT CIRCUIT
IIN
(100mA/div)
Time (2ms/div)
VOUT
(1V/div)
IOUT
(5A/div)
VIN = 12V
VOUT = 1.8V
Time (8ms/div)
VOUT
(1V/div)
IOUT
(5A/div)
VIN = 12V
VOUT = 1.8V
Time (4ms/div)
VOUT
(1V/div)
IOUT
(5A/div)
VIN = 12V
VOUT = 1.8V
IPK_CL = 8.4A
2017 Microchip Technology Inc. DS20005798A-page 11
MIC45205
FIGURE 2-31: Output Recovery from
Thermal Shutdown.
FIGURE 2-32: Switching Waveforms (IOUT
= 6A).
FIGURE 2-33: Switching Waveforms,
MIC45205-1 (IOUT = 0A).
FIGURE 2-34: Inrush with COUT = 3000 µF.
FIGURE 2-35: Transient Response,
MIC45205-1 (IOUT = 3A to 6A).
FIGURE 2-36: Transient Response,
MIC45205-1 (IOUT = 0.5A to 3.5A).
Time (1μs/div)
VOUT
(AC-COUPLED)
(20mV/div)
IOUT
(5A/div)
VSW
(5V/div)
VIN = 12V
VOUT = 1.8V
IOUT = 6A
Time (20ms/div)
VOUT
(AC-COUPLED)
(20mV/div)
IOUT
(2A/div)
VSW
(5V/div) VIN = 12V
VOUT = 1.8V
IOUT = 0A
Time (8ms/div)
VEN
(2V/div)
IIN
(1A/div)
VIN = 12V
VOUT = 1.8V
IOUT = 6A
VOUT
(1V/div)
Time (100μs/div)
VOUT
(100mV/div)
IOUT
(2A/div)
VIN = 12V
VOUT = 1.8V
IOUT = 3A TO 6A
Time (100μs/div)
VOUT
(100mV/div)
IOUT
(2A/div)
VIN = 12V
VOUT = 1.8V
IOUT = 0.5A TO 3.5A
MIC45205
DS20005798A-page 12 2017 Microchip Technology Inc.
3.0 PIN DESCRIPTIONS
FIGURE 3-1: MIC45205 Pin Configuration.
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLE
Pin Number Pin Name Description
1GND
Analog Ground. Connect bottom feedback resistor to GND. GND and PGND are
internally connected.
2, 3 5VDD
Internal +5V Linear Regulator Output. Powered by VIN, 5VDD is the internal supply
bus for the device. In the applications with VIN < +5.5V, 5VDD should be tied to VIN to
bypass the linear regulator.
4, 5 PVDD PVDD. Supply input for the internal low-side power MOSFET driver.
6, 7, 8, 45, 52 PGND
Power Ground. PGND is the return path for the step-down power module power
stage. The PGND pin connects to the sources of internal low-side power MOSFET,
the negative terminals of input capacitors, and the negative terminals of output
capacitors.
10, 11, 12, 31,
32, 33, 34 SW
The SW pin connects directly to the switch node. Due to the high-speed switching on
this pin, the SW pin should be routed away from sensitive nodes. The SW pin also
senses the current by monitoring the voltage across the low-side MOSFET during
OFF time.
14, 15, 16, 17,
18, 19 PVIN
Power Input Voltage. Connection to the drain of the internal high-side power
MOSFET. Connect an input capacitor from PVIN to PGND.
21, 22, 23, 24,
25, 26, 27, 28,
29
VOUT
Output Voltage. Connected to the internal inductor, the output capacitor should be
connected from this pin to PGND as close to the module as possible.
36, 37, 38 RIA Ripple Injection Pin A. Leave floating, no connection.
GND
5VDD
5VDD
KEEPOUT
PVDD
PVDD
PGND
PGND
PGND
KEEPOUT
SW
SW
SW
PVIN
PVIN
ANODE
ANODE
RIB
VOUT
RIA
RIA
RIA
KEEPOUT
SW
SW
SW
SW
KEEPOUT
VOUT
VOUT
PGND
ILIM
FREQ
VIN
EN
PG
FB
PGND
BST
BST
BST
PVIN
PVIN
PVIN
PVIN
KEEPOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
PGND
SW
PVIN ePAD VOUT ePAD
1
2
3
13
4
5
6
7
8
9
10
11
12
14
15
52
51
50
49
48
47
46
45
44
43
42
16
17
18
19
20
21
22
23
24
25
26
41
40
39
29
38
37
36
35
34
33
32
31
30
28
27
2017 Microchip Technology Inc. DS20005798A-page 13
MIC45205
39 RIB Ripple Injection Pin B. Connect this pin to FB.
40, 41 ANODE Anode Bootstrap Diode. Anode connection of internal bootstrap diode, this pin should
be connected to the PVDD pin.
42, 43, 44 BST Connection to the internal bootstrap circuitry and high-side power MOSFET drive
circuitry. Connect all three BST pins together.
46 FB
Feedback. Input to the transconductance amplifier of the control loop. The FB pin is
referenced to 0.8V. A resistor divider connecting the feedback to the output is used to
set the desired output voltage. Connect the bottom resistor from FB to GND.
47 PG Power Good. Open-drain output. If used, connect to an external pull-up resistor of at
least 10 k between PG and the external bias voltage.
48 EN
Enable. A logic signal to enable or disable the step-down regulator module operation.
The EN pin is TTL/CMOS compatible. Logic-high = enable, logic-low = disable or
shutdown. EN pin has an internal 1 M (typical) pull-down resistor to GND. Do not
leave floating.
49 VIN
Internal 5V Linear Regulator Input. A 1 F ceramic capacitor from VIN to GND is
required for decoupling.
50 FREQ Switching Frequency Adjust. Use a resistor divider from VIN to GND to program the
switching frequency. Connecting FREQ to VIN sets frequency at 600 kHz.
51 ILIM Current Limit. Connect a resistor between ILIM and SW to program the current limit.
9, 13, 20, 30, 35 KEEPOUT Depopulated pin positions.
—PV
IN ePAD PVIN Exposed Pad. Internally connected to PVIN pins. Please see PCB Layout
Guidelines section.
—VOUT
ePAD
VOUT Exposed Pad. Internally connected to VOUT pins. Please see PCB Layout
Guidelines section.
TABLE 3-1: PIN FUNCTION TABLE (CONTINUED)
Pin Number Pin Name Description
MIC45205
DS20005798A-page 14 2017 Microchip Technology Inc.
4.0 FUNCTIONAL DESCRIPTION
The MIC45205 is an adaptive on-time synchronous
buck regulator module built for high-input voltage to
low-output voltage conversion applications. The
MIC45205 is designed to operate over a wide input
voltage range, from 4.5V to 26V, and the output is
adjustable with an external resistor divider. An adaptive
on-time control scheme is employed to obtain a
constant switching frequency in steady state and to
simplify the control compensation. Hiccup mode
overcurrent protection is implemented by sensing
low-side MOSFET’s RDS(ON). The device features
internal soft-start, enable, UVLO, and thermal
shutdown. The module has integrated switching FETs,
inductor, bootstrap diode, resistor, and capacitor.
4.1 Theory of Operation
As shown in Figure 4-1 (in association with
Equation 4-1), the output voltage is sensed by the
MIC45205 feedback pin (FB) via the voltage divider
RFB1 and RFB2 and compared to a 0.8V reference
voltage (VREF) at the error comparator through a
low-gain transconductance (gm) amplifier. If the
feedback voltage decreases, and the amplifier output
falls below 0.8V, then the error comparator will trigger
the control logic and generate an ON-time period. The
ON-time period length is predetermined by the “Fixed
tON Estimator” circuitry:
FIGURE 4-1: Output Voltage Sense via
FB Pin.
EQUATION 4-1:
At the end of the ON-time period, the internal high-side
driver turns off the high-side MOSFET and the low-side
driver turns on the low-side MOSFET. The OFF-time
period length depends upon the feedback voltage in
most cases. When the feedback voltage decreases
and the output of the gm amplifier falls below 0.8V, the
ON-time period is triggered and the OFF-time period
ends. If the OFF-time period determined by the
feedback voltage is less than the minimum OFF-time
tOFF(MIN), which is about 200 ns, the MIC45205 control
logic will apply the tOFF(MIN) instead. tOFF(MIN) is
required to maintain enough energy in the boost
capacitor (CBST) to drive the high-side MOSFET.
The maximum duty cycle is obtained from the 200 ns
tOFF(MIN):
EQUATION 4-2:
It is not recommended to use MIC45205 with an
OFF-time close to tOFF(MIN) during steady-state
operation.
The adaptive ON-time control scheme results in a
constant switching frequency in the MIC45205 during
steady state operation. The actual ON-time and
resulting switching frequency will vary with the different
rising and falling times of the MOSFETs. Also, the
minimum tON results in a lower switching frequency in
high VIN to VOUT applications. During load transients,
the switching frequency is changed due to the varying
OFF-time.
To illustrate the control loop operation, we will analyze
both the steady-state and load transient scenarios. For
easy analysis, the gain of the gm amplifier is assumed
to be 1. With this assumption, the inverting input of the
error comparator is the same as the feedback voltage.
Figure 4-2 shows the MIC45205 control loop timing
during steady-state operation. During steady-state, the
gm amplifier senses the feedback voltage ripple, which
is proportional to the output voltage ripple plus injected
voltage ripple, to trigger the ON-time period. The
ON-time is predetermined by the tON estimator. The
termination of the OFF-time is controlled by the
feedback voltage. At the valley of the feedback voltage
ripple, which occurs when VFB falls below VREF
, the
OFF period ends and the next ON-time period is
triggered through the control logic circuitry.
COMPENSATION
COMP
RFB1
RFB2
FB
VREF
0.8V
VOUT
gM EA
tON ESTIMATED
VOUT
VIN fSW
-----------------------=
Where:
VOUT Output Voltage
VIN Power Stage Input Voltage
fSW Switching Frequency
DMAX tStOFF MIN
–
tS
-----------------------------------1
200ns
tS
---------------–==
Where:
tS1/fSW
2017 Microchip Technology Inc. DS20005798A-page 15
MIC45205
FIGURE 4-2: MIC45205 Control Loop
Timing.
Figure 4-3 shows the operation of the MIC45205 during
a load transient. The output voltage drops due to the
sudden load increase, which causes the VFB to be less
than VREF
. This will cause the error comparator to
trigger an ON-time period. At the end of the ON-time
period, a minimum OFF-time tOFF(MIN) is generated to
charge the bootstrap capacitor (CBST) because the
feedback voltage is still below VREF
. Then, the next
ON-time period is triggered due to the low feedback
voltage. Therefore, the switching frequency changes
during the load transient, but returns to the nominal
fixed frequency once the output has stabilized at the
new load current level. With the varying duty cycle and
switching frequency, the output recovery time is fast
and the output voltage deviation is small. Note that the
instantaneous switching frequency during load
transient remains bounded and cannot increase
arbitrarily. The minimum is limited by tON + tOFF(MIN).
Because the variation in VOUT is relatively limited
during load transient, tON stays virtually close to its
steady-state value.
FIGURE 4-3: MIC45205 Load Transient
Response.
Unlike true current-mode control, the MIC45205 uses
the output voltage ripple to trigger an ON-time period.
The output voltage ripple is proportional to the inductor
current ripple if the ESR of the output capacitor is large
enough.
In order to meet the stability requirements, the
MIC45205 feedback voltage ripple should be in phase
with the inductor current ripple and are large enough to
be sensed by the gm amplifier and the error
comparator. The recommended feedback voltage
ripple is 20 mV~100 mV over full input voltage range. If
a low ESR output capacitor is selected, then the
feedback voltage ripple may be too small to be sensed
by the gm amplifier and the error comparator. Also, the
output voltage ripple and the feedback voltage ripple
are not necessarily in phase with the inductor current
ripple if the ESR of the output capacitor is very low. In
these cases, ripple injection is required to ensure
proper operation. Please refer to the Ripple Injection
subsection in the Application Information section for
more details about the ripple injection technique.
4.2 Discontinuous Mode (MIC45205-1
Only)
In continuous mode, the inductor current is always
greater than zero. However, at light loads, the
MIC45205-1 is able to force the inductor current to
operate in discontinuous mode. Discontinuous mode is
where the inductor current falls to zero, as indicated by
trace (IL) shown in Figure 4-4. During this period, the
efficiency is optimized by shutting down all the
non-essential circuits and minimizing the supply
current as the switching frequency is reduced. The
MIC45205-1 wakes up and turns on the high-side
MOSFET when the feedback voltage VFB drops below
0.8V.
The MIC45205-1 has a zero crossing comparator (ZC)
that monitors the inductor current by sensing the
voltage drop across the low-side MOSFET during its
ON-time. If the VFB > 0.8V and the inductor current
goes slightly negative, then the MIC45205-1
automatically powers down most of the IC circuitry and
goes into a low-power mode.
Once the MIC45205-1 goes into discontinuous mode,
both DL and DH are low, which turns off the high-side
and low-side MOSFETs. The load current is supplied
by the output capacitors and VOUT drops. If the drop of
VOUT causes VFB to go below VREF
, then all the circuits
will wake up into normal continuous mode. First, the
bias currents of most circuits reduced during the
discontinuous mode are restored, and then a tON pulse
is triggered before the drivers are turned on to avoid
any possible glitches. Finally, the high-side driver is
turned on. Figure 4-4 shows the control loop timing in
discontinuous mode.
RFB2
RFB1 + RFB2
VREF
MIC45205
DS20005798A-page 16 2017 Microchip Technology Inc.
FIGURE 4-4: MIC45205-1 Control Loop
Timing (Discontinuous Mode).
During discontinuous mode, the bias current of most
circuits is substantially reduced. As a result, the total
power supply current during discontinuous mode is
only about 350 µA, allowing the MIC45205-1 to
achieve high efficiency in light load applications.
4.3 Soft-Start
Soft-start reduces the input power supply surge current
at startup by controlling the output voltage rise time.
The input surge appears while the output capacitor is
charged up.
The MIC45205 implements an internal digital soft-start
by making the 0.8V reference voltage VREF ramp from
0 to 100% in about 5 ms with 9.7 mV steps. Therefore,
the output voltage is controlled to increase slowly by a
stair-case VFB ramp. Once the soft-start cycle ends, the
related circuitry is disabled to reduce current
consumption. PVDD must be powered up at the same
time or after VIN to make the soft-start function
correctly.
4.4 Current-Limit
The MIC45205 uses the RDS(ON) of the low-side
MOSFET and external resistor connected from ILIM pin
to SW node to set the current limit.
FIGURE 4-5: MIC45205 Current-Limiting
Circuit.
In each switching cycle of the MIC45205, the inductor
current is sensed by monitoring the low-side MOSFET
in the OFF period. The sensed voltage VILIM is
compared with the power ground (PGND) after a
blanking time of 150 ns. In this way the drop voltage
over the resistor R15 (VCL) is compared with the drop
over the bottom FET generating the short current limit.
The small capacitor (C15) connected from ILIM pin to
PGND filters the switching node ringing during the
off-time allowing a better short-limit measurement. The
time constant created by R15 and C15 should be much
less than the minimum off time.
The VCL drop allows programming of short limit through
the value of the resistor (R15). If the absolute value of
the voltage drop on the bottom FET becomes greater
than VCL, and the VILIM falls below PGND, an
overcurrent is triggered causing the IC to enter hiccup
mode. The hiccup sequence including the soft-start
reduces the stress on the switching FETs and protects
the load and supply for severe short conditions.
The short-circuit current-limit can be programmed by
using Equation 4-3.
EQUATION 4-3:
<
VIN
SW
FB
MIC45205
BST
C
IN
PGND
ILIM
CS
R15
C15
SW
R15 ICLIM ILPP
–0.5RDS ON
VCL_OFFSET
+
ICL
------------------------------------------------------------------------------------------------------------------------=
Where:
ICLIM Desired current limit.
RDS(ON) On-resistance of low-side power
MOSFET, 16 m typically.
VCL_
OFFSET
Current-limit threshold (typ. 14 mV).
ICL Current-limit source current (typ.
70 µA).
IL(PP) Inductor current peak-to-peak.
2017 Microchip Technology Inc. DS20005798A-page 17
MIC45205
Because the inductor is integrated, use Equation 4-4 to
calculate the inductor ripple current.
EQUATION 4-4:
The MIC45205 has a 1.0 µH inductor integrated into
the module. In case of a hard short, the short limit is
folded down to allow an indefinite hard short on the
output without any destructive effect. It is mandatory to
make sure that the inductor current used to charge the
output capacitance during soft-start is under the folded
short limit; otherwise the supply will go in hiccup mode
and may not finish the soft-start successfully.
The MOSFET RDS(ON) varies 30% to 40% with
temperature; therefore, it is recommended to add a
50% margin to ICLIM in Equation 4-3 to avoid false
current limiting due to increased MOSFET junction
temperature rise.
With R15 = 1.37 k and C15 = 15 pF, the typical output
current-limit is 8A.
ILPP
VOUT VIN MAX
VOUT
–
VIN MAX
fSW
L
--------------------------------------------------------------------=
MIC45205
DS20005798A-page 18 2017 Microchip Technology Inc.
5.0 APPLICATION INFORMATION
5.1 Setting the Switching Frequency
The MIC45205 switching frequency can be adjusted by
changing the value of resistors R1 and R2.
FIGURE 5-1: Switching Frequency
Adjustment.
Equation 5-1 gives the estimated switching frequency:
EQUATION 5-1:
FIGURE 5-2: Switching Frequency vs. R2.
5.2 Output Capacitor Selection
The type of the output capacitor is usually determined
by the application and its equivalent series resistance
(ESR). Voltage and RMS current capability are two
other important factors for selecting the output
capacitor. Recommended capacitor types are MLCC,
OS-CON and POSCAP. The output capacitor’s ESR is
usually the main cause of the output ripple. The
MIC45205 requires ripple injection and the output
capacitor ESR affects the control loop from a stability
point of view.
The maximum value of ESR is calculated as in
Equation 5-2:
EQUATION 5-2:
The total output ripple is a combination of the ESR and
output capacitance. The total ripple is calculated in
Equation 5-3:
EQUATION 5-3:
As described in the Theory of Operation subsection in
the Functional Description, the MIC45205 requires at
least 20 mV peak-to-peak ripple at the FB pin to make
the gm amplifier and the error comparator behave
properly. Also, the output voltage ripple should be in
phase with the inductor current. Therefore, the output
voltage ripple caused by the output capacitors value
should be much smaller than the ripple caused by the
output capacitor ESR. If low-ESR capacitors, such as
ceramic capacitors, are selected as the output
capacitors, a ripple injection method should be applied
to provide enough feedback voltage ripple. Please refer
to the Ripple Injection subsection in the Application
Information section for more details.
VIN
SW
FB
MIC45205
BST
C
IN
PGND
FREQ
CS
R1
R2
fSW fOR2
R1R2+
--------------------
=
Where:
fO600 kHz (typical per the Electrical
Characteristics table).
R1 100 k is recommended.
R2 Needs to be selected in order to set the
required switching frequency.
0
100
200
300
400
500
600
700
800
10.00 100.00 1000.00 10000.00
SW FREQ (kHz)
R2 (kȍ)
V
OUT
= 5V
V
IN
= 12V
R1 = 100kȍ
ESRCOUT VOUT PP
ILPP
---------------------------
Where:
VOUT(PP) Peak-to-peak output voltage ripple
IL(PP) Peak-to-peak inductor current
ripple
VOUT PP
ILPP
COUT fSW
8
--------------------------------------


2ILPP
ESRCOUT

2
+
=
Where:
COUT Output Capacitance Value
fSW Switching Frequency
2017 Microchip Technology Inc. DS20005798A-page 19
MIC45205
The output capacitor RMS current is calculated in
Equation 5-4:
EQUATION 5-4:
The power dissipated in the output capacitor is:
EQUATION 5-5:
5.3 Input Capacitor Selection
The input capacitor for the power stage input PVIN
should be selected for ripple current rating and voltage
rating. The input voltage ripple will primarily depend on
the input capacitor’s ESR. The peak input current is
equal to the peak inductor current, so:
EQUATION 5-6:
The input capacitor must be rated for the input current
ripple. The RMS value of input capacitor current is
determined at the maximum output current. Assuming
the peak-to-peak inductor current ripple is low:
EQUATION 5-7:
The power dissipated in the input capacitor is:
EQUATION 5-8:
The general rule is to pick the capacitor with a ripple
current rating equal to or greater than the calculated
worst-case RMS capacitor current.
Equation 5-9 should be used to calculate the input
capacitor. Also it is recommended to keep some margin
on the calculated value:
EQUATION 5-9:
5.4 Output Voltage Setting
Components
The MIC45205 requires two resistors to set the output
voltage as shown in Figure 5-3:
FIGURE 5-3: Voltage-Divider
Configuration.
The output voltage is determined by Equation 5-10:
ICOUT RMS
ILPP
12
------------------=
PDISS COUT
ICOUT RMS
2ESRCOUT
=
VIN
ILPK
ESRCIN
=
ICIN RMS
IOUT MAXD1D–
Where:
D Duty cycle
PDISS CINICIN RMS
2ESRCIN
=
CIN IOUT MAX
1D–
fSW dV
---------------------------------------------------
Where:
dV Input ripple
fSW Switching frequency
RFB1
RFB2
FB
VREF
gM AMP
MIC45205
DS20005798A-page 20 2017 Microchip Technology Inc.
EQUATION 5-10:
A typical value of RFB1 used on the standard evaluation
board is 10 k. If R1 is too large, it may allow noise to
be introduced into the voltage feedback loop. If RFB1 is
too small in value, it will decrease the efficiency of the
power supply, especially at light loads. Once RFB1 is
selected, RFB2 can be calculated using Equation 5-11:
EQUATION 5-11:
For fixed RFB1 = 10 k, output voltage can be selected
by RFB2. Ta b l e 5 - 1 provides RFB2 values for some
common output voltages.
5.5 Ripple Injection
The VFB ripple required for proper operation of the
MIC45205 gm amplifier and error comparator is 20 mV
to 100 mV. However, the output voltage ripple is
generally too small to provide enough ripple amplitude
at the FB pin and this issue is more visible in lower
output voltage applications. If the feedback voltage
ripple is so small that the gm amplifier and error
comparator cannot sense it, then the MIC45205 will
lose control and the output voltage is not regulated. In
order to have some amount of VFB ripple, a ripple
injection method is applied for low output voltage ripple
applications.
The applications are divided into two situations
according to the amount of the feedback voltage ripple:
1. Enough ripple at the feedback voltage due to the
large ESR of the output capacitors:
As shown in Figure 5-4, the converter is stable without
any ripple injection.
FIGURE 5-4: Enough Ripple at FB from
ESR.
The feedback voltage ripple is:
EQUATION 5-12:
2. Virtually no or inadequate ripple at the FB pin
voltage due to the very-low ESR of the output
capacitors, such is the case with ceramic output
capacitor. In this case, the VFB ripple waveform
needs to be generated by injecting suitable sig-
nal. MIC45205 has provisions to enable an inter-
nal series RC injection network, RINJ and CINJ
as shown in Figure 5-5 by connecting RIB to the
FB pin. This network injects a square-wave cur-
rent waveform into the FB pin, which, by means
of integration across the capacitor (C14), gener-
ates an appropriate sawtooth FB ripple wave-
form.
FIGURE 5-5: Internal Ripple Injection at
FB via RIB Pin.
TABLE 5-1: VOUT PROGRAMMING
RESISTOR LOOK-UP
RFB2 VOUT
OPEN 0.8V
40.2 k1.0V
20 k1.2V
11.5 k1.5V
8.06 k1.8V
4.75 k2.5V
3.24 k3.3V
1.91 k5.0V
VOUT VFB 1RFB1
RFB2
------------+


=
Where:
VFB 0.8V
RFB2
VFB RFB1
VOUT VFB
–
-----------------------------=
RFB1
RFB2
ESR
COUT
VOUT
FB
MIC45205
VFB PP
RFB2
RFB1RFB2
+
------------------------------- ESRCOUT
ILPP
=
Where:
IL(PP) The peak-to-peak value of the inductor
current ripple
RFB1
RFB2
ESR
COUT
VOUT
FB
MIC45205
C14
RIB
RIA
SW
RINJ
CINJ
2017 Microchip Technology Inc. DS20005798A-page 21
MIC45205
The injected ripple is:
EQUATION 5-13:
EQUATION 5-14:
In Equation 5-14 and Equation 5-15, it is assumed that
the time constant associated with C14 must be much
greater than the switching period:
EQUATION 5-15:
If the voltage divider resistors RFB1 and RFB2 are in the
k range, then a C14 of 1 nF to 100 nF can easily
satisfy the large time constant requirements.
5.6 Thermal Measurements and Safe
Operating Area (SOA)
Measuring the IC’s case temperature is recommended
to ensure it is within its operating limits. Although this
might seem like a very elementary task, it is easy to get
erroneous results. The most common mistake is to use
the standard thermal couple that comes with a thermal
meter. This thermal couple wire gauge is large, typically
22 gauge, and behaves like a heatsink, resulting in a
lower case measurement.
Two methods of temperature measurement are using a
smaller thermal couple wire or an infrared
thermometer. If a thermal couple wire is used, it must
be constructed of 36-gauge wire or higher (smaller wire
size) to minimize the wire heat-sinking effect. In
addition, the thermal couple tip must be covered in
either thermal grease or thermal glue to make sure that
the thermal couple junction is making good contact with
the case of the IC. Omega brand thermal couple
(5SC-TT-K-36-36) is adequate for most applications.
Wherever possible, an infrared thermometer is
recommended. The measurement spot size of most
infrared thermometers is too large for an accurate
reading on a small form factor ICs. However, an IR
thermometer from Optris has a 1 mm spot size, which
makes it a good choice for measuring the hottest point
on the case. An optional stand makes it easy to hold the
beam on the IC for long periods of time.
The safe operating area (SOA) of the MIC45205 is
shown in Figure 5-6 through Figure 5-10. These
thermal measurements were taken on MIC45205
evaluation board. Since the MIC45205 is an entire
system comprised of switching regulator controller,
MOSFETs and inductor, the part needs to be
considered as a system. The SOA curves will give
guidance to reasonable use of the MIC45205.
SOA curves should only be used as a point of
reference. SOA data was acquired using the MIC45205
evaluation board. Thermal performance depends on
the PCB layout, board size, copper thickness, number
of thermal vias, and actual airflow.
FIGURE 5-6: MIC45205 Power Derating
vs. Airflow (5VIN to 1.5VOUT).
VFB PP
VIN Kdiv
D1D–1
fSW
-----------------
=
Where:
VIN Power stage input voltage
D Duty cycle
fSW Switching frequency
τ(RFB1//RFB2//RINJ) x C14
RINJ = 10 k, CINJ = 0.1 µF
Kdiv RFB1//RFB2
RINJ RFB1//RFB2
+
-----------------------------------------------=
Where:
RINJ 10 k
1
fSW
-----------------T
---=1«
3
4
5
6
7
85 90 95 100 105 110 115 120 125
MAXIMUM OUTPUT CURRENT (A)
AMBIENT TEMPERATURE(qC)
0 LFM
200 LFM
400 LFM
MIC45205
DS20005798A-page 22 2017 Microchip Technology Inc.
FIGURE 5-7: MIC45205 Power Derating
vs. Airflow (12VIN to 1.5VOUT).
FIGURE 5-8: MIC45205 Power Derating
vs. Airflow (12VIN to 3.3VOUT).
FIGURE 5-9: MIC45205 Power Derating
vs. Airflow (24VIN to 1.5VOUT).
FIGURE 5-10: MIC45205 Power Derating
vs. Airflow (24VIN to 3.3VOUT).
3
4
5
6
7
80 85 90 95 100 105 110 115 120
MAXIMUM OUTPUT CURRENT (A)
AMBIENT TEMPERATURE (qC)
0 LFM
200 LFM
400 LFM
3
4
5
6
7
80 85 90 95 100 105 110 115 120
MAXIMUM OUTPUT CURRENT (A)
AMBIENT TEMPERATURE (qC)
0 LFM
200 LFM
400 LFM
3
4
5
6
7
70 75 80 85 90 95 100 105 110 115 120
MAXIMUM OUTPUT CURRENT (A)
AMBIENT TEMPERATURE (
q
C)
0 LFM
200 LFM
400 LFM
3
4
5
6
7
60 65 70 75 80 85 90 95 100 105 110
MAXIMUM OUTPUT CURRENT (A)
AMBIENT TEMPERATURE (qC)
0 LFM
200 LFM
400 LFM
2017 Microchip Technology Inc. DS20005798A-page 23
MIC45205
6.0 PCB LAYOUT GUIDELINES
To minimize EMI and output noise, follow these layout
recommendations.
PCB layout is critical to achieve reliable, stable and
efficient performance. A ground plane is required to
control EMI and minimize the inductance in power,
signal and return paths.
Figure 6-1 is optimized from a small form factor point of
view shows top and bottom layer of a four layer PCB. It
is recommended to use mid layer 1 as a continuous
ground plane.
FIGURE 6-1: Top And Bottom La ye r of a
Four-Layer Board.
The following guidelines should be followed to insure
proper operation of the MIC45205 module:
6.1 IC
• The analog ground pin (GND) must be connected
directly to the ground planes. Place the IC close
to the point-of-load (POL).
• Use thick traces to route the input and output
power lines.
• Analog and power grounds should be kept
separate and the analog ground (GND) and
power ground (PGND) are internally connected.
6.2 Input Capacitor
• Place the input capacitors on the same side of the
board and as close to the IC as possible.
• Place several vias to the ground plane close to
the input capacitor ground terminal.
• Use either X7R or X5R dielectric input capacitors.
Do not use Y5V or Z5U type capacitors.
• Do not replace the ceramic input capacitor with
any other type of capacitor. Any type of capacitor
can be placed in parallel with the ceramic input
capacitor.
• If a non-ceramic input capacitor is placed in
parallel with the input capacitor, it must be
recommended for switching regulator applications
and the operating voltage.
• In “Hot-Plug” applications, an Electrolytic bypass
capacitor must be used to limit the over-voltage
spike seen on the input supply with power is
suddenly applied. If hot-plugging is the normal
operation of the system, using an appropriate
hot-swap IC is recommended.
6.3 RC Snubber (Optional)
• Depending on the operating conditions, a RC
snubber on the same side of the board can be
used. Place the RC and as close to the SW pin as
possible if needed.
6.4 SW Node
• Do not route any digital lines underneath or close
to the SW node.
• Keep the switch node (SW) away from the
feedback (FB) pin.
6.5 Output Capacitor
• Use a wide trace to connect the output capacitor
ground terminal to the input capacitor ground
terminal.
• Phase margin will change as the output capacitor
value and ESR changes.
• The feedback trace should be separate from the
power trace and connected as close as possible
to the output capacitor. Sensing a long
high-current load trace can degrade the DC load
regulation.
MIC45205
DS20005798A-page 24 2017 Microchip Technology Inc.
6.6 PCB Layout Recommendations
FIGURE 6-2: Top Copper Layer 1.
FIGURE 6-3: Copper Layer2.
2017 Microchip Technology Inc. DS20005798A-page 25
MIC45205
FIGURE 6-4: Copper Layer 3.
FIGURE 6-5: Bottom Copper Layer 4.
MIC45205
DS20005798A-page 26 2017 Microchip Technology Inc.
7.0 SIMPLIFIED PCB DESIGN
RECOMMENDATIONS
7.1 Periphery I/O Pad Layout and
Large Pad for Exposed Heatsink
The board design should begin with copper/metal pads
that sit beneath the periphery leads of a mounted QFN.
The board pads should extend outside the QFN
package edge a distance of approximately 0.20 mm
per side:
Total pad length = 8.00 mm + (0.20 mm per side × 2
sides) = 8.40 mm.
After completion of the periphery pad design, the larger
exposed pads will be designed to create the mounting
surface of the QFN exposed heatsink. The primary
transfer of heat out of the QFN will be directly through
the bottom surface of the exposed heatsink. To aid in
the transfer of generated heat into the PCB, the use of
an array of plated through-hole vias beneath the
mounted part is recommended. The typical via hole
diameter is 0.30 mm to 0.35 mm, with center-to-center
pitch of 0.80 mm to 1.20 mm.
FIGURE 7-1: Package Bottom View vs. PCB Recommended Exposed Metal Trace.
Please note that the exposed metal trace is a “mirror
image” of the package bottom view.
2017 Microchip Technology Inc. DS20005798A-page 27
MIC45205
7.2 Solder Paste Stencil Design
(Recommend Stencil Thickness =
112.5 µm ±12.5 µm)
The solder stencil aperture openings should be smaller
than the periphery or large PCB exposed pads to
reduce any chance of build-up of excess solder at the
large exposed pad area which can result to solder
bridging.
The suggested reduction of the stencil aperture
opening is typically 0.20 mm smaller than exposed
metal trace.
Please note that a critical requirement is to not
duplicate land pattern of the exposed metal trace as
solder stencil opening as the design and dimension
values are different.
FIGURE 7-2: Solder St encil Opening.
Note that the cyan-colored shaded pad indicates
exposed trace keep out area.
FIGURE 7-3: St ack-Up of Pad Layout and
Solder Paste Stencil.
MIC45205
DS20005798A-page 28 2017 Microchip Technology Inc.
8.0 EVALUATION BOARD SCHEMATIC AND BOM
FIGURE 8-1: MIC45205YML Evaluation Board Schematic.
TABLE 8-1: BILL OF MATERIALS
Item Part Nu mber Manufacturer Description Quantity
C1 EEE-FK1V221P Panasonic 220 µF/35V, ALE Capacitor (optional) 1
C1X, C6, C9,
C10, C7, C13 — — Open 6
C3 C3216X5R1H106M160AB TDK 10 µF/50V, 1206, X5R, 10%, MLCC 1
C2, C4, C8 GRM188R71H104KA93D Murata 0.1 µF/50V, X7R, 0603, 10%, MLCC 3
C5 C3216X5R0J107M160AB TDK 100 µF/6.3V, X5R, 1206, 20%, MLCC 1
C14 C1608C0G1H222JT TDK 2.2 nF/50V, NP0, 0603, 5%, MLCC 1
C11 GRM1885C1H150JA01D Murata 15 pF/50V, NP0, 0603, 5%, MLCC 3
CON1,CON2,
CON3,CON4 8174 Keystone 15A, 4-Prong Through-Hole Screw
Terminal 4
J1 M50-3500742 Harwin Header 2x7 1
J2, J3, J4,
TP3 – TP5 90120-0122 Molex Header 2 6
JPx1, JPx2 — — Open 2
R1, R10 CRCW0603100K0FKEA Vishay Dale 100 k, 1%, 1/10W, 0603, Thick Film 2
R2, R12, R13,
R16 — — Open 4
R3 CRCW060340K2FKEA Vishay Dale 40.2 k, 1%, 1/10W, 0603, Thick Film 1
R4 CRCW060320K0FKEA Vishay Dale 20 k, 1%, 1/10W, 0603, Thick Film 1
R5 CRCW060311K5FKEA Vishay Dale 11.5 k, 1%, 1/10W, 0603, Thick Film 1
R6 CRCW06038K06FKEA Vishay Dale 8.06 k, 1%, 1/10W, 0603, Thick Film 1
R7 CRCW06034K75FKEA Vishay Dale 4.75 k, 1%, 1/10W, 0603, Thick Film 1
10
2017 Microchip Technology Inc. DS20005798A-page 29
MIC45205
R8 CRCW06033K24FKEA Vishay Dale 3.24 k, 1%, 1/10W, 0603, Thick Film 1
R9 CRCW06031K91FKEA Vishay Dale 1.91 k, 1%, 1/10W, 0603, Thick Film 1
R11 CRCW060349K9FKEA Vishay Dale 49.9 k, 1%, 1/10W, 0603, Thick Film 1
R14 CRCW060310K0FKEA Vishay Dale 10 k, 1%, 1/10W, 0603, Thick Film 1
R15 CRCW06031K37FKEA Vishay Dale 1.37 k, 1%, 1/10W, 0603, Thick Film 1
R17, R18,
R19 RCG06030000Z0EA Vishay Dale 0 Resistor, 1%, 1/10W, 0603, Thick
Film 3
TP6 – TP9,
JPx3, JPx4 1502-2 Keystone Single-End, Through-Hole Terminal 6
U1 MIC45205-1YMP Microchip 26V/6A DC/DC Power Module 1
MIC45205-2YMP
TABLE 8-1: BILL OF MATERIALS (CONTINUED)
Item Part Nu mber Manufacturer Description Quantity
MIC45205
DS20005798A-page 30 2017 Microchip Technology Inc.
9.0 PACKAGING INFORMATION
9.1 Package Marking Information
Example
52-Pin QFN*
XXX
XXXXX-XXXX
YYWW
MIC
45205-1YMP
1308
Legend: XX...X Product code or customer-specific information
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
, , Pin one index is identified by a dot, delta up, or delta down (triangle
mark).
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information. Package may or may not include
the corporate logo.
Underbar (_) and/or Overbar () symbol may not be to scale.
3
e
3
e
2017 Microchip Technology Inc. DS20005798A-page 31
MIC45205
52-Lead 8 mm x 8 mm H3QFN Package Outline and Recommended Land Pattern
MIC45205
DS20005798A-page 32 2017 Microchip Technology Inc.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging.
2017 Microchip Technology Inc. DS20005798A-page 33
MIC45205
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging.
MIC45205
DS20005798A-page 34 2017 Microchip Technology Inc.
Thermally Enhanced Land Pattern
FIGURE 9-1: Exposed Metal Trace.
FIGURE 9-2: Solder St encil Opening.
FIGURE 9-3: St ack-Up of Pad Layout and
Solder Paste Stencil and Notes.
2017 Microchip Technology Inc. DS20005798A-page 35
MIC45205
APPENDIX A: REVISION HISTORY
Revision A (June 2017)
• Converted Micrel document MIC45205 to Micro-
chip data sheet DS20005798A.
• Minor text changes throughout.
• Updated maximum output voltage from 5.5V to
0.85 x VIN in Features and General Description.
MIC45205
DS20005798A-page 36 2017 Microchip Technology Inc.
NOTES:
2017 Microchip Technology Inc. DS20005798A-page 37
MIC45205
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
Examples:
a) MIC45205-1YMP-T1: 26V/6A DC/DC Power
Module, HyperLight Load,
–40°C to +125°C, 52-Lead
8 mm x 8 mm x 3 mm QFN,
100/Reel
b) MIC45205-1YMP-TR: 26V/6A DC/DC Power
Module, HyperLight Load,
–40°C to +125°C, 52-Lead
8 mm x 8 mm x 3 mm QFN,
1,500/Reel
c) MIC45205-2YMP-T1: 26V/6A DC/DC Power
Module, Hyper Speed Control,
–40°C to +125°C, 52-Lead
8 mm x 8 mm x 3 mm QFN,
100/Reel
d) MIC45205-2YMP-TR: 26V/6A DC/DC Power
Module, Hyper Speed Control,
–40°C to +125°C, 52-Lead
8 mm x 8 mm x 3 mm QFN,
1,500/Reel
PART NO. XX
Package
Device
Device: MIC45205: 26V/6A DC/DC Power Module
Features: 1 = HyperLight Load
2 = Hyper Speed Control
Temperature: Y = –40°C to +125°C
Package: MP = 52-Lead 8 mm x 8 mm x 3 mm QFN
Media Type: T1 = 100/Reel
TR = 1,500/Reel
–X
X
Temperature
Note 1: Tape and Reel identifier only appears in the
catalog part number description. This identifier is
used for ordering purposes and is not printed on
the device package. Check with your Microchip
Sales Office for package availability with the
Tape and Reel option.
–XX
Media Type
Features
MIC45205
DS20005798A-page 38 2017 Microchip Technology Inc.
NOTES:
2017 Microchip Technology Inc. DS20005798A-page 39
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate, AVR,
AVR logo, AVR Freaks, BeaconThings, BitCloud, CryptoMemory,
CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KEELOQ,
KEELOQ logo, Kleer, LANCheck, LINK MD, maXStylus,
maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip
Designer, QTouch, RightTouch, SAM-BA, SpyNIC, SST, SST
Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
and other countries.
ClockWorks, The Embedded Control Solutions Company,
EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS,
mTouch, Precision Edge, and Quiet-Wire are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo,
CodeGuard, CryptoAuthentication, CryptoCompanion,
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, Inter-Chip Connectivity, JitterBlocker,
KleerNet, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF,
MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,
PICtail, PureSilicon, QMatrix, RightTouch logo, REAL ICE, Ripple
Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI,
SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC,
USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and
ZENA are trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
Silicon Storage Technology is a registered trademark of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip Technology
Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2017, Microchip Technology Incorporated, All Rights Reserved.
ISBN: 978-1-5224-1845-0
Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’ s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, micro perip hera ls, n onvolat ile memory and
analog products . In add ition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
QUALITYMANAGEMENTS
YSTEM
CERTIFIEDBYDNV
== ISO/TS16949==
DS20005798A-page 40 2017 Microchip Technology Inc.
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11/07/16