JANTX1N5806-TR - SEMTECH INTERNATIONAL

LT3065 Series

3065fc

For more information www.linear.com/LT3065

L, LT, LT C , LT M, Linear Technology and the Linear logo are registered trademarks and

ThinSOT is a trademark of Analog Devices, Inc. All other trademarks are the property of their

respective owners.

Typical applicaTion

FeaTures DescripTion

45V VIN, 500mA Low Noise,

Linear Regulator with Programmable

Current Limit and Power Good

The LT

3065 Series are micropower, low noise, low dropout

voltage (LDO) linear regulators that operate over a 1.8V

to 45V input voltage range. The devices supply 500mA of

output current with a typical dropout voltage of 300mV. A

single external capacitor provides programmable low noise

reference performance and output soft-start functionality.

A single external resistor programs the LT3065’s current

limit, accurate to ±10% over a wide input voltage and tem-

perature range. A PWRGD flag indicates output regulation.

The LT3065 optimizes stability and transient response

with low ESR ceramic capacitors, requiring a minimum of

3.3µF. Internal protection circuitry includes current limiting

with foldback, thermal limiting, reverse battery protection,

reverse current protection and reverse output protection.

The LT3065 is available in fixed output voltages of 1.2V,

1.5V, 1.8V, 2.5V, 3.3V, and 5V, and as an adjustable de-

vice with an output voltage range from 0.6V to 40V. The

LT3065 is available in the thermally-enhanced 10-lead

3mm × 3mm DFN and 12-lead MSOP packages.

5V Supply with 200mA Precision Current Limit

applicaTions

n Input Voltage Range: 1.8V to 45V

n Output Current: 500mA

n Dropout Voltage: 300mV

n Programmable Precision Current Limit: ±10%

n Power Good Flag

n Low Noise: 25µVRMS (10Hz to 100kHz)

n Adjustable Output (VREF = VOUT(MIN) = 600mV)

n Output Tolerance: ±2% Over Line, Load and

Temperature

n Stable with Low ESR, Ceramic Output Capacitors

(3.3µF Minimum)

n Single Capacitor Soft-Starts Reference and Lowers

Output Noise

n Current Limit Foldback Protection

n Shutdown Current: <1µA

n Reverse Battery and Thermal Limit Protection

n 10-Lead 3mm × 3mm DFN and 12-lead MSOP

Packages

n Battery-Powered Systems

n Automotive Power Supplies

n Industrial Power Supplies

n Avionic Power Supplies

n Portable Instruments

Precision Current Limit, RIMAX = 1.5k

TEMPERATURE (°C)

–75

CURRENT LIMIT (mA)

204

212

220

125

3065 TA01b

196

188

200

208

216

192

184

180 –25 25 75

–50 150

050 100 175

VIN = 5.6V

VIN = 10V

VOUT(NOMINAL) = 5V

LT3065-5

GND

500k

10nF

OUT

SENSE

ADJ

IMAX

SHDN

PWRGD

REF/BYP

3.3µF

5.6V TO 13V

OUT

200mA

3.3µF

1.5k 22nF

3065 TA01a

1nF

LT3065 Series

3065fc

For more information www.linear.com/LT3065

http://www.linear.com/product/LT3065#orderinfo

absoluTe MaxiMuM raTings

IN Pin Voltage .........................................................±50V

OUT Pin Voltage ........................................... +40V, –50V

Input-to-Output Differential Voltage (Note 2) ..+50V, –40V

ADJ Pin Voltage ......................................................±50V

SENSE Pin Voltage ..................................................±50V

SHDN Pin Voltage ...................................................±50V

PWRGD Pin Voltage .......................................–0.3V, 50V

IMAX Pin Voltage ..............................................–0.3V, 7V

REF/BYP Pin Voltage ...................................................1V

(Note 1)

orDer inForMaTion

LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE

LT3065EDD#PBF LT3065EDD#TRPBF LGKS 10-Lead (3mm x 3mm) Plastic DFN –40°C to 125°C

LT3065IDD#PBF LT3065IDD#TRPBF LGKS 10-Lead (3mm x 3mm) Plastic DFN –40°C to 125°C

LT3065HDD#PBF LT3065HDD#TRPBF LGKS 10-Lead (3mm x 3mm) Plastic DFN –40°C to 150°C

LT3065MPDD#PBF LT3065MPDD#TRPBF LGKS 10-Lead (3mm x 3mm) Plastic DFN –55°c to 150°C

LT3065EDD-1.2#PBF LT3065EDD-1.2#TRPBF LGQV 10-Lead (3mm x 3mm) Plastic DFN –40°C to 125°C

LT3065IDD-1.2#PBF LT3065IDD-1.2#TRPBF LGQV 10-Lead (3mm x 3mm) Plastic DFN –40°C to 125°C

LT3065HDD-1.2#PBF LT3065HDD-1.2#TRPBF LGQV 10-Lead (3mm x 3mm) Plastic DFN –40°C to 150°C

LT3065MPDD-1.2#PBF LT3065MPDD-1.2#TRPBF LGQV 10-Lead (3mm x 3mm) Plastic DFN –55°C to 150°C

LT3065EDD-1.5#PBF LT3065EDD-1.5#TRPBF LGQW 10-Lead (3mm x 3mm) Plastic DFN –40°C to 125°C

LT3065IDD-1.5#PBF LT3065IDD-1.5#TRPBF LGQW 10-Lead (3mm x 3mm) Plastic DFN –40°C to 125°C

LT3065HDD-1.5#PBF LT3065HDD-1.5#TRPBF LGQW 10-Lead (3mm x 3mm) Plastic DFN –40°C to 150°C

LT3065MPDD-1.5#PBF LT3065MPDD-1.5#TRPBF LGQW 10-Lead (3mm x 3mm) Plastic DFN –55°C to 150°C

LT3065EDD-1.8#PBF LT3065EDD-1.8#TRPBF LGQX 10-Lead (3mm x 3mm) Plastic DFN –40°C to 125°C

LT3065IDD-1.8#PBF LT3065IDD-1.8#TRPBF LGQX 10-Lead (3mm x 3mm) Plastic DFN –40°C to 125°C

LT3065HDD-1.8#PBF LT3065HDD-1.8#TRPBF LGQX 10-Lead (3mm x 3mm) Plastic DFN –40°C to 150°C

LT3065MPDD-1.8#PBF LT3065MPDD-1.8#TRPBF LGQX 10-Lead (3mm x 3mm) Plastic DFN –55°C to 150°C

LT3065EDD-2.5#PBF LT3065EDD-2.5#TRPBF LGQY 10-Lead (3mm x 3mm) Plastic DFN –40°C to 125°C

TOP VIEW

GND

DD PACKAGE

10-LEAD (3mm × 3mm) PLASTIC DFN

1OUT

OUT

ADJ/SENSE*

GND/ADJ*

REF/BYP

SHDN

PWRGD

IMAX

TJMAX = 150°C, θJA = 31°C/W, θJC = 9°C/W

EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB

SHDN

PWRGD

IMAX

OUT

ADJ/SENSE*

GND/ADJ*

REF/BYP

TOP VIEW

GND

MSE PACKAGE

12-LEAD PLASTIC MSOP

TJMAX = 150°C, θJA = 28°C/W, θJC = 6°C/W

EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB

*Pin 7: GND for LT3065, ADJ for LT3065-1.2, LT3065-1.5, LT3065-1.8, LT3065-2.5,

LT3065-3.3, LT3065-5

*Pin 8: ADJ for LT3065, SENSE for LT3065-1.2, LT3065-1.5, LT3065-1.8, LT3065-2.5,

LT3065-3.3, LT3065-5

*Pin 9: GND for LT3065, ADJ for LT3065-1.2, LT3065-1.5, LT3065-1.8, LT3065-2.5,

LT3065-3.3, LT3065-5

*Pin 10: ADJ for LT3065, SENSE for LT3065-1.2, LT3065-1.5, LT3065-1.8, LT3065-2.5,

LT3065-3.3, LT3065-5

pin conFiguraTion

Output Short-Circuit Duration .......................... Indefinite

Operating Junction Temperature Range (Notes 3, 5, 14)

E-, I-Grades ....................................... –40°C to 125°C

MP-Grade .......................................... –55°C to 150°C

H-Grade ............................................. –40°C to 150°C

Storage Temperature Range .................. –65°C to 150°C

Lead Temperature (Soldering, 10 sec)

MSOP Package Only ......................................... 300°C

LT3065 Series

3065fc

For more information www.linear.com/LT3065

LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE

LT3065IDD-2.5#PBF LT3065IDD-2.5#TRPBF LGQY 10-Lead (3mm x 3mm) Plastic DFN –40°C to 125°C

LT3065HDD-2.5#PBF LT3065HDD-2.5#TRPBF LGQY 10-Lead (3mm x 3mm) Plastic DFN –40°C to 150°C

LT3065MPDD-2.5#PBF LT3065MPDD-2.5#TRPBF LGQY 10-Lead (3mm x 3mm) Plastic DFN –55°C to 150°C

LT3065EDD-3.3#PBF LT3065EDD-3.3#TRPBF LGQZ 10-Lead (3mm x 3mm) Plastic DFN –40°C to 125°C

LT3065IDD-3.3#PBF LT3065IDD-3.3#TRPBF LGQZ 10-Lead (3mm x 3mm) Plastic DFN –40°C to 125°C

LT3065HDD-3.3#PBF LT3065HDD-3.3#TRPBF LGQZ 10-Lead (3mm x 3mm) Plastic DFN –40°C to 150°C

LT3065MPDD-3.3#PBF LT3065MPDD-3.3#TRPBF LGQZ 10-Lead (3mm x 3mm) Plastic DFN –55°C to 150°C

LT3065EDD-5#PBF LT3065EDD-5#TRPBF LGRB 10-Lead (3mm x 3mm) Plastic DFN –40°C to 125°C

LT3065IDD-5#PBF LT3065IDD-5#TRPBF LGRB 10-Lead (3mm x 3mm) Plastic DFN –40°C to 125°C

LT3065HDD-5#PBF LT3065HDD-5#TRPBF LGRB 10-Lead (3mm x 3mm) Plastic DFN –40°C to 150°C

LT3065MPDD-5#PBF LT3065MPDD-5#TRPBF LGRB 10-Lead (3mm x 3mm) Plastic DFN –55°C to 150°C

LT3065EMSE#PBF LT3065EMSE#TRPBF 3065 12-Lead Plastic MSOP –40°C to 125°C

LT3065IMSE#PBF LT3065IMSE#TRPBF 3065 12-Lead Plastic MSOP –40°C to 125°C

LT3065HMSE#PBF LT3065HMSE#TRPBF 3065 12-Lead Plastic MSOP –40°C to 150°C

LT3065MPMSE#PBF LT3065MPMSE#TRPBF 3065 12-Lead Plastic MSOP –55°C to 150°C

LT3065EMSE-1.2#PBF LT3065EMSE-1.2#TRPBF 306512 12-Lead Plastic MSOP –40°C to 125°C

LT3065IMSE-1.2#PBF LT3065IMSE-1.2#TRPBF 306512 12-Lead Plastic MSOP –40°C to 125°C

LT3065HMSE-1.2#PBF LT3065HMSE-1.2#TRPBF 306512 12-Lead Plastic MSOP –40°C to 150°C

LT3065MPMSE-1.2#PBF LT3065MPMSE-1.2#TRPBF 306512 12-Lead Plastic MSOP –55°C to 150°C

LT3065EMSE-1.5#PBF LT3065EMSE-1.5#TRPBF 306515 12-Lead Plastic MSOP –40°C to 125°C

LT3065IMSE-1.5#PBF LT3065IMSE-1.5#TRPBF 306515 12-Lead Plastic MSOP –40°C to 125°C

LT3065HMSE-1.5#PBF LT3065HMSE-1.5#TRPBF 306515 12-Lead Plastic MSOP –40°C to 150°C

LT3065MPMSE-1.5#PBF LT3065MPMSE-1.5#TRPBF 306515 12-Lead Plastic MSOP –55°C to 150°C

LT3065EMSE-1.8#PBF LT3065EMSE-1.8#TRPBF 306518 12-Lead Plastic MSOP –40°C to 125°C

LT3065IMSE-1.8#PBF LT3065IMSE-1.8#TRPBF 306518 12-Lead Plastic MSOP –40°C to 125°C

LT3065HMSE-1.8#PBF LT3065HMSE-1.8#TRPBF 306518 12-Lead Plastic MSOP –40°C to 150°C

LT3065MPMSE-1.8#PBF LT3065MPMSE-1.8#TRPBF 306518 12-Lead Plastic MSOP –55°C to 150°C

LT3065EMSE-2.5#PBF LT3065EMSE-2.5#TRPBF 306525 12-Lead Plastic MSOP –40°C to 125°C

LT3065IMSE-2.5#PBF LT3065IMSE-2.5#TRPBF 306525 12-Lead Plastic MSOP –40°C to 125°C

LT3065HMSE-2.5#PBF LT3065HMSE-2.5#TRPBF 306525 12-Lead Plastic MSOP –40°C to 150°C

LT3065MPMSE-2.5#PBF LT3065MPMSE-2.5#TRPBF 306525 12-Lead Plastic MSOP –55°C to 150°C

LT3065EMSE-3.3#PBF LT3065EMSE-3.3#TRPBF 306533 12-Lead Plastic MSOP –40°C to 125°C

LT3065IMSE-3.3#PBF LT3065IMSE-3.3#TRPBF 306533 12-Lead Plastic MSOP –40°C to 125°C

LT3065HMSE-3.3#PBF LT3065HMSE-3.3#TRPBF 306533 12-Lead Plastic MSOP –40°C to 150°C

LT3065MPMSE-3.3#PBF LT3065MPMSE-3.3#TRPBF 306533 12-Lead Plastic MSOP –55°C to 150°C

LT3065EMSE-5#PBF LT3065EMSE-5#TRPBF 30655 12-Lead Plastic MSOP –40°C to 125°C

LT3065IMSE-5#PBF LT3065IMSE-5#TRPBF 30655 12-Lead Plastic MSOP –40°C to 125°C

LT3065HMSE-5#PBF LT3065HMSE-5#TRPBF 30655 12-Lead Plastic MSOP –40°C to 150°C

LT3065MPMSE-5#PBF LT3065MPMSE-5#TRPBF 30655 12-Lead Plastic MSOP –55°C to 150°C

Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through

designated sales channels with #TRMPBF suffix.

orDer inForMaTion

LT3065 Series

3065fc

For more information www.linear.com/LT3065

elecTrical characTerisTics

The l denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at TA = 25°C (Note 3).

PARAMETER CONDITIONS MIN TYP MAX UNITS

Minimum Input Voltage (Notes 4, 9) ILOAD = 500mA l1.8 2.2 V

Regulated Output Voltage LT3065-1.2: VIN = 2.2V, ILOAD = 1mA

2.2V < VIN < 45V, 1mA < ILOAD < 500mA

LT3065-1.5: VIN = 2.2V, ILOAD = 1mA

2.2V < VIN < 45V, 1mA < ILOAD < 500mA

LT3065-1.8: VIN = 2.4V, ILOAD = 1mA

2.4V < VIN < 45V, 1mA < ILOAD < 500mA

LT3065-2.5: VIN = 3.1V, ILOAD = 1mA

3.1V < VIN < 45V, 1mA < ILOAD < 500mA

LT3065-3.3: VIN = 3.9V, ILOAD = 1mA

3.9V < VIN < 45V, 1mA < ILOAD < 500mA

LT3065-5: VIN = 5.6V, ILOAD = 1mA

5.6V < VIN < 45V, 1mA < ILOAD < 500mA

1.188

1.176

1.485

1.470

1.782

1.764

2.475

2.450

3.267

3.234

4.950

4.900

1.2

1.5

1.8

2.5

3.3

1.212

1.224

1.515

1.530

1.818

1.836

2.525

2.550

3.333

3.366

5.050

5.100

ADJ Pin Voltage (Notes 4, 5) LT3065: VIN = 2.2V, ILOAD = 1mA

2.2V < VIN < 45V, 1mA < ILOAD < 500mA

594

588

600 606

612

Line Regulation

ILOAD = 1mA

LT3065-1.2: ΔVIN = 2.2V to 45V

LT3065-1.5: ΔVIN = 2.2V to 45V

LT3065-1.8: ΔVIN = 2.4V to 45V

LT3065-2.5: ΔVIN = 3.1V to 45V

LT3065-3.3: ΔVIN = 3.9V to 45V

LT3065-5: ΔVIN = 5.6V to 45V

LT3065: ΔVIN = 2.2V to 45V (Note 4)

0.7

0.9

1.1

1.6

2.0

3.1

0.1

8.8

10.5

14.6

19.3

29.2

Load Regulation

ΔILOAD = 1mA to 500mA

LT3065-1.2, VIN = 2.2V

LT3065-1.5, VIN = 2.2V

LT3065-1.8, VIN = 2.4V

LT3065-2.5 VIN = 3.1V

LT3065-3.3, VIN = 3.9V

LT3065-5, VIN = 5.6V

LT3065, VIN = 2.2V (Note 4)

0.5

0.7

0.9

1.2

1.6

2.4

0.1

16.7

33.4

Dropout Voltage, VIN = VOUT(NOMINAL)

(Notes 6, 7)

ILOAD = 10mA

110 150

210

ILOAD = 50mA

145 200

310

ILOAD = 100mA

175 220

330

ILOAD = 500mA

300 350

510

GND Pin Current,

VIN = VOUT(NOMINAL) + 0.6V

(Notes 7, 8)

ILOAD = 0mA

ILOAD = 1mA

ILOAD = 10mA

ILOAD = 100mA

ILOAD = 500mA

100

270

1.8

110

200

550

4.5

µA

Quiescent Current in Shutdown VIN = 45V, VSHDN = 0V 0.2 1 µA

ADJ Pin Bias Current (Notes 4, 10) VIN = 2.2V l16 60 nA

Output Voltage Noise COUT = 10µF, ILOAD = 500mA, VOUT = 600mV,

BW = 10Hz to 100kHz

90 µVRMS

COUT = 10µF, CBYP = 10nF, ILOAD = 500mA,

VOUT = 600mV, BW = 10Hz to 100kHz

25 µVRMS

Shutdown Threshold VOUT = Off to On

VOUT = On to Off

0.9

1. 3

1.1

1.42 V

LT3065 Series

3065fc

For more information www.linear.com/LT3065

elecTrical characTerisTics

The l denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at TA = 25°C (Note 3).

SHDN Pin Current (Note 11) VSHDN = 0V, VIN = 45V

VSHDN = 45V, VIN = 45V

0.5

±1

µA

Ripple Rejection

VIN – VOUT = 2V, VRIPPLE = 0.5VP-P,

fRIPPLE = 120Hz, ILOAD = 500mA

LT3065-1.2

LT3065-1.5

LT3065-1.8

LT3065-2.5

LT3065-3.3

LT3065-5

LT3065

Input Reverse Leakage Current VIN = –45V, VOUT = 0 l300 µA

Reverse Output Current (Note 12) VOUT = 1.2V, VIN = VSHDN = 0 0 10 µA

Internal Current Limit (Note 4) VIN = 2.2V, VOUT = 0, VIMAX = 0

VIN = 2.2V, ΔVOUT = –5%

520

900 mA

External Programmed Current Limit

(Notes 7, 13)

5.6V < VIN < 10V, VOUT = 95% of VOUT (Nominal), RIMAX = 1.5k

5.6V < VIN < 7V, VOUT = 95% of VOUT (Nominal), RIMAX = 604Ω

180

445

200

495

220

545

PWRGD Logic Low Voltage Pull-Up Current = 50µA l0.07 0.25 V

PWRGD Leakage Current VPWRGD = 45V 0.01 1 µA

PWRGD Trip Point % of Nominal Output Voltage, Output Rising l86 90 94 %

PWRGD Trip Point Hysteresis % of Nominal Output Voltage 1.6 %

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: Absolute maximum input-to-output differential voltage is not

achievable with all combinations of rated IN pin and OUT pin voltages.

With IN at 50V, do not pull OUT below 0V. The total differential voltage

from IN to OUT must not exceed +50V, –40V. If OUT is pulled above IN

and GND, the OUT to IN differential voltage must not exceed 40V.

Note 3: The LT3065 regulator is tested and specified under pulse

load conditions such that TJ ≅ TA. The LT3065E regulators are 100%

tested at TA = 25°C and performance is guaranteed from 0°C to 125°C.

Performance at –40°C to 125°C is assured by design, characterization and

correlation with statistical process controls. The LT3065I regulators are

guaranteed over the full –40°C to 125°C operating junction temperature

range. The LT3065MP regulators are 100% tested over the –55°C to

150°C operating junction temperature range. The LT3065H regulators are

100% tested at the 150°C operating junction temperature. High junction

temperatures degrade operating lifetimes. Operating lifetime is derated at

junction temperatures greater than 125°C.

Note 4: The LT3065 adjustable version is tested and specified for these

conditions with the ADJ pin connected to the OUT pin.

Note 5: Maximum junction temperature limits operating conditions.

Regulated output voltage specifications do not apply for all possible

combinations of input voltage and output current. If operating at the

maximum input voltage, limit the output current range. If operating at

the maximum output current, limit the input voltage range. Current limit

foldback limits the maximum output current as a function of input-to-

output voltage. See Current Limit vs VIN – VOUT in the Typical Performance

Characteristics section.

Note 6: Dropout voltage is the minimum IN-to-OUT differential voltage

needed to maintain regulation at a specified output current. In dropout,

the output voltage equals (VIN – VDROPOUT). For some output voltages,

minimum input voltage requirements limit dropout voltage.

Note 7: To satisfy minimum input voltage requirements, the LT3065 is

tested and specified for these conditions with an external resistor divider

(60.4k bottom, 442k top) which sets VOUT to 5V. The divider adds 10uA of

output DC load. This external current is not factored into GND pin current.

Note 8: GND pin current is tested with VIN = VOUT(NOMINAL) + 0.6V and a

current source load. GND pin current increases in dropout. See GND pin

current curves in the Typical Performance Characteristics section.

Note 9: To satisfy requirements for minimum input voltage, current limit is

tested at VIN = VOUT(NOMINAL) + 1V or VIN = 2.2V, whichever is greater.

Note 10: ADJ pin bias current flows out of the ADJ pin.

Note 11: SHDN pin current flows into the SHDN pin.

Note 12: Reverse output current is tested with the IN pin grounded and the

OUT pin forced to the specified voltage. This current flows into the OUT

pin and out of the GND pin.

Note 13: Current limit varies inversely with the external resistor value tied

from the IMAX pin to GND. For detailed information on selecting the IMAX

resistor value, see the Operation section. If the externally programmed

current limit feature is unused, tie the IMAX pin to GND. The internal

current limit circuitry implements short-circuit protection as specified.

Note 14: This IC includes over temperature protection that protects the

device during overload conditions. Junction temperature exceeds 125°C

(LT3065E, LT3065I) or 150°C (LT3065MP, LT3065H) when the over

temperature circuitry is active. Continuous operation above the specified

maximum junction temperature may impair device reliability.

LT3065 Series

3065fc

For more information www.linear.com/LT3065

Typical perForMance characTerisTics

Quiescent Current LT3065-1.5 Output VoltageLT3065-1.2 Output Voltage

Typical Dropout Voltage Guaranteed Dropout Voltage Dropout Voltage

OUTPUT CURRENT (mA)

DROPOUT VOLTAGE (mV)

300

400

500

600

400

3065 G01

200

100

250

350

450

550

150

0100 200 300

50 450

150 250 350 500

TJ = 25°C

TJ = 125°C

TJ = 150°C

OUTPUT CURRENT (mA)

DROPOUT VOLTAGE (mV)

100

200

300

700

500

100 200 250 450

600

400

150

250

650

450

550

350

50 150 300 350 400 500

3065 G02

TJ = 25°C

TJ = 150°C

= TEST POINTS

TEMPERATURE (°C)

–75

DROPOUT VOLTAGE (mV)

300

400

500

600

125

3065 G03

200

100

250

350

450

550

150

0–25 25 75

–50 150

050 100 175

IL = 10mA

IL = 100mA

IL = 500mA

IL = 50mA

TEMPERATURE (°C)

–75

QUIESCENT CURRENT (µA)

100

110

130

125

3065 G04

120

0–25 25 75

–50 150

050 100 175

VIN = VSHDN = 12V

VOUT = 5V

IL = 10µA

VIN = 12V

ALL OTHER PINS = 0V

TJ = 25°C, unless otherwise noted.

TEMPERATURE (°C)

–75

OUTPUT VOLTAGE (V)

1.200

1.204

1.216

1.220

125

3065 G05

1.192

1.184

1.196

1.212

1.208

1.224

1.188

1.180

1.176 –25 25 75

–50 150

050 100 175

IL = 1mA

TEMPERATURE (°C)

–75

OUTPUT VOLTAGE (V)

1.500

1.505

1.520

1.525

125

3065 G06

1.490

1.480

1.495

1.515

1.510

1.530

1.485

1.475

1.470 –25 25 75

–50 150

050 100 175

IL = 1mA

TEMPERATURE (°C)

–75

OUTPUT VOLTAGE (V)

1.800

1.806

1.824

1.830

125

3065 G07

1.776

1.794

1.818

1.812

1.836

1.782

1.788

1.770

1.764 –25 25 75

–50 150

050 100 175

IL = 1mA

TEMPERATURE (°C)

–75

OUTPUT VOLTAGE (V)

2.50

2.51

2.54

125

3065 G08

2.47

2.49

2.53

2.52

2.55

2.48

2.46

2.45 –25 25 75

–50 150

050 100 175

IL = 1mA

TEMPERATURE (°C)

–75

OUTPUT VOLTAGE (V)

3.311

3.322

3.355

125

3065 G09

3.278

3.300

3.344

3.333

3.366

3.289

3.267

3.256

3.245

3.234 –25 25 75

–50 150

050 100 175

IL = 1mA

LT3065-1.8 Output Voltage LT3065-2.5 Output Voltage LT3065-3.3 Output Voltage

LT3065 Series

3065fc

For more information www.linear.com/LT3065

Typical perForMance characTerisTics

ADJ Pin VoltageLT3065-5 Output Voltage

TJ = 25°C, unless otherwise noted.

TEMPERATURE (°C)

–75

ADJ PIN VOLTAGE (mV)

600

604

608

612

125

3065 G11

596

592

598

602

606

610

594

590

588 –25 25 75

–50 150

050 100 175

IL = 1mA

TEMPERATURE (°C)

–75

OUTPUT VOLTAGE (V)

5.02

5.04

125

3065 G10

4.98

5.00

5.08

5.06

5.10

4.96

4.94

4.92

4.90 –25 25 75

–50 150

050 100 175

IL = 1mA

Quiescent Current

INPUT VOLTAGE (V)

QUIESCENT CURRENT (µA)

125

150

3065 G12

100

175

200

0246

1 9

3571110

VSHDN = VIN

VSHDN = 0V

TJ = 25°C

RL = 240k

VOUT = 1.2V

INPUT VOLTAGE (V)

QUIESCENT CURRENT (µA)

125

150

3065 G13

100

175

200

0246

1 9

3571110

VSHDN = VIN

VSHDN = 0V

TJ = 25°C

RL = 300k

VOUT = 1.5V

INPUT VOLTAGE (V)

QUIESCENT CURRENT (µA)

125

150

3065 G14

100

175

200

0246

1 9

3571110

VSHDN = VIN

VSHDN = 0V

TJ = 25°C

RL = 360k

VOUT = 1.8V

INPUT VOLTAGE (V)

QUIESCENT CURRENT (µA)

125

150

3065 G15

100

175

200

0246

1 9

3571110

VSHDN = VIN

VSHDN = 0V

TJ = 25°C

RL = 500k

VOUT = 2.5V

INPUT VOLTAGE (V)

QUIESCENT CURRENT (µA)

125

150

3065 G16

100

175

200

0246

1 9

3571110

VSHDN = VIN

VSHDN = 0V

TJ = 25°C

RL = 660k

VOUT = 3.3V

INPUT VOLTAGE (V)

QUIESCENT CURRENT (µA)

125

150

3065 G17

100

175

200

0246

1 9

3571110

VSHDN = VIN

VSHDN = 0V

TJ = 25°C

RL = 1M

VOUT = 5V

VIN (V)

QUIESCENT CURRENT (µA)

100

110

120

130

5 10 15 20

3065 G18

25 30 4535 40

TJ = 25°C

VOUT = 5V

IL = 10µA

VSHDN = 0V

VSHDN = VIN

LT3065-1.2 Quiescent Current

LT3065-1.5 Quiescent Current

LT3065-3.3 Quiescent Current LT3065-5 Quiescent Current

LT3065-2.5 Quiescent CurrentLT3065-1.8 Quiescent Current

LT3065 Series

3065fc

For more information www.linear.com/LT3065

Typical perForMance characTerisTics

SHDN Pin Current

GND Pin Current vs ILOAD SHDN Pin Threshold

INPUT VOLTAGE (V)

GND PIN CURRENT (mA)

3065 G19

0246

1 9

357121110

TJ = 25°C

*FOR VOUT = 1.2V

VSHDN = VIN

RL = 2.4Ω

IL = 500mA*

RL = 4.8Ω

IL = 250mA*

RL = 12Ω

IL = 100mA*

RL = 120Ω

IL = 10mA*

INPUT VOLTAGE (V)

GND PIN CURRENT (mA)

3065 G20

0246

1 9

357121110

TJ = 25°C

*FOR VOUT = 1.5V

VSHDN = VIN

RL = 3Ω

IL = 500mA*

RL = 6Ω

IL = 250mA*

RL = 15Ω

IL = 100mA*

RL = 150Ω

IL = 10mA*

INPUT VOLTAGE (V)

GND PIN CURRENT (mA)

3065 G21

0246

1 9

357121110

TJ = 25°C

*FOR VOUT = 1.8V

VSHDN = VIN

RL = 3.6Ω

IL = 100mA*

RL = 7.2Ω

IL = 250mA*

RL = 18Ω

IL = 100mA*

RL = 180Ω

IL = 10mA*

INPUT VOLTAGE (V)

GND PIN CURRENT (mA)

3065 G22

0246

1 9

357121110

TJ = 25°C

*FOR VOUT = 2.5V

VSHDN = VIN

RL = 5Ω

IL = 500mA*

RL = 10Ω

IL = 250mA*

RL = 25Ω

IL = 100mA*

RL = 250Ω

IL = 10mA*

INPUT VOLTAGE (V)

GND PIN CURRENT (mA)

3065 G23

0246

1 9

357121110

TJ = 25°C

*FOR VOUT = 3.3V

VSHDN = VIN

RL = 6.6Ω

IL = 500mA*

RL = 13.2Ω

IL = 250mA*

RL = 33Ω

IL = 100mA*

RL = 330Ω

IL = 10mA*

INPUT VOLTAGE (V)

GND PIN CURRENT (mA)

3065 G24

0246

1 9

357121110

TJ = 25°C

*FOR VOUT = 5V

VSHDN = VIN

RL = 10Ω

IL = 500mA*

RL = 20Ω

IL = 250mA*

RL = 50Ω

IL = 100mA*

RL = 500Ω

IL = 10mA*

ILOAD (mA)

GND PIN CURRENT (mA)

400

3065 G25

0100 200 300

50 450

150 250 350 500

VIN = 5.6V

VOUT = 5V

TEMPERATURE (°C)

–75

SHDN PIN THRESHOLD (V)

1.0

1.2

1.4

1.5

1.3

1.1

0.9

25 50 100 175

0.6

0.8

0.2

0.4

0.5

0.7

0.1

0.3

0–50 –25 0 75 125 150

3065 G26

OFF TO ON

ON TO OFF

TEMPERATURE (°C)

SHDN PIN CURRENT (µA)

1.0

2.0

3.0

0.5

1.5

2.5

–25 25 75 125

3065 G27

175–50–75 0 50 100 150

SHDN = 45V

LT3065-1.2 GND Pin Current

LT3065-2.5 GND Pin Current

LT3065-1.5 GND Pin Current

LT3065-3.3 GND Pin Current

LT3065-1.8 GND Pin Current

LT3065-5 GND Pin Current

LT3065 Series

3065fc

For more information www.linear.com/LT3065

Typical perForMance characTerisTics

TJ = 25°C, unless otherwise noted.

SHDN Pin Input Current ADJ Pin Bias Current Internal Current Limit

SHDN PIN VOLTAGE (V)

SHDN PIN CURRENT (µA)

0.5

1.5

2.0

2.5

10 20 25 45

3065 G28

1.0

5 15 30 35 40

3.0

TEMPERATURE (°C)

–75

ADJ PIN CURRENT (nA)

125

3065 G29

0–25 25 75

–50 150

050 100 175

TEMPERATURE (°C)

–75

OUTPUT CURRENT (µA)

120

160

180

125

3065 G33

100

140

0–25 25 75

–50 150

050 100 175

IADJ

IOUT

VOUT = VADJ = 1.2V

VIN = 0V

FREQUENCY (Hz)

10 100

RIPPLE REJECTION (dB)

1k 10k 100k 1M 10M

3065 G34

ILOAD = 500mA

COUT = 10µF

VOUT = 3.3V

VIN = 4.3V + 50mVRMS RIPPLE

CREF/BYP = 10nF

CREF/BYP = 1nF

CREF/BYP = 0nF

CREF/BYP = 100pF

FREQUENCY (Hz)

10 100

RIPPLE REJECTION (dB)

1k 10k 100k 1M 10M

3065 G35

ILOAD = 500mA

CREF/BYP = 10nF

VOUT = 3.3V

VIN = 4.3V + 50mVRMS RIPPLE

COUT = 10µF

COUT = 3.3µF

TEMPERATURE (°C)

–75

PSRR

75 100 125 150

3065 G36

–50 –25 0 25 50 175

ILOAD = 500mA

CREF/BYP = 10nF

VOUT = 3.3V

VIN = 4.3V + 50mVRMS RIPPLE

f = 120Hz

TEMPERATURE (°C)

–75

CURRENT LIMIT (A)

1.0

1.2

1.4

1.5

1.3

1.1

0.9

25 50 100 175

0.6

0.8

0.2

0.4

0.5

0.7

0.1

0.3

0–50 –25 0 75 125 150

3065 G30

VIN = 6V

VOUT = 0V

VIN – VOUT (V)

CURRENT LIMIT (A)

0.1

0.3

0.4

0.5

1.2

0.7

10 20 25 45

3065 G31

0.2

0.8

0.9

1.0

1.1

0.6

5 15 30 35 40

–55°C

–40°C

25°C

125°C

150°C

VOUT (V)

OUTPUT CURRENT (µA)

0.1

0.3

0.4

0.5

1.0

0.7

10 20 25 40

3065 G32

0.2

0.8

0.9

0.6

5 15 30 35

VIN = 0

Internal Current Limit Reverse Output Current

Input Ripple Rejection Input Ripple Rejection Input Ripple Rejection

Reverse Output Current

LT3065 Series

3065fc

For more information www.linear.com/LT3065

Typical perForMance characTerisTics

TJ = 25°C, unless otherwise noted.

Output Noise Spectral Density

CREF/BYP = 0, CFF = 0

Output Noise Spectral Density

vs CREF/BYP, CFF = 0

Output Noise Spectral Density

vs CFF, CREF/BYP = 10nF

RMS Output Noise,

vs Feedforward Capacitor (CFF)

TEMPERATURE (°C)

–75

MINIMUM INPUT VOLTAGE (V)

0.6

1.8

2.0

2.2

–25 25 50 75 100 125 150 175

3065 G37

0.2

1.4

1.0

0.4

1.6

1.2

0.8

–50 0

IL = 500mA

TEMPERATURE (°C)

–75

LOAD REGULATION (mV)

150125

3065 G38

–1

–2

–4 –25 25 75

–50 175

050 100

–3

∆IL = 1mA TO 500mA

VOUT = 0.6V

VIN = 2.2V

FREQUENCY (Hz)

0.1

OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz)

10 1k 10k 100k

3065 G39

0.01 100

VOUT = 5V

VOUT = 3.3V

VOUT = 2.5V

VOUT = 1.2V

VOUT = 0.6V

COUT = 10µF

IL = 500mA

FREQUENCY (Hz)

0.1

OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz)

10 1k 10k 100k

3065 G40

0.01 100

VOUT = 5V

VOUT = 0.6V

COUT = 10µF

IL = 500mA

CREF/BYP = 100pF

CREF/BYP = 1nF

CREF/BYP = 10nF

FREQUENCY (Hz)

0.1

OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz)

10 1k 10k 100k

3065 G41

0.01 100

10 VOUT = 5V

COUT = 10µF

IL = 500mA

CFF = 0pF

CFF = 100pF

CFF = 1nF

CFF = 10nF

Start-Up Time

vs REF/BYP Capacitor

RMS Output Noise vs Load Current

vs CREF/BYP = 10nF, CFF = 0

Minimum Input Voltage Load Regulation

LOAD CURRENT (mA)

0.01

OUTPUT NOISE VOLTAGE (µVRMS)

0.1 1 10 100 1000

3065 G42

110

CREF/BYP = 0pF

CREF/BYP = 100pF

CREF/BYP = 1nF

CREF/BYP = 10nF

100 f = 10Hz TO 100kHz

COUT = 10µF

LOAD CURRENT (mA)

0.01

OUTPUT VOLTAGE NOISE (µVRMS)

120

140

160

0.1 1 10 100 1000

3065 G43

100

200

180

VOUT = 5V

VOUT = 3.3V

VOUT = 1.8V

VOUT = 1.2V

VOUT = 1.5V

VOUT = 2.5V

VOUT = 0.6V

f = 10Hz TO 100kHz

COUT = 10µF

FEEDFORWARD CAPACITOR, CFF (nF)

OUTPUT NOISE VOLTAGE (µVRMS)

100

0.01 1 10

3065 G44

00.1

120

110 f = 10Hz TO 100kHz

CREF/BYP = 10nF

COUT = 10µF

IFB-DIVIDER = 10µA

ILOAD = 500mA

VOUT = 5V

VOUT = 3.3V

VOUT = 2.5V

VOUT = 1.2V

VOUT = 0.6V

REF/BYP CAPACITOR (nF)

0.1

START-UP TIME (ms)

1000

100

3065 G45

1000101

CFF = OPEN

RMS Output Noise,

VOUT = 0.6V, CFF = 0

LT3065 Series

3065fc

For more information www.linear.com/LT3065

Typical perForMance characTerisTics

5V Transient Response

CFF = 0, IOUT = 50mA to 500mA

5V Transient Response

CFF = 10nF, IOUT = 50mA to 500mA

SHDN Transient Response

CREF/BYP = 0

Transient Response (Load Dump)

SHDN Transient Response

CREF/BYP = 10nF

TJ = 25°C, unless otherwise noted.

10Hz to 100kHz Output Noise

CREF/BYP = 10nF, CFF = 0

10Hz to 100kHz Output Noise

CREF/BYP = 10nF, CFF = 10nF

VOUT

200µV/DIV

2ms/DIVCOUT = 10µF

ILOAD = 500mA

VOUT = 5V

3065 G46

VOUT

200µV/DIV

2ms/DIVCOUT = 10µF

ILOAD = 500mA

VOUT = 5V

3065 G47

VOUT

100mV/DIV

IOUT

500mA/DIV

100µs/DIVVIN = 6V

COUT = 10µF

IFB-DIVIDER = 10µA

VOUT = 5V

3065 G48

VOUT

100mV/DIV

IOUT

500mA/DIV

20µs/DIVVIN = 6V

COUT = 10µF

IFB-DIVIDER = 10µA

VOUT = 5V

3065 G49

VOUT

20mV/DIV

45V

VIN

10V/DIV

12V

1ms/DIVVOUT = 5V

IOUT = 100mA

COUT = 10µF

3065 G50

OUT

5V/DIV

IL = 500mA

REF/BYP

500mV/DIV

SHDN

2V/DIV

2ms/DIV 3065 G51

OUT

5V/DIV

IL = 500mA

REF/BYP

500mV/DIV

SHDN

2V/DIV

2ms/DIV 3065 G52

LT3065 Series

3065fc

For more information www.linear.com/LT3065

Typical perForMance characTerisTics

TJ = 25°C, unless otherwise noted.

IN (Pins 1, 2/Pins 1, 2): Input. These pin(s) supply power

to the device. The LT3065 requires a local IN bypass

capacitor if it is located more than six inches from the main

input filter capacitor. In general, battery output imped-

ance rises with frequency, so adding a bypass capacitor

in battery-powered circuits is advisable. An input bypass

capacitor in the range of 1µF to 10µF generally suffices.

See Input Capacitance and Stability in the Applications

Information section for more information.

The LT3065 withstands reverse voltages on the IN pin

with respect to its GND and OUT pins. In such case, such

as a battery plugged in backwards, the LT3065 behaves

as if a diode is in series with its input. No reverse current

flows into the LT3065 and no reverse voltage appears at

the load. The device protects itself and the load.

SHDN (Pin 3/Pin 3): Shutdown. Pulling the SHDN pin

low puts the LT3065 into a low power state and turns

the output off. Drive the SHDN pin with either logic or an

open collector/drain with a pull-up resistor. The resistor

supplies the pull-up current to the open collector/drain

logic, normally several microamperes, and the SHDN

pin current, typically less than 2µA. If unused, connect

the SHDN pin to IN. The LT3065 does not function if the

SHDN pin is not connected.

TEMPERATURE (°C)

–75

CURRENT LIMIT (mA)

204

212

220

125

3065 G53

196

188

200

208

216

192

184

180 –25 25 75–50 1500 50 100 175

VIN = 10V

VIN = 5.6V

VOUT(NOMINAL) = 5V

TEMPERATURE (°C)

–75

CURRENT LIMIT (mA)

510

530

550

125

3065 G54

490

470

500

520

540

480

460

450 –25 25 75–50 1500 50 100 175

5.6V

10V

VOUT(NOMINAL) = 5V

TEMPERATURE (°C)

–75

ADJ PIN VOLTAGE (mV)

550

570

590

125

3065 G55

530

510

540

560

580

520

500

490 –25 25 75–50 1500 50 100 175

ADJ PIN RISING THRESHOLD

ADJ PIN FALLING THRESHOLD

PWRGD (Pin 4/Pin 4): Power Good. The PWRGD pin is an

open-drain output that actively pulls low if the output is

less than 90% of the nominal output value. The PWRGD

pin is capable of sinking 50µA. There is no internal pull-up

resistor; an external pull-up resistor must be used.

IMAX (Pin 5/Pin 5): Precision Current Limit Programming.

This pin is the collector of a current mirror PNP that is

1/500th the size of the output power PNP. This pin is also

the input to the current limit amplifier. The current limit

threshold is set by connecting a resistor between the IMAX

pin and GND.

For detailed information on how to set the IMAX pin resistor

value, see the Applications Information section. The IMAX

pin requires a 22nF de-coupling capacitor to ground. If

not used, tie IMAX to GND.

NC (Pins 6, 7, MSE Package Only): No Connect. These

pins have no connection to internal circuitry. These pins

may be floated or connected to GND.

REF/BYP (Pin 6/Pin 8): Bypass/Soft Start. Connecting a

capacitor from this pin to GND bypasses the LT3065’s ref-

erence noise and soft-starts the reference. A 10nF bypass

capacitor typically reduces output voltage noise to 25µVRMS

in a 10Hz to 100kHz bandwidth. Soft-start time is directly

Precision Current Limit,

RIMAX = 1.5k

Precision Current Limit,

RIMAX = 604Ω PWRGD Threshold Voltage

pin FuncTions

(DFN/MSOP)

LT3065 Series

3065fc

For more information www.linear.com/LT3065

pin FuncTions

(DFN/MSOP)

Temperature in the Typical Performance Characteristics

section). The ADJ pin voltage is 600mV referenced to GND.

Connecting a capacitor from OUT to ADJ reduces output

noise and improves transient response for output voltages

greater than 600mV. See the Applications Information sec-

tion for calculating the value of the feedforward capacitor.

At output voltages above 0.6V, the resistor divider

connected to the ADJ pin is used to regulate voltage at

the load. Parasitic resistances of PCB traces or cables can

therefore result in load regulation errors at high output

currents. To eliminate these, connect the resistor divider

directly to the load for a Kelvin sense connection, as

shown in Figure 1.

Fixed Voltage Version Only

GND (Exposed Pad Pin 11, Exposed Pad Pin 13): Ground.

The exposed pad of the DFN and MSOP packages is an

electrical connection to GND. To ensure proper electrical

and thermal performance, solder Pin 11/Pin 13 to the

PCB ground.

SENSE (Pin 8/Pin 10): Sense. This pin is the top of the

internal resistor divider network, and should be connected

directly to the load, as a Kelvin sense, for optimum load

regulation and transient performance. Connecting this

pin to the output pin at the package, rather than directly

to the load, can result in load regulation errors due to the

current across the parasitic resistance of the PCB trace.

ADJ (Pin 7/Pin 9): Adjust. This pin is the midpoint of the

internal resistor divider network and the inverting input

to the error amplifier. Connecting a capacitor from the

OUT to ADJ reduces output noise and improves transient

response. See the Applications Information section for

calculating the value of the feedforward capacitor; the

internal divider current is 5µA. This pin should not be

used for any other purpose.

proportional to the BYP capacitor value. If the LT3065

is placed in shutdown, BYP is actively pulled low by an

internal device to reset soft-start. If low noise or soft-start

performance is not required, this pin must be left floating

(unconnected). Do not drive this pin with any active circuitry.

Because the REF/BYP pin is the reference input to the

error amplifier, stray capacitance at this point should be

minimized. Special attention should be given to any stray

capacitances that can couple external signals onto the

REF/BYP pin producing undesirable output transients or

ripple. A minimum capacitance of 100pF from REF/BYP

to GND is recommended.

OUTPUT (Pins 9,10/Pins 11,12): Output. These pins sup-

ply power to the load. Stability requirements demand a

minimum 3.3µF ceramic output capacitor with an ESR < 1Ω

to prevent oscillations. Applications with output voltages

less than 1.2V require a minimum 4.7µF ceramic output

capacitor. Large load transient applications require larger

output capacitors to limit peak voltage transients. See the

Applications Information section for details on transient

response and reverse output characteristics. Permissible

output voltage range is 600mV to 40V.

Adjustable Version Only

GND (Pin 7, Exposed Pad Pin 11/Pin 9, Exposed Pad

Pin 13): Ground. The exposed pad of the DFN and MSOP

packages is an electrical connection to GND. To ensure

proper electrical and thermal performance, solder Pin

11/Pin 13 to the PCB GND and tie it directly to Pin 7/Pin

9. For the adjustable LT3065, connect the bottom of the

external resistor divider that sets output voltage directly

to GND (Pin 7/Pin 9)for optimum load regulation.

ADJ (Pin 8/Pin 10): Adjust. This pin is the error ampli-

fier’s inverting terminal. It’s typical bias current of 16nA

flows out of the pin (see curve of ADJ Pin Bias Current vs

LT3065 Series

3065fc

For more information www.linear.com/LT3065

pin FuncTions

Figure 1. Kelvin Sense Connection

Figure 2. System Block Diagram

block DiagraM

SHDN

OUT

VIN

ADJ

GND

LT3065

+LOAD

SHDN

3065 F01

OUT

VIN

SENSE

GND

FIXED VOLTAGE VERSIONADJUSTABLE VERSION

LT3065-X

+LOAD

–

D1 QIMAX

1/500X QPOWER

IMAX

PWRGD

QPWRGD

3065 F02

540mV

REFERENCE

GND

REF/BYP

*FIXED VOLTAGE OPTIONS ONLY

SHDN

ADJ

SENSE*

30k

R1*

R2*

IDEAL

DIODE

ERROR

AMPLIFIER

THERMAL/

CURRENT LIMIT

CURRENT

LIMIT

AMPLIFIER 100k

600mV

REFERENCE

OUT

–

Table 2. Fixed Voltage Option Resistor Values

VOUT (V) R1 (kΩ) R2 (kΩ)

5 120 880

3.3 120 540

2.5 120 380

1.8 120 240

1.5 120 180

1.2 120 120

LT3065 Series

3065fc

For more information www.linear.com/LT3065

applicaTions inForMaTion

The LT3065 are micropower, low noise and low drop-out

voltage, 500mA linear regulators with micropower shut-

down, programmable current limit, and a Power-good flag.

The devices supply up to 500mA at a typical dropout voltage

of 300mV and operates over a 1.8V to 45V input range.

A single external capacitor provides low noise reference

performance and output soft-start functionality. For ex-

ample, connecting a 10nF capacitor from the REF/BYP

pin to GND lowers output noise to 25μVRMS over a 10Hz

to 100kHz bandwidth. This capacitor also soft starts the

reference and prevents output voltage overshoot at turn-on.

The LT3065’s quiescent current is merely 55μA but provides

fast transient response with a low ESR, minimum value

3.3μF ceramic output capacitor. In shutdown, quiescent

current is less than 1μA and the reference soft-start

capacitor is reset.

The LT3065 optimizes stability and transient response with

low ESR, ceramic output capacitors. The regulator does

not require the addition of ESR as is common with other

regulators. The LT3065 typically provides better than 0.1%

line regulation and 0.1% load regulation. Internal protec-

tion circuitry includes reverse battery protection, reverse

output protection, reverse current protection, current limit

with foldback and thermal shutdown.

This “bullet-proof” protection set makes it ideal for use

in battery-powered, automotive and industrial systems.In

battery backup applications where the output is held up

by a backup battery and the input is pulled to ground, the

LT3065 acts like it has a diode in series with its output

and prevents reverse current.

Adjustable Operation

The adjustable LT3065 has an output voltage range of 0.6V

to 40V. Output voltage is set by the ratio of two external

resistors, as shown in Figure 3. The device regulates the

output to maintain the ADJ pin voltage at 0.6V referenced

to ground. The current in R1 equals 0.6V/R1, and R2’s

current is R1’s current minus the ADJ pin bias current.

The ADJ pin bias current, 16nA at 25°C, flows from the

ADJ pin through R1 to GND. Calculate the output voltage

using the formula in Figure 3. R1’s value should not be

greater than 62k to provide a minimum 10μA load current

so that output voltage errors, caused by the ADJ pin bias

current, are minimized. Note that in shutdown, the output

is turned off and the divider current is zero. Curves of ADJ

Pin Voltage vs Temperature and ADJ Pin Bias Current vs

Temperature appear in the Typical Performance Charac-

teristics section.

The LT3065 is tested and specified with the ADJ pin tied

to the OUT pin, yielding VOUT = 0.6V. Specifications for

output voltages greater than 0.6V are proportional to the

ratio of the desired output voltage to 0.6V: VOUT/0.6V. For

example, load regulation for an output current change of

1mA to 500mA is 0.1mV (typical) at VOUT = 0.6V. At VOUT

= 12V, load regulation is:

12V

0.6V

•(0.1mV) =2mV

Figure 3. Adjustable Operation

VIN

VOUT

IN OUT

LT3065

SHDN ADJ

GND

3065 F03

VOUT =0.6V 1+R2

⎛

⎝

⎜⎞

⎠

⎟– IADJ •R2

( )

VADJ =0.6V

IADJ =16nA AT 25°C

OUTPUT RANGE = 0.6V TO 40V

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Table 3 shows 1% resistor divider values for some common

output voltages with a resistor divider current of 10μA.

Table 3. Output Voltage Resistor Divider Values

VOUT (V) R1 (kΩ) R2 (kΩ)

1.2 60.4 60.4

1.5 59 88.7

1.8 59 118

2.5 60.4 191

3 59 237

3.3 61.9 280

5 59 432

Bypass Capacitance and Output Voltage Noise

The LT3065 regulator provides low output voltage noise

over a 10Hz to 100kHz bandwidth while operating at full

load with the addition of a bypass capacitor (CREF/BYP)

from the REF/BYP pin to GND. A high quality low leak-

age capacitor is recommended. This capacitor bypasses

the internal reference of the regulator, providing a low

frequency noise pole for the internal reference. With the

use of 10nF for CREF/BYP, output voltage noise decreases

to as low as 25μVRMS when the output voltage is set for

0.6V. For higher output voltages (generated by using a

feedback resistor divider), the output voltage noise gains

up proportionately when using CREF/BYP.

To lower the higher output voltage noise, connect a

feedforward capacitor (CFF) from VOUT to the ADJ pin. A

high quality, low leakage capacitor is recommended. This

capacitor bypasses the error amplifier of the regulator,

providing an additional low frequency noise pole. With

the use of 10nF for both CFF and CREF/BYP, output voltage

noise decreases to 25μVRMS when the output voltage is

set to 5V by a 10μA feedback resistor divider. If the cur-

rent in the feedback resistor divider is doubled, CFF must

also be doubled to achieve equivalent noise performance.

Feedforward capacitance can also be used in fixed-voltage

parts; the feedforward capacitor is connected from OUT

to ADJ in the same manner. In this case, the current in

the internal feedback resistor divider is 5μA.

Higher values of output voltage noise can occur if care

is not exercised with regard to circuit layout and testing.

Crosstalk from nearby traces induces unwanted noise

onto the LT3065’s output. Power supply ripple rejection

must also be considered. The LT3065 regulator does not

have unlimited power supply rejection and passes a small

portion of the input noise through to the output.

Using a feedforward capacitor (CFF) connected between

VOUT and ADJ has the added benefit of improving transient

response for output voltages greater than 0.6V. With no

feedforward capacitor, the settling time increases as the

output voltage increases above 0.6V. Use the equation

in Figure 4 to determine the minimum value of CFF to

achieve a transient response that is similar to the 0.6V

output voltage performance regardless of the chosen

output voltage (See Figure 5 and Transient Response in

the Typical Performance Characteristics section).

Figure 4. Feedforward Capacitor for Fast Transient Response

Figure 5. Transient Response vs Feedforward Capacitor

100µs/DIV

VOUT = 5V

COUT = 10µF

IFB-DIVIDER = 10µA

1nF

10nF

LOAD CURRENT

500mA/DIV

FEEDFORWARD

CAPACITOR, CFF

100pF

3065 F05

VOUT

100mV/DIV

3065 F04

SHDN

OUT

ADJ

GND REF/BYP

LT3065

VIN

VOUT

CREF/BYP

CFF

COUT

CFF ≥10nF

10µA •IFB_DIVIDER

( )

IFB _DIVIDER =VOUT

R1+R2

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During start-up, the internal reference soft-starts when

a REF/BYP capacitor is used. Regulator start-up time is

directly proportional to the size of the bypass capacitor

(see Start-Up Time vs REF/BYP Capacitor in the Typical

Performance Characteristics section). The reference

bypass capacitor is actively pulled low during shutdown

to reset the internal reference.

Using a feedforward capacitor also affects start-up time.

Start-up time is directly proportional to the size of the

feedforward capacitor and the output voltage, and is

inversely proportional to the feedback resistor divider cur-

rent, slowing to 15ms with a 10nF feedforward capacitor

and a 10μF output capacitor for an output voltage set to

5V by a 10μA feedback resistor divider.

Output Capacitance and Transient Response

The LT3065 regulator is stable with a wide range of output

capacitors. The ESR of the output capacitor affects stability,

most notably with small capacitors. Use a minimum output

capacitor of 3.3μF with an ESR of 1Ω or less to prevent

oscillations. For VOUT less than 1.2V, use a minimum COUT

of 4.7µF. If a feedforward capacitor is used with output

voltages set for greater than 24V, use a minimum output

capacitor of 10μF. The LT3065 is a micropower device

and output load transient response is a function of output

capacitance. Larger values of output capacitance decrease

the peak deviations and provide improved transient re-

sponse for larger load current changes. Bypass capacitors,

used to decouple individual components powered by the

LT3065, increase the effective output capacitor value. For

applications with large load current transients, a low ESR

ceramic capacitor in parallel with a bulk tantalum capacitor

often provides an optimally damped response.

Give extra consideration to the use of ceramic capacitors.

Manufacturers make ceramic capacitors with a variety of

dielectrics, each with different behavior across tempera-

ture and applied voltage. The most common dielectrics

are specified with EIA temperature characteristic codes

of Z5U, Y5V, X5R and X7R. The Z5U and Y5V dielectrics

provide high C-V products in a small package at low cost,

but exhibit strong voltage and temperature coefficients, as

shown in Figures 6 and 7. When used with a 5V regulator,

a 16V 10μF Y5V capacitor can exhibit an effective value

Figure 6. Ceramic Capacitor DC Bias Characteristics

Figure 7. Ceramic Capacitor Temperature Characteristics

DC BIAS VOLTAGE (V)

CHANGE IN VALUE (%)

3065 F06

–20

–40

–60

–80

–100 04810

2 6 12 14

X5R

Y5V

BOTH CAPACITORS ARE 16V,

1210 CASE SIZE, 10µF

TEMPERATURE (°C)

–50

–20

–40

–60

–80

–100 25 75

3065 F07

–25 0 50 100 125

Y5V

CHANGE IN VALUE (%)

X5R

BOTH CAPACITORS ARE 16V,

1210 CASE SIZE, 10µF

as low as 1μF to 2μF for the DC bias voltage applied, and

over the operating temperature range. The X5R and X7R

dielectrics yield much more stable characteristics and are

more suitable for use as the output capacitor.

The X7R type works over a wider temperature range and

has better temperature stability, while the X5R is less

expensive and is available in higher values. Care still must

be exercised when using X5R and X7R capacitors; the X5R

and X7R codes only specify operating temperature range

and maximum capacitance change over temperature.

Capacitance change due to DC bias with X5R and X7R

capacitors is better than Y5V and Z5U capacitors, but can

still be significant enough to drop capacitor values below

appropriate levels. Capacitor DC bias characteristics tend

to improve as component case size increases, but expected

capacitance at operating voltage should be verified.

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Figure 8. Noise Resulting from Tapping On a Ceramic Capacitor

VOUT

1mV/DIV

10ms/DIV 3065 F08

VOUT = 5V

COUT = 10µF

CREF/BYP = 10nF

Voltage and temperature coefficients are not the only

sources of problems. Some ceramic capacitors have a

piezoelectric response. A piezoelectric device generates

voltage across its terminals due to mechanical stress, simi-

lar to the way a piezoelectric accelerometer or microphone

works. For a ceramic capacitor, the stress is induced by

vibrations in the system or thermal transients. The resulting

voltages produced cause appreciable amounts of noise.

A ceramic capacitor produced the trace in Figure 8 in

response to light tapping from a pencil. Similar vibration

induced behavior can masquerade as increased output

voltage noise.

Stability and Input Capacitance

Low ESR, ceramic input bypass capacitors are acceptable

for applications without long input leads. However, appli-

cations connecting a power supply to an LT3065 circuit’s

IN and GND pins with long input wires combined with a

low ESR, ceramic input capacitors are prone to voltage

spikes, reliability concerns and application-speciﬁc board

oscillations.

The input wire inductance found in many battery-powered

applications, combined with the low ESR ceramic input

capacitor, forms a high Q LC resonant tank circuit. In

some instances this resonant frequency beats against the

output current dependent LDO bandwidth and interferes

with proper operation. Simple circuit modifications/solu-

tions are then required. This behavior is not indicative of

LT3065 instability, but is a common ceramic input bypass

capacitor application issue.

The self-inductance, or isolated inductance, of a wire is

directly proportional to its length. Wire diameter is not a

major factor on its self-inductance. For example, the self-

inductance of a 2-AWG isolated wire (diameter = 0.26") is

about half the self-inductance of a 30-AWG wire (diameter

= 0.01"). One foot of 30-AWG wire has approximately

465nH of self-inductance.

Tw o methods can reduce wire self-inductance. One method

divides the current ﬂowing towards the LT3065 between

two parallel conductors. In this case, the farther apart the

wires are from each other, the more the self-inductance is

reduced; up to a 50% reduction when placed a few inches

apart. Splitting the wires connects two equal inductors in

parallel, but placing them in close proximity creates mutual

inductance adding to the self-inductance. The second and

most effective way to reduce overall inductance is to place

both forward and return current conductors (the input

and GND wires) in very close proximity. Tw o 30-AWG

wires separated by only 0.02", used as forward and return

current conductors, reduce the overall self-inductance

to approximately one-ﬁfth that of a single isolated wire.

If a battery, mounted in close proximity, powers the LT3065,

a 10µF input capacitor suffices for stability. However, if a

distant supply powers the LT3065, use a larger value input

capacitor. Use a rough guideline of 1µF (in addition to the

10µF minimum) per 8 inches of wire length. The minimum

input capacitance needed to stabilize the application also

varies with power supply output impedance variations.

Placing additional capacitance on the LT3065’s output

also helps. However, this requires an order of magnitude

more capacitance in comparison with additional LT3065

input bypassing. Series resistance between the supply and

the LT3065 input also helps stabilize the application; as

little as 0.1Ω to 0.5Ω suffices. This impedance dampens

the LC tank circuit at the expense of dropout voltage. A

better alternative is to use higher ESR tantalum or elec-

trolytic capacitors at the LT3065 input in place of ceramic

capacitors.

IMAX Pin Operation

The IMAX pin is the collector of a PNP that sources a cur-

rent equal to 1/500th of output load current (see Block

Diagram). The IMAX pin is also the input to the precision

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current limit amplifier. Connecting a resistor (RIMAX) from

IMAX to GND sets the current limit threshold. If the output

load increases to a level such that the IMAX pin voltage

reaches 0.6V, the current limit amplifier takes control

and regulates the IMAX voltage to 0.6V, regardless of the

output voltage. Calculate the required RIMAX value for a

given current limit from the following formula:

RIMAX =500 •

0.6V

ILIMIT

In cases where the IN to OUT differential voltage exceeds

10V, current limit foldback lowers the internal current

limit level, possibly causing it to override the external

programmable current limit. See the Internal Current

Limit vs VIN – VOUT graph in the Typical Performance

Characteristics section.

The IMAX pin requires a 22nF decoupling capacitor. If the

external programmable current limit is not used, connect

the IMAX pin directly to GND. LT3065 power dissipation

increases the IMAX threshold at a rate of approximately

0.5 percent per watt.

PWRGD Pin Operation

The PWRGD pin is an open-drain high voltage NMOS digital

output capable of sinking 50µA. The PWRGD pin de-asserts

and becomes high impedance if the output rises above

90% of its nominal value. If the output falls below 88.4%

of its nominal value for more than 25μs, the PWRGD pin

asserts low. The PWRGD comparator has 1.6% hysteresis

and 25μs of deglitching. The PWRGD comparator has a

dedicated reference that does not soft-start if a capacitor

is used on the REF/BYP pin.

The use of a feed-forward capacitor, CFF, as shown in

Figure 4, can result in the ADJ pin being pulled artificially

high during startup transients, which causes the PWRGD

flag to assert early. To avoid this problem, ensure that

the REF/BYP capacitor is significantly larger than the

feed-forward capacitor, causing REF/BYP time constant

to dominate over the time constant of the resistor divider

network.

Operation in Dropout

Some degradation of the IMAX current mirror accuracy

occurs for output currents less than 50mA when operat-

ing in dropout.

Overload Recovery

Like many IC power regulators, the LT3065 has safe oper-

ating area protection. The safe area protection decreases

current limit as input-to-output voltage increases, and

keeps the power transistor inside a safe operating region

for all values of input-to-output voltage. The LT3065 pro-

vides some output current at all values of input-to-output

voltage up to the device’s Absolute Maximum Rating.

When power is first applied, the input voltage rises and the

output follows the input; allowing the regulator to start-up

into very heavy loads. During start-up, as the input voltage

is rising, the input-to-output voltage differential is small,

allowing the regulator to supply large output currents.

With a high input voltage, a problem can occur wherein

the removal of an output short will not allow the output

to recover. Other regulators, such as the LT1083/LT1084/

LT1085 family and LT1764A also exhibit this phenomenon,

so it is not unique to the LT3065. The problem occurs with

a heavy output load when the input voltage is high and the

output voltage is low. Common situations are immediately

after the removal of a short circuit or if the shutdown pin

is pulled high after the input voltage is already turned on.

The load line intersects the output current curve at two

points. If this happens, there are two stable output operat-

ing points for the regulator. With this double intersection,

the input power supply needs to be cycled down to zero

and back up again to recover the output.

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Thermal Considerations

The LT3065’s maximum rated junction temperature of

125°C (E-, I-grades) or 150°C (MP-, H-grades) limits its

power handling capability. Tw o components comprise the

power dissipated by the device:

1. Output current multiplied by the input/output voltage

differential:

IOUT • (VIN – VOUT),

and

2. GND pin current multiplied by the input voltage:

IGND • VIN

GND pin current is determined using the GND Pin Current

curves in the Typical Performance Characteristics section.

Power dissipation equals the sum of the two components

listed above.

The LT3065 regulator has internal thermal limiting

that protects the device during overload conditions.

For continuous normal conditions, do not exceed the

maximum junction temperature of 125°C (E-, I-grades)

or 150°C (MP-, H-grades). Carefully consider all sources

of thermal resistance from junction-to-ambient including

other heat sources mounted in proximity to the LT3065.

The undersides of the LT3065 DFN and MSE packages have

exposed metal from the lead frame to the die attachment.

These packages allow heat to directly transfer from the

die junction to the printed circuit board metal to control

maximum operating junction temperature. The dual-inline

pin arrangement allows metal to extend beyond the ends

of the package on the topside (component side) of a PCB.

Connect this metal to GND on the PCB. The multiple IN

and OUT pins of the LT3065 also assist in spreading heat

to the PCB.

For surface mount devices, heat sinking is accomplished

by using the heat spreading capabilities of the PC board

and its copper traces. Copper board stiffeners and plated

through-holes also can spread the heat generated by

power devices.

Tables 4 and 5 list thermal resistance as a function of copper

area in a fixed board size. All measurements were taken

in still air on a 4-layer FR-4 board with 1oz solid internal

planes, and 2oz external trace planes with a total board

thickness of 1.6mm. For further information on thermal

resistance and using thermal information, refer to JEDEC

standard JESD51, notably JESD51-12.

Table 4. MSOP Measured Thermal Resistance

COPPER AREA

BOARD AREA

THERMAL RESISTANCE

(JUNCTION-TO-AMBIENT)TOPSIDE BACKSIDE

2500 sq mm 2500 sq mm 2500 sq mm 28°C/W

1000 sq mm 2500 sq mm 2500 sq mm 31°C/W

225 sq mm 2500 sq mm 2500 sq mm 32°C/W

100 sq mm 2500 sq mm 2500 sq mm 33°C/W

Table 5. DFN Measured Thermal Resistance

COPPER AREA

TOPSIDE BOARD AREA

THERMAL RESISTANCE

(JUNCTION-TO-AMBIENT)

2500 sq mm 2500 sq mm 31°C/W

1000 sq mm 2500 sq mm 32°C/W

225 sq mm 2500 sq mm 34°C/W

100 sq mm 2500 sq mm 35°C/W

Calculating Junction Temperature

Example: Given an output voltage of 5V, an input voltage

range of 12V ±5%, a maximum output current range of

75mA and a maximum ambient temperature of 85°C, what

is the maximum junction temperature?

The power dissipated by the device equals:

IOUT(MAX) • (VIN(MAX) – VOUT) + IGND • VIN(MAX)

where:

IOUT(MAX) = 75mA

VIN(MAX) = 12.6V

IGND at (IOUT = 75mA, VIN = 12V) = 3.5mA

So:

P = 75mA • (12.6V – 5V) + 3.5mA • 12.6V = 0.614W

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Using a DFN package, the thermal resistance ranges from

31°C/W to 35°C/W depending on the copper area. So the

junction temperature rise above ambient approximately

equals:

0.614W • 35°C/W = 21.5°C

The maximum junction temperature equals the maxi-

mum ambient temperature plus the maximum junction

temperature rise above ambient or:

TJMAX = 85°C + 21.5°C = 106.5°C

Protection Features

The LT3065 incorporates several protection features that

make it ideal for use in battery-powered circuits. In ad-

dition to the normal protection features associated with

monolithic regulators, such as current limiting and thermal

limiting, the device also protects against reverse input

voltages, reverse output voltages and reverse output-to-

input voltages.

Current limit protection and thermal overload protection

protect the device against current overload conditions

at the LT3065’s output. The typical thermal shutdown

temperature is 165°C with about 7°C of hysteresis. For

normal operation, do not exceed a junction temperature

of 125°C (E-, I-grades) or 150°C (MP-, H-grades).

The LT3065 IN pin withstands reverse voltages of 50V. The

device limits current flow to less than 1μA (typically less

than 25nA) and no negative voltage appears at OUT. The

device protects both itself and the load against batteries

that are plugged in backwards.

Figure 9. Reverse Output Current

VOUT (V)

OUTPUT CURRENT (µA)

0.1

0.3

0.4

0.5

1.0

0.7

10 20 25 40

3055 F09

0.2

0.8

0.9

0.6

5 15 30 35

VIN = 0

The LT3065 incurs no damage if its output is pulled be-

low ground. If the input is left open circuit or grounded,

the output can be pulled below ground by 50V. No cur-

rent flows through the pass transistor from the output.

However, current flows in (but is limited by) the feedback

resistor divider that sets the output voltage. Current flows

from the bottom resistor in the divider and from the ADJ

pin’s internal clamp through the top resistor in the divider

to the external circuitry pulling OUT below ground. If a

voltage source powers the input, the output sources cur-

rent equal to its current limit capability and the LT3065

protects itself by thermal limiting. In this case, grounding

the SHDN pin turns off the device and stops the output

from sourcing current.

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Programming Undervoltage Lockout

Power Supply Sequencing Using PWRGD

LT3065

SHDN

VIN > VUVLO

3065 TA02

VUVLO =R1+R2

R2 •1.1V

LT3065

SHDN

LT3065

SHDNPWRGD

3065 TA03

500k

Typical applicaTions

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Typical applicaTions

LED Driver/Current Source

LT3065

22nF

OUTIN

PWRGD

SHDN

IMAX

100k I = 100mA

6Ω

LED

10nF

10µF

3065 TA05

GND

REF/BYP

ADJ

OPEN-LED

INDICATOR

SHDN

LIM

= 150mA

Current Monitor

RIMAX

TO ADC

LT3065

IMAX

3065 TA04

RIMAX =600mV

IOUT(MAX)

⎛

⎝

⎜

⎞

⎠

⎟

⎟•500

VLIM =IOUT

500 •RIMAX

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Typical applicaTions

Paralleling Regulators for Higher Output Current

LT3065

49.9Ω

PWRGD

SHDN

OUT

ADJ

GND

REF/BYP

500k

10µF 10µF

2.5V

6.04k

10nF

3065 TA06

19.1k

6.04k

21k

VIN > 3V

PWRGD

SHDN

IMAX

LT3065

49.9Ω

PWRGD

SHDN

OUT

ADJ

GND

REF/BYP

10nF

0.1µF

IMAX

–

+10k

LT1637

33nF

6.8k

10µF 10µF

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package DescripTion

DD Package

10-Lead Plastic DFN (3mm × 3mm)

(Reference LTC DWG # 05-08-1669 Rev C)

3.00 ±0.10

(4 SIDES)

NOTE:

1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).

CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE

TOP AND BOTTOM OF PACKAGE

0.40 ±0.10

BOTTOM VIEW—EXPOSED PAD

1.65 ±0.10

(2 SIDES)

0.75 ±0.05

R = 0.125

TYP

2.38 ±0.10

(2 SIDES)

106

PIN 1

TOP MARK

(SEE NOTE 6)

0.200 REF

0.00 – 0.05

(DD) DFN REV C 0310

0.25 ±0.05

2.38 ±0.05

(2 SIDES)

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

1.65 ±0.05

(2 SIDES)2.15 ±0.05

0.50

BSC

0.70 ±0.05

3.55 ±0.05

PACKAGE

OUTLINE

0.25 ±0.05

0.50 BSC

DD Package

10-Lead Plastic DFN (3mm × 3mm)

(Reference LTC DWG # 05-08-1699 Rev C)

PIN 1 NOTCH

R = 0.20 OR

0.35 × 45°

CHAMFER

Please refer to http://www.linear.com/product/LT3065#packaging for the most recent package drawings.

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package DescripTion

MSE Package

12-Lead Plastic MSOP, Exposed Die Pad

(Reference LTC DWG # 05-08-1666 Rev G)

MSOP (MSE12) 0213 REV G

0.53 ±0.152

(.021 ±.006)

SEATING

PLANE

0.18

(.007)

1.10

(.043)

MAX

0.22 –0.38

(.009 – .015)

TYP

0.86

(.034)

REF

0.650

(.0256)

BSC

12 11 10 9 8 7

DETAIL “B”

NOTE:

1. DIMENSIONS IN MILLIMETER/(INCH)

2. DRAWING NOT TO SCALE

3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.

INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL

NOT EXCEED 0.254mm (.010") PER SIDE.

0.254

(.010) 0° – 6° TYP

DETAIL “A”

GAUGE PLANE

RECOMMENDED SOLDER PAD LAYOUT

BOTTOM VIEW OF

EXPOSED PAD OPTION

2.845 ±0.102

(.112 ±.004)

2.845 ±0.102

(.112 ±.004)

4.039 ±0.102

(.159 ±.004)

(NOTE 3)

1.651 ±0.102

(.065 ±.004)

1.651 ±0.102

(.065 ±.004)

0.1016 ±0.0508

(.004 ±.002)

1 2 3 4 5 6

3.00 ±0.102

(.118 ±.004)

(NOTE 4)

0.406 ±0.076

(.016 ±.003)

REF

4.90 ±0.152

(.193 ±.006)

DETAIL “B”

CORNER TAIL IS PART OF

THE LEADFRAME FEATURE.

FOR REFERENCE ONLY

NO MEASUREMENT PURPOSE

0.12 REF

0.35

REF

5.10

(.201)

MIN

3.20 – 3.45

(.126 – .136)

0.889 ±0.127

(.035 ±.005)

0.42 ±0.038

(.0165 ±.0015)

TYP

0.65

(.0256)

BSC

MSE Package

12-Lead Plastic MSOP, Exposed Die Pad

(Reference LTC DWG # 05-08-1666 Rev G)

Please refer to http://www.linear.com/product/LT3065#packaging for the most recent package drawings.

LT3065 Series

3065fc

For more information www.linear.com/LT3065

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

revision hisTory

REV DATE DESCRIPTION PAGE NUMBER

A 7/14 Added fixed voltage options and related specs, curves, pin functions, text

Modified pinouts to accommodate new fixed voltage options

Added specification for Absolute Maximum SENSE pin voltage

Modified Bypass Capacitance section

Throughout

B 11/14 Fixed pin function description 13

C 05/17 Corrected Input Ripple Rejection graph; changed 100nF to 100pF

Added bypass capacitor to LED Driver Application circuit

LT3065 Series

3065fc

For more information www.linear.com/LT3065

 LINEAR TECHNOLOGY CORPORATION 2014

LT 0517 REV C • PRINTED IN USA

www.linear.com/LT3065

relaTeD parTs

Typical applicaTion

Adjustable High Efficiency Regulator

LT3065

GND

SHDN

PWRGD

REF/BYP

OUT

ADJ

IMAX

10µF

0.6V TO

10VOUT

200mA

61.9k

1.2k 22nF

100k

255k

10k

* DIFFERENTIAL VOLTAGE ON LT3065

≈ 1.4V SET BY THE TP0610L P-CHANNEL THRESHOLD.

TP0610L

47µF

×2

MBRM140

4.7µF

10nF

3065 TA07

LT3493

CMDSH-4E

GND

10µH

VIN

SHDN

BOOST

0.1µF

100k

0.1µF

1µF

10µF

4.5V TO

25V

PART NUMBER DESCRIPTION COMMENTS

LT1761 100mA, Low Noise LDO 300mV Dropout Voltage, Low Noise: 20μVRMS, VIN = 1.8V to 20V, ThinSOT™ Package

LT1762 150mA, Low Noise LDO 300mV Dropout Voltage, Low Noise: 20μVRMS, VIN = 1.8V to 20V, MS8 Package

LT1763 500mA, Low Noise LDO 300mV Dropout Voltage, Low Noise: 20μVRMS, VIN = 1.8V to 20V, SO-8 and 3mm × 4mm DFN

Packages

LT1962 300mA, Low Noise LDO 270mV Dropout Voltage, Low Noise: 20μVRMS, VIN = 1.8V to 20V, MS8 Package

LT1964 200mA, Low Noise Negative LDO VIN = –2.2V to –20V, VOUT(MIN) = –1.21V, VDO = 0.34V, IQ = 30μA, ISD = 3μA, Low Noise

<30μVRMS, Stable with Ceramic Capacitors, ThinSOT and 3mm × 3mm DFN Packages

LT1965 1.1A, Low Noise LDO 290mV Dropout Voltage, Low Noise: 40μVRMS, VIN = 1.8V to 20V, VOUT = 1.2V to 19.5V,

Stable with Ceramic Capacitors, TO-220, DD-Pak, MSOP and 3mm × 3mm DFN Packages

LT3050 100mA LDO with Diagnostics and

Precision Current Limit

340mV Dropout Voltage, Low Noise: 30μVRMS, VIN = 1.8V to 45V, 3mm × 2mm DFN and

MSOP Packages

LT3055 500mA LDO with Diagnostics and

Precision Current Limit

350mV Dropout Voltage, Low Noise: 25μVRMS, VIN = 1.8V to 45V, 4mm × 3mm DFN and

MSOP Packages

LT3060 100mA Low Noise LDO with Soft-Start 300mV Dropout Voltage, Low Noise: 30μVRMS, VIN = 1.8V to 45V, 2mm × 2mm DFN and

ThinSOT Packages

LT3080/

LT3080-1

1.1A, Parallelable, Low Noise LDO 300mV Dropout Voltage (2-Supply Operation), Low Noise 40µVRMS, VIN = 1.2V to 36V,

VOUT = 0V to 35.7V, Current-Based Reference with 1-Resistor VOUT Set, Directly Parallelable,

Stable with Ceramic Capacitors, TO-220, SOT-223, MSOP and 3mm × 3mm DFN

LT3082 200mA, Parallelable, Low Noise LDO Outputs may be Paralleled for Higher Output Current or Heat Spreading, Wide Input Voltage

Range: 1.2V to 40V, Low Value Input/Output Capacitors Required: 2.2µF, Single Resistor Sets

Output Voltage, 8-Lead SOT-23, 3-Lead SOT-223 and 8-Lead 3mm × 3mm DFN Packages

LT3085 500mA, Parallelable, Low Noise LDO 275mV Dropout Voltage (2-Supply Operation), Low Noise 40µVRMS, VIN = 1.2V to 36V,

VOUT = 0V to 35.7V, Current-Based Reference with 1-Resistor VOUT Set, Directly Parallelable,

Stable with Ceramic Capacitors, MS8E and 2mm × 3mm DFN-6 Packages