IRLR2908 - International Rectifier

02/13/03

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IRLR2908

IRLU2908

HEXFET® Power MOSFET

Description

Specifically designed for Automotive applications, this HEXFET ® Power MOSFET

utilizes the latest processing techniques to achieve extremely low on-resistance per silicon

area. Additional features of this HEXFET power MOSFET are a 175°C junction operating

temperature, low RθJC, fast switching speed and improved repetitive avalanche rating.

These features combine to make this design an extremely efficient and reliable device for

use in Automotive applications and a wide variety of other applications.\

The D-Pak is designed for surface mounting using vapor phase, infrared, or wave

soldering techniques. The straight lead version (IRFU series) is for through-hole mounting

applications. Power dissipation levels up to 1.5 watts are possible in typical surface mount

applications.

VDSS = 80V

RDS(on) = 28mΩ

ID = 30A

D-Pak

IRLR2908

AUTOMOTIVE MOSFET

Features

lAdvanced Process Technology

lUltra Low On-Resistance

lDynamic dv/dt Rating

l175°C Operating Temperature

lFast Switching

lRepetitive Avalanche Allowed up to Tjmax

PD - 94501

I-Pak

IRLU2908

Absolute Maximum RatingsParameter Units

ID @ TC = 25 °C Co nti n uous D r ai n C ur rent, VGS @ 10V (S i l i con Li m ited) A

ID @ TC = 10 0°C Co nti n uous D r ai n C ur rent, VGS @ 10V ( See Fig. 9)

ID @ TC = 25 °C Co nti n uous D r ai n C ur rent, VGS @ 10V (Package Limited)

IDM Pulsed D r ain C urrent

PD @TC = 25°C Maximum Power D issi pation W

Linear Derating Fact or W/°C

VGS Gat e- to-Source Voltage V

EAS Single Pul s e Avala nche Energy (T her m ally Li m it ed)

EAS (tested) Sin

le Pul se Avala nche Ener

Tes ted Va lu e

IAR Avalanche Current

EAR Re petiti v e A v alanc he E n er

dv/dt Pea k Di ode R ec o ver y dv /dt

V/ns

TJ Operatin g Juncti on and °C

TSTG St o r ag e Te m per atur e Ra ng e

Soldering Temperature, for 10 seconds

Therma l R esistance Parameter Typ. Max. Units

RθJC Junction-to-Case ––– 1.3 °C/W

RθJA Junc tio n- t o- Ambient (P CB Moun t )

j

––– 40

RθJA Junction-to-Ambient ––– 110

120

0.77

± 16

180

250

See Fig. 12a,12 b,15,1 6

Max.

150

300 ( 1.6mm fr o m ca se )

-5 5 to + 175

2.3

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Notes  through  are on page 11

HEXFET® is a registered trademark of International Rectifier.

Static @ TJ = 25°C (unless other wis e specified)

Parameter Min. Typ. Max. Units

V(BR)DSS Drain-to-Source Br eakdown Vol tage 80 ––– ––– V

∆ΒVDSS

∆TJ B reakdo w n Vol t age Tem p. Co eff ic i e nt ––– 0. 085 ––– V /°C

RDS(on) Static Drai n-to-S our ce On-R esistance ––– 22. 5 28 mΩ

––– 25 30

VGS(th) Gate Threshold Vo lt age 1.0 ––– 2.5 V

gf s F orw a r d Transc ond uctanc e 35 – –– ––– S

IDSS Drain-to- Sou rce Leakage Curren t ––– ––– 20 µA

––– ––– 250

IGSS Gate-to-Source Forward Leakage ––– ––– 200 nA

Gate-to-Sour ce Reverse Leakage ––– ––– -200

QgTotal Gate Charge ––– 22 33 nC

Qgs Gate-to-Source Charge ––– 6.0 9.1

Qgd Ga t e - to- Dr ain ( " M ille r" ) Ch arge ––– 11 17

td(on) Turn -O n D el ay Time ––– 12 – –– ns

trRise Time –––95–––

td(off) Turn- Of f Delay Tim e – –– 36 –––

tfFall Time –––55–––

LDInte rna l D rai n Indu ctance ––– 4.5 ––– nH Bet ween lead,

6mm (0.25in.)

LSInterna l So ur ce Ind uctan ce ––– 7.5 ––– fr om package

and center of die contact

Ciss In put Capaci tance ––– 1890 ––– pF

Coss O utput Cap acita nce ––– 260 –––

Crss Reve rse Transfer C apacita nce ––– 35 –––

Coss Output Capacitance ––– 1920 –––

Coss O utput Cap acita nce ––– 170 –––

Coss ef f. Effecti ve Output Cap acitance ––– 310 –––

Diode Characteristics

Par a met e r Min . Typ. M a x . Un its

ISCo nti n uous S o ur c e Cu rr ent ––– – –– 39

(Body Diode) A

ISM Pulsed Source Cur ren t ––– ––– 150

(Body Diode)

c

VSD Diode Forward Voltage ––– ––– 1.3 V

trr Reve rse Recovery Ti me ––– 75 110 ns

Qrr Reverse Reco ver y C harge ––– 210 310 nC

ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is domina ted by LS+LD)

VDS = 64V

VGS = 4.5V

ƒ = 1. 0M H z , S ee Fig. 5

VGS = 0 V, VDS = 1.0V, ƒ = 1.0MHz

VGS = 4.5V

MOSFET symbol

VGS = 0V

VDS = 25V

VGS = 0 V, VDS = 64V , ƒ = 1.0M H z

Conditions

VGS = 0V, VDS = 0V to 64V

TJ = 25°C, IF = 23 A , V DD = 25V

di /dt = 100A/µ s

TJ = 25°C, IS = 23A, VGS = 0V

showing t he

inte gra l rev e rs e

p-n ju nctio n diode.

VDS = VGS, ID = 250µ A

VDS = 80V , V GS = 0V

VDS = 80V , V GS = 0V , TJ = 12 5°C

RG = 8.3Ω

ID = 23A

VDS = 25V , I D = 23A

VDD = 40V

ID = 23A

VGS = 16V

VGS = -16V

VGS = 4.5V , ID = 20A

Conditions

VGS = 0V, ID = 25 0µA

Referenc e to 25 °C, ID = 1mA

VGS = 10V, ID = 23A

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Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics

Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductance

vs. Drain Current

0.01 0.1 110 100

VDS, Dr ain-to-Source Vol tage (V)

0.01

0.1

100

1000

ID, Drain-to-Source Current (A)

2.5V

20µs PU LSE WIDT H

Tj = 25°C

VGS

TOP 15V

10V

4.5V

4.0V

3.5V

3.0V

2.7V

BOTTOM 2.5V

0.01 0.1 110 100

VDS, Dr ain-to-Source Vol tage (V)

0.1

100

1000

ID, Drain-to-Source Current (A)

2.5V

20µs PU LSE WIDT H

Tj = 175°C

VGS

TOP 15V

10V

4.5V

4.0V

3.5V

3.0V

2.7V

BOTTOM 2.5V

010 20 30 40 50 60

ID, Drain-to-Source Current (A)

GFS, Forward Transconductance (S)

TJ = 25°C

TJ = 175°C

VDS = 10V

20µs PU LSE WIDT H

2 3 4 5

VGS, Gate-to-Source Voltage ( V)

100

1000

ID, Drain-to-Source Current (Α)

TJ = 25°C

TJ = 175°C

VDS = 25V

20µs PU LSE WIDT H

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Fig 8. Maximum Safe Operating Area

Fig 6. Typical Gate Charge vs.

Gate-to-Source Voltage

Fig 5. Typical Capacitance vs.

Drain-to-Source Voltage

Fig 7. Typical Source-Drain Diode

Forward Voltage

110 100

VDS, Dr ain-to-Source Vol tage (V)

100

1000

10000

100000

C, Capacitance(pF)

VGS = 0V, f = 1 MHZ

Ciss = Cgs + Cgd, Cds SHORTED

Crss = Cgd

Co ss = Cds + Cgd

Coss

Crss

Ciss

0 5 10 15 20 25

QG Total Gate Char ge (nC)

0.0

1.0

2.0

3.0

4.0

5.0

VGS, Gate-to-Source Voltage (V)

VDS= 64V

VDS= 40V

VDS= 16V

ID= 23A

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8

VSD, Source-to-Drai n Voltage ( V)

0.10

1.00

10.00

100.00

1000.00

ISD, Reverse Drain Current (A)

TJ = 25°C

TJ = 175°C

VGS = 0V

1 10 100 1000

VDS, Drain-to-Source Voltage (V)

0.1

100

1000

ID, Drain-to-Source Current (A)

1msec

10msec

OPERATION IN THIS AREA

LIMITED BY RDS(on)

100µsec

Tc = 25°C

Tj = 175°C

Single Pulse

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Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

Fig 9. Maximum Drain Current vs.

Case Temperature Fig 10. Normalized On-Resistance

vs. Temperature

25 50 75 100 125 150 175

TC , Case Temperature (° C)

ID, Drain Current (A)

-60 -40 -20 020 40 60 80 100 120 140 160 180

TJ , Junct ion Temperat ure (°C)

0.0

0.5

1.0

1.5

2.0

2.5

3.0

RDS(on) , Drain-to-Source On Resistance

(Normalized)

ID = 38A

VGS = 4.5V

1E-006 1E-005 0.0001 0.001 0.01 0.1 1

t1 , Rectangul ar Pulse Duration (sec)

0.001

0.01

0.1

Thermal Response ( Z thJC )

0.20

0.10

D = 0. 50

0.02

0.01

0.05

SINGLE PULSE

( THERMAL RESPONSE ) Notes:

1. Duty factor D = t / t

2. Peak T = P x Z + T

1 2

JDM thJC C

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Charge

D.U.T. V

3mA

.3µF

50KΩ

.2µF

12V

Current Regulator

Same Type as D.U.T.

Current Sampling Resistors

10 V

Fig 13b. Gate Charge Test Circuit

Fig 13a. Basic Gate Charge Waveform

Fig 12c. Maximum Avalanche Energy

vs. Drain Current

Fig 12b. Unclamped Inductive Waveforms

Fig 12a. Unclamped Inductive Test Circuit

(BR)DSS

Fig 14. Threshold Voltage vs. Temperature

0.01

Ω

D.U.T

VDS

-V

DRIVER

15V

20V

VGS

25 50 75 100 125 150 175

Starting TJ , Junction Temperature (°C)

100

200

300

400

EAS , Single Pulse Avalanche Energy (mJ)

TOP 9.3A

16A

BOTTOM23A

-75 -50 -25 025 50 75 100 125 150 175 200

TJ , Temper ature ( °C )

0.5

1.0

1.5

2.0

2.5

VGS(th) Gate threshold Voltage (V)

ID = 250µA

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Fig 15. Typical Avalanche Current vs.Pulsewidth

Fig 16. Maximum Avalanche Energy

vs. Temperature

Notes on Repetitive Avalanche Curves , Figures 15, 16:

(For further info, see AN-1005 at www.irf.com)

1. Avalanche failures assumption:

Purely a thermal phenomenon and failure occurs at a

temperature far in excess of T jmax. This is validated for

every part type.

2. Safe operation in Avalanche is allowed as long asTjmax is

not exceeded.

3. Equation below based on circuit and waveforms shown in

Figures 12a, 12b.

4. PD (ave) = Average power dissipation per single

avalanche pulse.

5. BV = Rated breakdown voltage (1.3 factor accounts for

voltage increase during avalanche).

6. Iav = Allowable avalanche current.

7. ∆T = Allowable rise in junction temperature, not to exceed

Tjmax (assumed as 25°C in Figure 15, 16).

tav = Average time in avalanche.

D = Duty cycle in avalanche = tav ·f

ZthJC(D, tav) = Transient thermal resistance, see figure 11)

PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC

Iav = 2DT/ [1.3·BV· Zth]

EAS (AR) = PD (ave)·tav

1.0E-08 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

tav (sec)

0.1

100

1000

Avalanche Current (A)

0.05

Dut y Cycl e = Single Pulse

0.10

Allowed avalanche Current vs

avalanche pulsewidth, tav

assuming ∆Tj = 25°C due to

avalanche losses

0.01

25 50 75 100 125 150 175

Starting TJ , Junction Temperatur e (° C)

100

150

200

EAR , Avalanche Energy (mJ)

TOP Single Pulse

BOTTOM 10% Duty Cycle

ID = 23A

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Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel

HEXFET® Power MOSFETs

Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance

Current Transformer

P.W. Period

di/dt

Diode Recovery

dv/dt

Ripple ≤5%

Body Diode Forward Drop

Re-Applied

Voltage

Reverse

Recovery

Current Body Diode Forward

Current

=10V

Driver Gate Drive

D.U.T. I

Waveform

D.U.T. V

Waveform

Inductor Curent

D = P.W.

Period

* VGS = 5V for Logic Level Devices







RGVDD

• dv/dt controlled by RG

• Driver same type as D.U.T.

• ISD controlled by Duty Factor "D"

• D.U.T. - Device Under Test

D.U.T



VDS

90%

10%

VGS t

d(on)

d(off)

VDS

Pulse Width ≤ 1 µs

Duty Factor ≤ 0.1 %

VGS

D.U.T.

10V

VDD

Fig 18a. Switching Time Test Circuit

Fig 18b. Switching Time Waveforms

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TO-252AA (D-Pak) Package Outline

Dimensions are shown in millimeters (inches)

TO-252AA (D-Pak) Part Marking Information

6.73 (.265)

6.35 (.250)

- A -

1 2 3

6.22 (.245)

5.97 (.235)

- B -

3X 0.89 (.035)

0.64 (.025)

0.25 (.010) M A M B

4. 57 (.180)

2.28 (.090)

2X 1.14 (.045)

0.76 (.030)

1.52 (.060)

1.15 (.045)

1.02 (.040)

1.64 (.025)

5.46 (.215)

5.21 (.205) 1. 27 (.050 )

0. 88 (.035 )

2.38 (.094)

2.19 (.086) 1.14 (.045)

0.89 (.035)

0.58 (.023)

0.46 (.018)

6.45 (.245)

5.68 (.224)

0.51 (.020)

MIN.

0. 58 (.02 3)

0. 46 (.01 8)

LEAD ASSIGNMENTS

1 - GATE

2 - DRAIN

3 - SOURCE

4 - DRAIN

10. 42 (.410)

9.40 (.370)

NOTES:

1 DIMENSIO NI NG & TOLERANCING PER ANSI Y14.5M, 1982.

2 CONTROLLING DIMENSIO N : INCH.

3 CONFORMS TO JEDEC OUTLINE TO-252AA.

4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP,

SOLDER DIP MAX. +0.16 (.006).

EXAMPLE:

LOT CODE 9U1P

THIS IS AN IRFR120

WITH ASSEMBLY

WE E K = 16

DAT E CODE

YE AR = 0

LOGO

RECTIFIER

INTERNATIONAL

AS S E MB L Y

LOT CODE

016

IRFU120

9U 1P

Notes: This part marking information applies to devices produced before 02/26/2001

INTERNATIONAL

LOGO

RECTIFIER

3412

IRF U 120

916A

LOT CODE

ASSEMBLY

EXAMPLE:

WITH ASSEMBLY

THIS IS AN IRFR120

YEAR 9 = 1999

DAT E CODE

LINE A

WEEK 16

IN THE ASS EMBLY LINE "A"

AS S EMBLED ON WW 16, 1999

LOT CODE 1234

PART NUMBER

Notes : T his part marking information applies to devices produced after 02/26/2001

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I-Pak (TO-251AA) Package Outline

Dimensions are shown in millimeters (inches)

I-Pak (TO-251AA) Part Marking Information

6.73 (.265)

6.35 (.250)

- A -

6.22 (.245)

5.97 (.235)

- B -

3X 0.89 (.035)

0.64 (.025)

0.25 (.010) M A M B

2.28 (.090)

1.14 (.045)

0.76 (.030)

5.46 ( .215)

5.21 ( .205) 1.27 (.050)

0.88 (.035)

2.38 (.094)

2.19 (.086)

1.14 (.045)

0.89 (.035)

0.58 (.023)

0.46 (.018) LEAD ASSIGNMENTS

1 - GATE

2 - DRAIN

3 - SO URCE

4 - DRAIN

NOTES:

1 DI ME NS I O NING & TOLE RA NCING PER ANSI Y14.5M, 1982 .

2 CON TROL L ING DI MENSI ON : I NCH.

3 CONFORMS TO JEDEC OUTLINE TO-252AA.

4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP,

SOLDER DIP MAX. +0.16 (.006).

9.65 (.380)

8.89 (.350)

2.28 (.090)

1.91 (.075)

1.52 (.060)

1.15 (.045)

1 2 3

6.45 ( .245)

5.68 ( .224)

0.58 (.023)

0.46 (.018)

WEEK = 16

DAT E CODE

YEAR = 0

Notes : T his part marking information applies to devices produced before 02/26/2001

EXAMPLE:

LOT CODE 9U1P

THIS IS AN IRFR120

WITH ASSEMBLY

AS S E MB L Y

INTERNATIONAL

RECTIFIER

LOGO

LOT CODE

IRFU120

9U 1P

016

INTERNATIONAL

LOGO

RECTIFIER

LOT CODE

AS S E MB L Y

EXAMPLE:

WIT H AS S E MB L Y

THIS IS AN IRFR120

YE AR 9 = 1999

DAT E CODE

LINE A

WE E K 19

IN THE ASSEMBLY LINE "A"

AS S EMBLED ON WW 19, 1999

LOT CODE 5678

PART NUMBER

Notes : T his part marking information applies to devices produced after 02/26/2001

IRFU120

919A

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Data and specifications subject to change without notice.

This product has been designed and qualified for the Automotive [Q101] market.

Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information. 02/03

Notes:

Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11).

Limited by TJmax, starting TJ = 25°C, L = 0.71mH, RG = 25Ω, IAS = 23A, VGS =10V. Part not recommended for use above

this value.

ISD ≤ 23A, di/dt ≤ 400A/µs, V DD ≤ V(BR)DSS, TJ ≤ 175°C.

Pulse width ≤ 1.0ms; duty cycle ≤ 2%.

Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS .

Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance.

This value determined from sample failure population. 100% tested to this value in production.

 When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer

to application note #AN-994.

D-Pak (TO-252AA) Tape & Reel Information

Dimensions are shown in millimeters (inches)

16.3 ( .641 )

15.7 ( .619 )

8.1 ( .318 )

7.9 ( .312 )

12.1 ( .476 )

11.9 ( .469 ) FEED DIRECTION FEED DIRECTION

16.3 ( .641 )

15.7 ( .619 )

TRR TRL

NOTES :

1. CONTROLLING DIMENSION : MILLIMETER.

2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).

3. OUTLINE CONFORMS TO EIA-481 & EIA-541.

NOTES :

1. OUTLINE CONFORMS TO EIA-481.

16 mm

13 INCH

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Note: For the most current drawings please refer to the IR website at:

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