© Semiconductor Components Industries, LLC, 2016
July, 2016 − Rev. 6
1Publication Order Number:
MC100LVEL33/D
MC100LVEL33
3.3 V ECL ÷4 Divider
Description
The MC100LVEL33 is an integrated ÷4 divider. The LVEL is
functionally equivalent to the EL33 and works from a 3.3 V supply.
The reset pin is asynchronous and is asserted on the rising edge.
Upon power-up, the internal flip-flops will attain a random state; the
reset allows for the synchronization of multiple LVEL33’s in a system.
The VBB pin, an internally generated voltage supply, is available to
this device only. For single-ended input conditions, the unused
differential input is connected to VBB as a switching reference voltage.
VBB may also rebias AC coupled inputs. When used, decouple VBB
and VCC via a 0.01 mF capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, VBB should be left open.
Features
•630 ps Typical Propagation Delay
•4.0 GHz Typical Maximum Frequency
•ESD Protection:
♦> 4 KV Human Body Model
♦> 200 V Machine Model
•The 100 Series Contains Temperature Compensation
•PECL Mode Operating Range: VCC = 3.0 V to 3.8 V
with VEE = 0 V
•NECL Mode Operating Range: VCC= 0 V
with VEE = −3.0 V to −3.8 V
•Internal Input Pulldown Resistors
•Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
•Moisture Sensitivity:
♦Level 1 for SOIC−8
♦Level 3 for TSSOP−8
♦For Additional Information, see Application Note AND8003/D
•Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index: 28 to 34
•Transistor Count = 130 Devices
•These Devices are Pb-Free, Halogen Free and are RoHS Compliant
*For additional marking information, refer to
Application Note AND8002/D.
MARKING DIAGRAMS*
KV33
ALYWG
G
SOIC−8 NB
D SUFFIX
CASE 751−07
1
8
TSSOP−8
DT SUFFIX
CASE 948R−02
1
8
1
8
www.onsemi.com
KVL33
ALYW
G
1
8
(Note: Microdot may be in either location)
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
M= Date Code
G= Pb-Free Package
SOIC−8 TSSOP−8
ORDERING INFORMATION
Device Package Shipping†
MC100LVEL33DG SOIC−8 NB
(Pb-Free)
98 Units / Tube
MC100LVEL33DR2G 2500Tape & Reel
TSSOP−8
(Pb-Free)
MC100LVEL33DTR2G 2500 Tape & Reel
TSSOP−8
(Pb-Free)
MC100LVEL33DTG 100 Units / Tube
†For information on tape and reel specifications, in-
cluding part orientation and tape sizes, please refer
to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
SOIC−8 NB
(Pb-Free)
MC100LVEL33
www.onsemi.com
2
Figure 1. Logic Diagram and Pinout Assignment
4
3
1
2
5
6
7
8
Q
VEE
VCC
QCLK
VBB
R
÷4
Reset
CLK CLK*, CLK** ECL Differential Clock Inputs
Q, Q ECL Differential Data ÷4 Outputs
Reset* ECL Asynch Reset
VBB Reference Voltage Output
VCC Positive Supply
VEE Negative Supply
Table 1. PIN DESCRIPTION
* Pins will default LOW when open due to internal 75 kW
resistor to VEE
** Pins will default to 1/2 VCC when open due to internal
resistors: 75 kW to VEE and 75 kW to VCC
PIN FUNCTION
Table 2. MAXIMUM RATINGS
Symbol Parameter Condition 1 Condition 2 Rating Unit
VCC PECL Mode Power Supply VEE = 0 V 8 to 0 V
VEE NECL Mode Power Supply VCC = 0 V −8 to 0 V
VIPECL Mode Input Voltage
NECL Mode Input Voltage
VEE = 0 V
VCC = 0 V
VI ≤ VCC
VI ≥ VEE
6 to 0
−6 to 0
V
Iout Output Current Continuous
Surge
50
100
mA
IBB VBB Sink/Source ± 0.5 mA
TAOperating Temperature Range −40 to +85 °C
Tstg Storage Temperature Range −65 to +150 °C
qJA Thermal Resistance (Junction-to-Ambient) 0 lfpm
500 lfpm
SOIC−8 NB
SOIC−8 NB
190
130
°C/W
qJC Thermal Resistance (Junction-to-Case) Standard Board SOIC−8 NB 41 to 44 ±5% °C/W
qJA Thermal Resistance (Junction-to-Ambient) 0 lfpm
500 lfpm
TSSOP−8
TSSOP−8
185
140
°C/W
qJC Thermal Resistance (Junction-to-Case) Standard Board TSSOP−841 to 44 ±5% °C/W
Tsol Wave Solder (Pb-Free) < 2 to 3 sec @ 260°C 265 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
MC100LVEL33
www.onsemi.com
3
Table 3. LVPECL DC CHARACTERISTICS (VCC = 3.3 V; VEE = 0.0 V (Note 1))
−40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
IEE Power Supply Current 33 37 33 37 35 39 mA
VOH Output HIGH Voltage (Note 2) 2215 2295 2420 2275 2345 2420 2275 2345 2420 mV
VOL Output LOW Voltage (Note 2)- 1470 1605 1745 1490 1595 1680 1490 1595 1680 mV
VIH Input HIGH Voltage (Single-Ended) 2135 2420 2135 2420 2135 2420 mV
VIL Input LOW Voltage (Single-Ended) 1490 1825 1490 1825 1490 1825 mV
VBB Output Voltage Reference 1.92 2.04 1.92 2.04 1.92 2.04 V
VIHCMR Input HIGH Voltage Common Mode
Range (Differential) (Note 3)
VPP< 500 Mv
VPP ≥ 500 mV
1.2
1.4
2.9
2.9
1.1
1.3
2.9
2.9
1.1
1.3
2.9
2.9
V
IIH Input HIGH Current 150 150 150 mA
IIL Input LOW Current
Other
CLK
0.5
−600
0.5
−600
0.5
−600
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with VCC. VEE can vary ±0.3 V.
2. Outputs are terminated through a 50 W resistor to VCC − 2.0 V.
3. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1 V.
Table 4. LVNECL DC CHARACTERISTICS (VCC = 0.0 V; VEE = −3.3 V (Note 1))
−40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
IEE Power Supply Current 33 37 33 37 35 39 mA
VOH Output HIGH Voltage (Note 2) −1085 −1005 −880 −1025 −955 −880 −1025 −955 −880 mV
VOL Output LOW Voltage (Note 2) −1830 −1695 −1555 −1810 −1705 −1620 −1810 −1705 −1620 mV
VIH Input HIGH Voltage (Single-Ended) −1165 −880 −1165 −880 −1165 −880 mV
VIL Input LOW Voltage (Single-Ended) −1810 −1475 −1810 −1475 −1810 −1475 mV
VBB Output Voltage Reference −1.38 −1.26 −1.38 −1.26 −1.38 −1.26 V
VIHCMR Input HIGH Voltage Common Mode
Range (Differential) (Note 3)
VPP < 500 Mv
VPP ≥ 500 mV
−2.1
−1.9
−0.4
−0.4
−2.2
−2.0
−0.4
−0.4
−2.2
−2.0
−0.4
−0.4
V
IIH Input HIGH Current 150 150 150 mA
IIL Input LOW Current
Other
CLK
0.5
−600
0.5
−600
0.5
−600
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with VCC. VEE can vary ±0.3 V.
2. Outputs are terminated through a 50 W resistor to VCC − 2.0 V.
3. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1 V.
MC100LVEL33
www.onsemi.com
4
Table 5. AC CHARACTERISTICS (VCC = 3.3 V; VEE = 0.0 V or VCC = 0.0 V; VEE = −3.3 V (Note 1))
−40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
fmax Maximum Toggle Frequency 3.4 3.8 4.0 3.8 GHz
tPLH
tPHL
Propagation Delay
CLK to Q (Diff)
CLK to Q (SE)
Reset to Q
530
530
500
630
655
730
780
700
570
570
520
670
695
770
820
720
650
650
580
750
775
850
900
780 ps
tRR Reset Recovery 300 300 300 ps
tskew Duty Cycle Skew (Note 2) 20 20 20 ps
tJITTER Cycle-to-Cycle Jitter 0.5 < 1.0 0.5 < 1.0 0.5 < 1.0 ps
VPP Input Voltage Swing
(Differential Configuration)
150 1000 150 1000 150 1000 mV
tr
tf
Output Rise / Fall Times Q (20%−80%) 120 320 120 320 120 320 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. VEE can vary ±0.3 V.
2. Duty cycle skew is the difference between TPLH and TPHL.
Figure 1. Timing Diagram
CLK
RESET
Q
MC100LVEL33
www.onsemi.com
5
Figure 2. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices)
Driver
Device
Receiver
Device
QD
Q D
Zo = 50 W
Zo = 50 W
50 W50 W
VTT
VTT = VCC − 3.0 V
Resource Reference of Application Notes
AN1405/D −ECL Clock Distribution Techniques
AN1406/D −Designing with PECL (ECL at +5.0 V)
AN1503/D −ECLinPSt I/O SPiCE Modeling Kit
AN1504/D −Metastability and the ECLinPS Family
AN1568/D −Interfacing Between LVDS and ECL
AN1672/D −The ECL Translator Guide
AND8001/D −Odd Number Counters Design
AND8002/D −Marking and Date Codes
AND8020/D −Termination of ECL Logic Devices
AND8066/D −Interfacing with ECLinPS
AND8090/D −AC Characteristics of ECL Devices
MC100LVEL33
www.onsemi.com
6
PACKAGE DIMENSIONS
SOIC−8 NB
D SUFFIX
CASE 751−07
ISSUE AK
SEATING
PLANE
1
4
58
N
J
X 45 _
K
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
BS
D
H
C
0.10 (0.004)
DIM
A
MIN MAX MIN MAX
INCHES
4.80 5.00 0.189 0.197
MILLIMETERS
B3.80 4.00 0.150 0.157
C1.35 1.75 0.053 0.069
D0.33 0.51 0.013 0.020
G1.27 BSC 0.050 BSC
H0.10 0.25 0.004 0.010
J0.19 0.25 0.007 0.010
K0.40 1.27 0.016 0.050
M0 8 0 8
N0.25 0.50 0.010 0.020
S5.80 6.20 0.228 0.244
−X−
−Y−
G
M
Y
M
0.25 (0.010)
−Z−
Y
M
0.25 (0.010) ZSXS
M
____
1.52
0.060
7.0
0.275
0.6
0.024
1.270
0.050
4.0
0.155
ǒmm
inchesǓ
SCALE 6:1
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
MC100LVEL33
www.onsemi.com
7
PACKAGE DIMENSIONS
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A2.90 3.10 0.114 0.122
B2.90 3.10 0.114 0.122
C0.80 1.10 0.031 0.043
D0.05 0.15 0.002 0.006
F0.40 0.70 0.016 0.028
G0.65 BSC 0.026 BSC
L4.90 BSC 0.193 BSC
M0 6 0 6
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH. PROTRUSIONS OR GATE BURRS. MOLD
FLASH OR GATE BURRS SHALL NOT EXCEED
0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL NOT
EXCEED 0.25 (0.010) PER SIDE.
5. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
6. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE -W-.
____
SEATING
PLANE
PIN 1
14
85
DETAIL E
B
C
D
A
G
DETAIL E
F
M
L
2X L/2
−U−
S
U0.15 (0.006) T
S
U0.15 (0.006) T
S
U
M
0.10 (0.004) V S
T
0.10 (0.004)
−T−
−V−
−W−
0.25 (0.010)
8x REFK
IDENT
K0.25 0.40 0.010 0.016
TSSOP−8
DT SUFFIX
CASE 948R−02
ISSUE A
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
MC100LVEL33/D
ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
