EL5144, EL5146, EL5244, EL5246, EL5444 ED END T ME N O MM E C C E R EPLA 1 0 1 R 8 EL 00 EL81 01 EL82 00 EL82 01 EL84 TE OL E OBRSODUCT P 44 EL51 46 EL51 44 EL52 46 EL52 44 100MHz EL54 Single-Supply Amplifiers Data Sheet March 31, 2011 Rail-to-Rail FN7177.2 Features * Rail-to-rail output swing The EL5144 series amplifiers are voltage-feedback, high speed, rail-to-rail amplifiers designed to operate on a single +5V supply. They offer unity gain stability with an unloaded -3dB bandwidth of 100MHz. The input common-mode voltage range extends from the negative rail to within 1.5V of the positive rail. Driving a 75W double terminated coaxial cable, the EL5144 series amplifiers drive to within 150mV of either rail. The 200V/s slew rate and 0.1%/0.1 differential gain/differential phase makes these parts ideal for composite and component video applications. With their voltage feedback architecture, these amplifiers can accept reactive feedback networks, allowing them to be used in analog filtering applications These amplifiers will source 90mA and sink 65mA. The EL5146 and EL5246 have a power-savings disable feature. Applying a standard TTL low logic level to the CE (Chip Enable) pin reduces the supply current to 2.6A within 10ns. Turn-on time is 500ns, allowing true break-before-make conditions for multiplexing applications. Allowing the CE pin to float or applying a high logic level will enable the amplifier. For applications where board space is critical, singles are offered in a 5 Ld SOT-23 package, duals in 8 Ld and 10 Ld MSOP packages, and quads in a 16 Ld QSOP package. Singles, duals, and quads are also available in industry standard pinouts in SO and PDIP packages. All parts operate over the industrial temperature range of -40C to +85C. 1 * -3dB bandwidth = 100MHz * Single-supply +5V operation * Power-down to 2.6A * Large input common-mode range 0V < VCM < 3.5V * Diff gain/phase = 0.1%/0.1 * Low power 35mW per amplifier * Space-saving SOT23-5, 8 Ld MSOP and 10 Ld MSOP, and 16 Ld QSOP packages * Pb-Free available (RoHS compliant) Applications * Video amplifiers * 5V analog signal processing * Multiplexers * Line drivers * Portable computers * High speed communications * Sample and hold amplifiers * Comparators CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2003, 2005, 2007, 2008. All Rights Reserved All other trademarks mentioned are the property of their respective owners. EL5144, EL5146, EL5244, EL5246, EL5444 Ordering Information PART NUMBER PART MARKING PACKAGE PKG. DWG. # EL5144CW J 5 Ld SOT-23** MDP0038 EL5144CW-T7* J 5 Ld SOT-23** MDP0038 EL5144CW-T7A* J 5 Ld SOT-23** MDP0038 EL5144CWZ-T7* (Note) BAHA 5 Ld SOT-23** (Pb-free) MDP0038 EL5144CWZ-T7A* (Note) BAHA 5 Ld SOT-23** (Pb-free) MDP0038 EL5146CN EL5146CN 8 Ld PDIP MDP0031 EL5146CS 5146CS 8 Ld SOIC MDP0027 EL5146CS-T7* 5146CS 8 Ld SOIC MDP0027 EL5146CS-T13* 5146CS 8 Ld SOIC MDP0027 EL5146CSZ (Note) 5146CSZ 8 Ld SOIC (Pb-free) MDP0027 EL5146CSZ-T7* (Note) 5146CSZ 8 Ld SOIC (Pb-free) MDP0027 EL5146CSZ-T13* (Note) 5146CSZ 8 Ld SOIC (Pb-free) MDP0027 EL5244CN EL5244CN 8 Ld PDIP MDP0031 EL5244CS 5244CS 8 Ld SOIC MDP0027 EL5244CS-T7* 5244CS 8 Ld SOIC MDP0027 EL5244CS-T13* 5244CS 8 Ld SOIC MDP0027 EL5244CSZ (Note) 5244CSZ 8 Ld SOIC (Pb-free) MDP0027 EL5244CSZ-T7* (Note) 5244CSZ 8 Ld SOIC (Pb-free) MDP0027 EL5244CSZ-T13* (Note) 5244CSZ 8 Ld SOIC (Pb-free) MDP0027 EL5244CY H 8 Ld MSOP MDP0043 EL5244CY-T13* H 8 Ld MSOP MDP0043 EL5244CYZ (Note) BAVAA 8 Ld MSOP (Pb-free) MDP0043 EL5244CYZ-T7* (Note) BAVAA 8 Ld MSOP (Pb-free) MDP0043 EL5244CYZ-T13* (Note) BAVAA 8 Ld MSOP (Pb-free) MDP0043 EL5246CN EL5246CN 14 Ld PDIP MDP0031 EL5246CS 5246CS 14 Ld SOIC MDP0027 EL5246CS-T7* 5246CS 14 Ld SOIC MDP0027 EL5246CS-T13* 5246CS 14 Ld SOIC MDP0027 EL5246CSZ (Note) 5246CSZ 14 Ld SOIC (Pb-free) MDP0027 EL5246CSZ-T7* (Note) 5246CSZ 14 Ld SOIC (Pb-free) MDP0027 EL5246CSZ-T13* (Note) 5246CSZ 14 Ld SOIC (Pb-free) MDP0027 EL5246CY C 10 Ld MSOP MDP0043 EL5246CY-T13* C 10 Ld MSOP MDP0043 EL5246CYZ (Note) BAWAA 10 Ld MSOP (Pb-free) MDP0043 EL5246CYZ-T7* (Note) BAWAA 10 Ld MSOP (Pb-free) MDP0043 EL5246CYZ-T13* (Note) BAWAA 10 Ld MSOP (Pb-free) MDP0043 EL5444CN EL5444CN 14 Ld PDIP MDP0031 EL5444CS 5444CS 14 Ld SOIC MDP0027 EL5444CS-T7* 5444CS 14 Ld SOIC MDP0027 EL5444CS-T13* 5444CS 14 Ld SOIC MDP0027 2 FN7177.2 March 31, 2011 EL5144, EL5146, EL5244, EL5246, EL5444 Ordering Information (Continued) PART NUMBER PART MARKING PACKAGE PKG. DWG. # EL5444CSZ (Note) 5444CSZ 14 Ld SOIC (Pb-free) MDP0027 EL5444CSZ-T7* (Note) 5444CSZ 14 Ld SOIC (Pb-free) MDP0027 EL5444CSZ-T13* (Note) 5444CSZ 14 Ld SOIC (Pb-free) MDP0027 EL5444CU 5444CU 16 Ld QSOP MDP0040 EL5444CU-T13* 5444CU 16 Ld QSOP MDP0040 EL5444CUZ (Note) 5444CUZ 16 Ld QSOP (Pb-free) MDP0040 EL5444CUZ-T7* (Note) 5444CUZ 16 Ld QSOP (Pb-free) MDP0040 EL5444CUZ-T13* (Note) 5444CUZ 16 Ld QSOP (Pb-free) MDP0040 *Please refer to TB347 for details on reel specifications. **EL5144CW symbol is .Jxxx where xxx represents date NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3 FN7177.2 March 31, 2011 EL5144, EL5146, EL5244, EL5246, EL5444 Pinouts s 5 VS OUT 1 GND 2 NC 1 IN- 2 + EL5244 (8 LD SOIC, PDIP, MSOP) TOP VIEW EL5146 (8 LD SO, PDIP) TOP VIEW EL5144 (5 LD SOT-23) TOP VIEW - 4 IN- IN+ 3 OUTA 1 7 VS INA- 2 8 VS 7 OUTB + + IN+ 3 8 CE 6 OUT INA+ 3 6 INB- 5 NC INB+ 5 INA- 2 13 IND- INA+ 3 12 IND+ 7 OUTB GND 4 11 VS VS 4 11 GND 6 INB- CEB 5 10 NC INB+ 5 10 INC+ 9 OUTB INB- 6 9 INC- 8 OUTC + NC 6 - INB+ 7 8 INB- OUTB 7 - 12 NC + CEA 3 - - 13 OUTA 8 VS EL5444 (16 LD QSOP) TOP VIEW INA- 2 15 IND- INA+ 3 14 IND+ VS 4 13 GND VS 5 12 GND INB+ 6 11 INC+ INB- 7 10 INC- OUTB 8 - - + - 16 OUTD + 1 + 4 OUTA - CEB 4 + + 14 OUTD + GND 3 - NC 2 OUTA 1 - 9 OUTA 14 INA- - + INA+ 1 + CEA 2 10 INA- + INA+ 1 EL5444 (14 LD SOIC, PDIP) TOP VIEW EL5246 (14 LD SOIC, PDIP) TOP VIEW EL5246 (10 LD MSOP) TOP VIEW 5 INB+ + GND 4 + GND 4 9 OUTC FN7177.2 March 31, 2011 EL5144, EL5146, EL5244, EL5246, EL5444 Absolute Maximum Ratings (TA = +25C) Thermal Information Supply Voltage between VS and GND. . . . . . . . . . . . . . . . . . . . .+6V Pin Voltages . . . . . . . . . . . . . . . . . . . . . . . . . GND -0.5V to VS +0.5V Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 50mA Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65C to +150C Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Operating Conditions Operating Temperature . . . . . . . . . . . . . . . . . . . . . . .-40C to +85C CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Specifications PARAMETER VS = +5V, GND = 0V, TA = +25C, CE = +2V, unless otherwise specified. DESCRIPTION CONDITIONS MIN TYP MAX UNIT AC PERFORMANCE dG Differential Gain Error (Note 1) G = 2, RL = 150 to 2.5V, RF = 1k 0.1 % dP Differential Phase Error (Note 1) G = 2, RL = 150 to 2.5V, RF = 1k 0.1 BW Bandwidth -3dB, G = 1, RL = 10k, RF = 0 100 MHz -3dB, G = 1, RL = 150, RF = 0 60 MHz 0.1dB, G = 1, RL = 150 to GND, RF = 0 8 MHz 60 MHz 200 V/s 35 ns BW1 Bandwidth GBWP Gain Bandwidth Product SR Slew Rate G = 1, RL = 150 to GND, RF = 0, VO = 0.5V to 3.5V tS Settling Time to 0.1%, VOUT = 0V to 3V 150 DC PERFORMANCE AVOL VOS Open Loop Voltage Gain Offset Voltage TCVOS Input Offset Voltage Temperature Coefficient IB Input Bias Current RL = no load, VOUT = 0.5V to 3V 54 65 dB RL = 150 to GND, VOUT = 0.5V to 3V 40 50 dB VCM = 1V, SOT23-5 and MSOP packages 25 mV VCM = 1V, All other packages 15 mV 10 VCM = 0V and 3.5V 2 mV/C 100 nA 3.5 V INPUT CHARACTERISTICS CMIR Common Mode Input Range CMRR 47dB 0 CMRR Common Mode Rejection Ratio DC, VCM = 0 to 3.0V 50 60 dB DC, VCM = 0 to 3.5V 47 60 dB RIN Input Resistance 1.5 G CIN Input Capacitance 1.5 pF 4.85 V OUTPUT CHARACTERISTICS VOP VON Positive Output Voltage Swing Negative Output Voltage Swing RL = 150 to 2.5V (Note 2) RL = 150 to GND (Note 2) 4.20 4.65 V RL = 1k to 2.5V (Note 2) 4.95 4.97 V RL = 150 to 2.5V (Note 2) 0.15 RL = 150 to GND (Note 2) 0 RL = 1k to 2.5V (Note 2) 5 4.70 0.03 0.30 V V 0.05 V FN7177.2 March 31, 2011 EL5144, EL5146, EL5244, EL5246, EL5444 Electrical Specifications PARAMETER VS = +5V, GND = 0V, TA = +25C, CE = +2V, unless otherwise specified. (Continued) DESCRIPTION CONDITIONS MIN TYP MAX UNIT +IOUT Positive Output Current RL = 10 to 2.5V 60 90 150 mA -IOUT Negative Output Current RL = 10 to 2.5V -50 -65 -125 mA ENABLE (EL5146 AND EL5246 ONLY) tEN Enable Time EL5146, EL5246 500 ns tDIS Disable Time EL5146, EL5246 10 ns IIHCE CE Pin Input High Current CE = 5V, EL5146, EL5246 0.003 1 mA IILCE CE Pin Input Low Current CE = 0V, EL5146, EL5246 -1.2 -3 mA VIHCE CE Pin Input High Voltage for Power-Up EL5146, EL5246 VILCE CE Pin Input Low Voltage for Power-Down EL5146, EL5246 IsON Supply Current - Enabled (Per Amplifier) No load, VIN = 0V, CE = 5V IsOFF Supply Current - Disabled (Per Amplifier) No load, VIN = 0V, CE = 0V, EL5146 and EL5246 only PSOR Power Supply Operating Range PSRR Power Supply Rejection Ratio 2.0 V 0.8 V 7 8.8 mA 2.6 5 mA 4.75 5.0 5.25 V 50 60 SUPPLY DC, VS = 4.75V to 5.25V dB NOTES: 1. Standard NTSC test, AC signal amplitude = 286mVP-P, f = 3.8MHz, VOUT is swept from 0.8V to 3.4V, RL is DC-coupled. 2. RL is total load resistance due to feedback resistor and load resistor. Typical Performance Curves AV = 1, RF = 0 0 AV = 1, RF = 0 0 AV = 2, RF = 1k -2 -4 -45 PHASE () NORMALIZED MAGNITUDE (dB) 2 AV = 5.6, RF = 1k AV = 5.6, RF = 1k -90 AV = 2, RF = 1k -135 -6 -8 1M VCM = 1.5V RL = 150 -180 10M 100M FREQUENCY (Hz) FIGURE 1. NON-INVERTING FREQUENCY RESPONSE (GAIN) 6 1M VCM = 1.5V RL = 150 10M 100M FREQUENCY (Hz) FIGURE 2. NON-INVERTING FREQUENCY RESPONSE (PHASE) FN7177.2 March 31, 2011 EL5144, EL5146, EL5244, EL5246, EL5444 Typical Performance Curves 180 AV = -1 AV = -1 0 135 AV = -2 -2 PHASE () NORMALIZED MAGNITUDE (dB) 2 AV = -5.6 -4 AV = -2 90 AV = -5.6 45 -6 -8 1M VCM = 1.5V RF = 1k RL = 150 0 10M VCM = 1.5V RF = 1k RL = 150 1M 100M 10M FIGURE 3. INVERTING FREQUENCY RESPONSE (GAIN) 150 RL = 150 80 AV = 1, RF = 0 60 40 AV = 2, RF = 1k 20 0 -55 FIGURE 4. INVERTING FREQUENCY RESPONSE (PHASE) 3dB BANDWIDTH (MHz) 3dB BANDWIDTH (MHz) 100 AV = 5.6, RF = 1k -15 25 65 105 60 AV = 2, RF = 1k 30 0 RL = 520 -2 RL= 150 -4 1M 10M 100M FREQUENCY (Hz) FIGURE 7. FREQUENCY RESPONSE FOR VARIOUS RL 7 -15 25 65 105 145 FIGURE 6. 3dB BANDWIDTH VS DIE TEMPERATURE FOR VARIOUS GAINS NORMALIZED MAGNITUDE (dB) NORMALIZED MAGNITUDE (dB) RL = 10k 2 AV = 5.6, RF = 1k DIE TEMPERATURE (C) FIGURE 5. 3dB BANDWIDTH vs DIE TEMPERATURE FOR VARIOUS GAINS VCM = 1.5V RF = 0 AV = 1 AV = 1, RF = 0 90 0 -55 145 RL = 10k 120 DIE TEMPERATURE (C) 4 100M FREQUENCY (Hz) FREQUENCY (Hz) 8 4 VCM = 1.5V RL = 150 AV = 1 CL=100pF CL= 47pF 0 CL = 22pF -4 CL = 0pF -8 1M 10M 100M FREQUENCY (Hz) FIGURE 8. FREQUENCY RESPONSE FOR VARIOUS CL FN7177.2 March 31, 2011 EL5144, EL5146, EL5244, EL5246, EL5444 10 RF = RG = 2k 2 RF = RG = 1k GROUP DELAY (ns) NORMALIZED MAGNITUDE (dB) Typical Performance Curves 0 -2 RF = RG = 560 -4 VCM = 1.5V RL = 150 AV = 2 -6 1M 10M 8 AV = 2 RF = 1k 6 4 AV = 1 RF = 1 2 0 1M 100M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) FIGURE 9. FREQUENCY RESPONSE FOR VARIOUS RF AND RG FIGURE 10. GROUP DELAY vs FREQUENCY 0 80 RL = 1k PHASE 45 90 40 RL = 150 135 GAIN 20 PHASE () GAIN (dB) 60 180 OPEN LOOP GAIN (dB) 80 70 NO LOAD 60 50 RL = 150 40 0 1k 10k 100k 1M 10M 225 100M 30 -55 -15 FREQUENCY (Hz) FIGURE 11. OPEN LOOP GAIN AND PHASE vs FREQUENCY 65 105 145 FIGURE 12. OPEN LOOP VOLTAGE GAIN vs DIE TEMPERATURE 10k 200 CLOSED LOOP (ZO) VOLTAGE NOISE (nV/Hz) 25 DIE TEMPERATURE (C) 1k 100 RF = 0 AV = 2 20 2 0.2 10 10 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) FIGURE 13. VOLTAGE NOISE vs FREQUENCY - VIDEO AMP 8 10k 100k 1M 10M 100M FREQUENCY (Hz) FIGURE 14. CLOSED LOOP OUTPUT IMPEDANCE vs FREQUENCY FN7177.2 March 31, 2011 EL5144, EL5146, EL5244, EL5246, EL5444 Typical Performance Curves PSRR, CMRR (dB) OFFSET VOLTAGE (mV) 20 12 6 0 -6 0 CMRR -20 PSRR-40 PSRR+ -60 -12 -55 -15 25 65 105 -80 1k 145 10k DIE TEMPERATURE (C) RL = 500 TO 2.5V 3 2 RL = 150 TO 2.5V 1 0 1M 10M 100M 5 4 OUTPUT VOLTAGE (V) VS = 5V RL = 150 TO 0V RF = 1k AV = 2 2 1 0 TIME (20ns/div) FIGURE 19. LARGE SIGNAL PULSE RESPONSE (SINGLE SUPPLY) 9 RF = 1k AV = 2 2 RL = 500 TO 2.5V 1 RL = 150 TO 2.5V 0 1M 10M 100M FREQUENCY (Hz) FIGURE 18. OUTPUT VOLTAGE SWING vs FREQUENCY FOR THD < 0.1% 1.9 OUTPUT VOLTAGE (V) FIGURE 17. OUTPUT VOLTAGE SWING vs FREQUENCY FOR THD < 1% 3 100M 3 FREQUENCY (Hz) 4 10M FIGURE 16. PSRR AND CMRR vs FREQUENCY OUTPUT VOLTAGE SWING (VP-P) OUTPUT VOLTAGE SWING (VP-P) RF = 1k AV = 2 4 1M FREQUENCY (Hz) FIGURE 15. OFFSET VOLTAGE vs DIE TEMPERATURE (6 TYPICAL SAMPLES) 5 100k 1.7 VS = 5V RL = 150 TO 0V RF = 1k AV = 2 1.5 1.3 1.1 TIME (20ns/div) FIGURE 20. SMALL SIGNAL PULSE RESPONSE (SINGLE SUPPLY) FN7177.2 March 31, 2011 EL5144, EL5146, EL5244, EL5246, EL5444 Typical Performance Curves VS = 2.5V RL = 150 TO 0V RF = 1k AV = 2 2 0 -2 -4 100 0 -0.2 40 20 0.1 TIME (20ns/div) FIGURE 22. SMALL SIGNAL PULSE RESPONSE (SPLIT SUPPLY) SLEW RATE (V/s) 60 0 0.01 0.2 250 RL = 1k RF = 500 AV = -1 VSTEP = 3V 80 VS = 2.5V RL = 150 TO 0V RF = 1k AV = 2 -0.4 TIME (20ns/div) FIGURE 21. LARGE SIGNAL PULSE RESPONSE (SPLIT SUPPLIES) SETTLING TIME (ns) 0.4 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 4 200 150 -55 1 -15 SETTLING ACCURACY (%) RF = 0 AV = 1 0.04 RL = 10k 0 -0.04 RL = 150 -0.08 0.25 1.75 3.25 VOUT (V) FIGURE 25. DIFFERENTIAL GAIN FOR RL TIED TO 0V 10 65 105 145 FIGURE 24. SLEW RATE vs DIE TEMPERATURE DIFFERENTIAL PHASE () DIFFERENTIAL GAIN (%) FIGURE 23. SETTLING TIME vs SETTLING ACCURACY 0.08 25 DIE TEMPERATURE (C) 0.2 RF = 0 AV = 1 0.1 0 RL = 10k RL = 150 -0.1 -0.2 0.25 1.75 3.25 VOUT (V) FIGURE 26. DIFFERENTIAL PHASE FOR RL TIED TO 0V FN7177.2 March 31, 2011 EL5144, EL5146, EL5244, EL5246, EL5444 0.2 R F = 0 AV = 1 DIFFERENTIAL PHASE () DIFFERENTIAL GAIN (%) Typical Performance Curves 0.1 0 -0.1 RL = 10k RL = 150 -0.2 0.5 3.5 2.0 RF = 0 AV = 1 0.2 0.1 RL = 10k 0 -0.1 RL = 150 -0.2 0.5 VOUT (V) RF = 1k AV = 2 RL=150 0.1 0 RL=10k -0.1 -0.2 0.5 FIGURE 28. DIFFERENTIAL PHASE FOR RL TIED TO 2.5V DIFFERENTIAL PHASE () DIFFERENTIAL GAIN (%) FIGURE 27. DIFFERENTIAL GAIN FOR RL TIED TO 2.5V 0.2 3.5 2.0 0.2 RF = 1k AV = 2 0 RL = 10k -0.1 -0.2 0.5 2.0 RL = 150 0 RL = 10k -0.2 0.5 2.0 3.5 VOUT (V) FIGURE 31. DIFFERENTIAL GAIN FOR RL TIED TO 2.5V 11 FIGURE 30. DIFFERENTIAL PHASE FOR RL TIED TO 0V DIFFERENTIAL PHASE () DIFFERENTIAL GAIN (%) RF = 1k AV = 2 -0.1 3.5 VOUT (V) FIGURE 29. DIFFERENTIAL GAIN FOR RL TIED TO 0V 0.1 RL = 150 0.1 VOUT (V) 0.2 3.5 2.0 VOUT (V) 0.2 0.1 RF = 1k AV = 2 RL = 10k 0 -0.1 RL = 150 -0.2 0.5 2.0 3.5 VOUT (V) FIGURE 32. DIFFERENTIAL PHASE FOR RL TIED TO 2.5V FN7177.2 March 31, 2011 EL5144, EL5146, EL5244, EL5246, EL5444 Typical Performance Curves -25 -35 DISTORTION (dBc) DISTORTION (dBc) -25 HD3 -45 HD2 -55 -65 -75 1M VOUT = 0.25V TO 2.25V RL = 100 TO 0V 10M HD3 -35 -45 HD2 -55 -65 VOUT = 0.5V TO 2.5V RL = 100 TO 0V -75 1M 100M 10M FIGURE 33. 2nd AND 3rd HARMONIC DISTORTION vs FREQUENCY FIGURE 34. 2nd AND 3rd HARMONIC DISTORTION vs FREQUENCY 0 HD3 -35 CROSSTALK (dB) DISTORTION (dBc) -25 -45 HD2 -55 -65 VOUT =V1V TO =1V 3Vto OUT RL = 100 3V TO 0V -75 1M 10M -20 -40 -60 -80 -100 100k 100M 1M 10M FIGURE 35. 2nd AND 3rd HARMONIC DISTORTION vs FREQUENCY FIGURE 36. CHANNEL-TO-CHANNEL CROSSTALK - DUALS AND QUADS (WORST CHANNEL) 120 OUTPUT CURRENT (mA) 8 6 4 2 0 0 1 2 3 4 5 SUPPLY VOLTAGE (V) FIGURE 37. SUPPLY CURRENT (PER AMP) vs SUPPLY VOLTAGE 12 100M FREQUENCY (Hz) FREQUENCY (Hz) SUPPLY CURRENT (mA) 100M FREQUENCY (Hz) FREQUENCY (Hz) RL = 10 TO 2.5V 100 80 60 SINK 40 20 -55 -15 25 65 105 145 DIE TEMPERATURE (C) FIGURE 38. OUTPUT CURRENT VS DIE TEMPERATURE FN7177.2 March 31, 2011 EL5144, EL5146, EL5244, EL5246, EL5444 Typical Performance Curves 5 SUPPLY CURRENT (A) SUPPLY CURRENT (mA) 9 8 7 6 5 4 -55 -15 25 65 105 4 3 2 1 0 -55 145 DIE TEMPERATURE (C) 4.7 RL = 150 TO 0V 4.6 25 65 105 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 4.8 0.4 0.3 0.2 0 -55 145 RL = 150 TO 0V -15 25 65 105 145 DIE TEMPERATURE (C) FIGURE 41. POSITIVE OUTPUT VOLTAGE SWING vs DIE TEMPERATURE FIGURE 42. NEGATIVE OUTPUT VOLTAGE SWING vs DIE TEMPERATURE -20 300 EFFECTIVE RLOAD 100 = 150 EFFECTIVE RLOAD = MAGNITUDE (dBc) OUTPUT VOLTAGE (V) RL = 150 TO 2.5V 0.1 DIE TEMPERATURE (C) 1k 10 = 5k EFFECTIVE RLOAD 1 -55 145 0.5 RL = 150 TO 2.5V -15 105 FIGURE 40. SUPPLY CURRENT - OFF (PER AMP) vs DIE TEMPERATURE RL=150 4.9 4.5 -55 65 25 DIE TEMPERATURE (C) FIGURE 39. SUPPLY CURRENT - ON (PER AMP) vs DIE TEMPERATURE 5.0 -15 EFFECTIVE RLOAD = RL//RF TO VS/2 -15 25 65 105 145 DIE TEMPERATURE (C) FIGURE 43. OUTPUT VOLTAGE FROM EITHER RAIL vs DIE TEMPERATURE FOR VARIOUS EFFECTIVE RLOAD 13 -40 EL5146CS AND EL5146CN -60 EL5246CS -80 EL5246CN -100 -120 10k 100k 1M 10M 100M FREQUENCY (Hz) FIGURE 44. OFF ISOLATION - EL5146 AND EL5246 FN7177.2 March 31, 2011 EL5144, EL5146, EL5244, EL5246, EL5444 Typical Performance Curves 2.5 POWER DISSIPATION (W) POWER DISSIPATION (W) 2.0 PDIP, JA = 110C/W SOIC, JA = 161C/W 1.6 1.2 0.8 0.4 SOT23-5, JA = 256C/W 0 -50 -20 10 40 70 AMBIENT TEMPERATURE (C) PDIP-14, JA = 87C/W 2.0 PDIP-8, JA = 107C/W SOIC-14, JA = 120C/W 1.5 1.0 0.5 SOIC-8, JA = 159C/W MSOP-8,10, JA = 206C/W 0 -50 100 FIGURE 45. MAXIMUM POWER DISSIPATION vs AMBIENT TEMPERATURE SINGLES (TJMAX = +150C) -20 10 40 70 AMBIENT TEMPERATURE (C) 100 FIGURE 46. MAXIMUM POWER DISSIPATION vs AMBIENT TEMPERATURE DUALS (TJMAX = +150C) POWER DISSIPATION (W) 2.5 2.0 PDIP-14, JA = 83C/W 1.5 1.0 0.5 SOIC-14, JA = 118C/W QSOP-16, JA = 158C/W 0 -50 -20 10 40 70 AMBIENT TEMPERATURE (C) 100 FIGURE 47. MAXIMUM POWER DISSIPATION vs AMBIENT TEMPERATURE QUADS (TJMAX = +150C) 14 FN7177.2 March 31, 2011 EL5144, EL5146, EL5244, EL5246, EL5444 Pin Descriptions EL5246 EL5246 EL5444 EL5444 EL5244 EL5144 EL5146 16 Ld 14 Ld 14 Ld 10 Ld 8 Ld SO/ 8 Ld 5 Ld SOT23 SO/PDIP PDIP/MSOP MSOP SO/PDIP SO/PDIP QSOP NAME FUNCTION 5 7 8 8 11 4 4, 5 VS 2 4 4 3 4 11 12, 13 GND Ground or Negative Power Supply 3 3 IN+ Non-inverting Input EQUIVALENT CIRCUIT Positive Power Supply VS Circuit 1 4 2 IN- 1 6 OUT Inverting Input GND (Reference Circuit 1) Amplifier Output VS GND Circuit 2 3 1 1 3 3 INA+ Amplifier A Non-inverting Input (Reference Circuit 1) 2 10 14 2 2 INA- Amplifier A Inverting Input (Reference Circuit 1) 1 9 13 1 1 OUTA Amplifier A Output (Reference Circuit 2) 5 5 7 5 6 INB+ Amplifier B Non-inverting Input (Reference Circuit 1) 6 6 8 6 7 INB- Amplifier B Inverting Input (Reference Circuit 1) 7 7 9 7 8 OUTB Amplifier B Output (Reference Circuit 2) 10 11 INC+ Amplifier C Non-inverting Input (Reference Circuit 1) 9 10 INC- Amplifier C Inverting Input (Reference Circuit 1) 8 9 OUTC Amplifier C Output (Reference Circuit 2) 12 14 IND+ Amplifier D Non-inverting Input (Reference Circuit 1) 13 15 IND- Amplifier D Inverting Input (Reference Circuit 1) 14 16 8 OUTD Amplifier D Output CE Enable (Enabled when high) (Reference Circuit 2) f VS + - 1.4V GND Circuit 3 15 FN7177.2 March 31, 2011 EL5144, EL5146, EL5244, EL5246, EL5444 Pin Descriptions (Continued) EL5246 EL5246 EL5444 EL5444 EL5244 EL5144 EL5146 16 Ld 14 Ld 14 Ld 10 Ld 8 Ld SO/ 8 Ld 5 Ld SOT23 SO/PDIP PDIP/MSOP MSOP SO/PDIP SO/PDIP QSOP NAME 1, 5 FUNCTION EQUIVALENT CIRCUIT 2 3 CEA Enable Amplifier A (Enabled when high) (Reference Circuit 3) 4 5 CEB Enable Amplifier B (Enabled when high) (Reference Circuit 3) 2, 6, 10, 12 NC Description of Operation and Applications Information Product Description The EL5144 series is a family of wide bandwidth, single supply, low power, rail-to-rail output, voltage feedback operational amplifiers. The family includes single, dual, and quad configurations. The singles and duals are available with a power-down pin to reduce power to 2.6A typically. All the amplifiers are internally compensated for closed loop feedback gains of +1 or greater. Larger gains are acceptable but bandwidth will be reduced according to the familiar Gain Bandwidth Product. Connected in voltage follower mode and driving a high impedance load, the EL5144 series has a -3dB bandwidth of 100MHz. Driving a 150 load, they have a -3dB bandwidth of 60MHz while maintaining a 200V/s slew rate. The input common mode voltage range includes ground while the output can swing rail-to-rail. Power Supply Bypassing and Printed Circuit Board Layout As with any high-frequency device, good printed circuit board layout is necessary for optimum performance. Ground plane construction is highly recommended. Lead lengths should be as short as possible. The power supply pin must be well bypassed to reduce the risk of oscillation For normal single supply operation, where the GND pin is connected to the ground plane, a single 4.7F tantalum capacitor in parallel with a 0.1F ceramic capacitor from VS to GND will suffice. This same capacitor combination should be placed at each supply pin to ground if split supplies are to be used. In this case, the GND pin becomes the negative supply rail. For good AC performance, parasitic capacitance should be kept to a minimum. Use of wire wound resistors should be avoided because of their additional series inductance. Use of sockets, particularly for the SO package, should be avoided if possible. Sockets add parasitic inductance and capacitance that can result in compromised performance. No Connect. Not internally connected. Input, Output and Supply Voltage Range The EL5144 series has been designed to operate with a single supply voltage of 5V. Split supplies can be used so long as their total range is 5V. The amplifiers have an input common mode voltage range that includes the negative supply (GND pin) and extends to within 1.5V of the positive supply (VS pin). They are specified over this range. The output of the EL5144 series amplifiers can swing rail to rail. As the load resistance becomes lower in value, the ability to drive close to each rail is reduced. However, even with an effective 150 load resistor connected to a voltage halfway between the supply rails, the output will swing to within 150mV of either rail. Figure 48 shows the output of the EL5144 series amplifier swinging rail to rail with RF = 1k, AV = +2 and RL = 1M. Figure 49 is with RL = 150. 5V 0V FIGURE 48. 5V 0V FIGURE 49. 16 FN7177.2 March 31, 2011 EL5144, EL5146, EL5244, EL5246, EL5444 Choice of Feedback Resistor, RF These amplifiers are optimized for applications that require a gain of +1. Hence, no feedback resistor is required. However, for gains greater than +1, the feedback resistor forms a pole with the input capacitance. As this pole becomes larger, phase margin is reduced. This causes ringing in the time domain and peaking in the frequency domain. Therefore, RF has some maximum value that should not be exceeded for optimum performance. If a large value of RF must be used, a small capacitor in the few picofarad range in parallel with RF can help to reduce this ringing and peaking at the expense of reducing the bandwidth. As far as the output stage of the amplifier is concerned, RF + RG appear in parallel with RL for gains other than +1. As this combination gets smaller, the bandwidth falls off. Consequently, RF also has a minimum value that should not be exceeded for optimum performance. For AV = +1, RF = 0 is optimum. For AV = -1 or +2 (noise gain of 2), optimum response is obtained with RF between 300 and 1k. For AV = -4 or +5 (noise gain of 5), keep RF between 300 and 15k. Video Performance For good video signal integrity, an amplifier is required to maintain the same output impedance and the same frequency response as DC levels are changed at the output. This can be difficult when driving a standard video load of 150, because of the change in output current with DC level. A look at Figures 25 through 32 beginning on page 10 (Differential Gain and Differential Phase curves for various supply and loading conditions) will help you obtain optimal performance. Curves are provided for AV = +1 and +2, and RL = 150 and 10k tied both to ground as well as 2.5V. As with all video amplifiers, there is a common mode sweet spot for optimum differential gain/differential phase. For example, with AV = +2 and RL = 150 tied to 2.5V, and the output common mode voltage kept between 0.8V and 3.2V, dG/dP is a very low 0.1%/0.1. This condition corresponds to driving an AC-coupled, double terminated 75 coaxial cable. With AV = +1, RL = 150 tied to ground, and the video level kept between 0.85V and 2.95V, these amplifiers provide dG/dP performance of 0.05%/0.20. This condition is representative of using the EL5144 series amplifier as a buffer driving a DC coupled, double terminated, 75 coaxial cable. Driving high impedance loads, such as signals on computer video cards, gives similar or better dG/dP performance as driving cables. Driving Cables and Capacitive Loads The EL5144 series amplifiers can drive 50pF loads in parallel with 150 with 4dB of peaking and 100pF with 7dB of peaking. If less peaking is desired in these applications, a small series resistor (usually between 5 and 50) can be placed in series with the output to eliminate most peaking. 17 However, this will obviously reduce the gain slightly. If your gain is greater than 1, the gain resistor (RG) can then be chosen to make up for any gain loss, which may be created by this additional resistor at the output. Another method of reducing peaking is to add a "snubber" circuit at the output. A snubber is a resistor in a series with a capacitor, 150 and 100pF being typical values. The advantage of a snubber is that it does not draw DC load current. When used as a cable driver, double termination is always recommended for reflection-free performance. For those applications, the back-termination series resistor will de-couple the EL5144 series amplifier from the cable and allow extensive capacitive drive. However, other applications may have high capacitive loads without a back-termination resistor. Again, a small series resistor at the output can reduce peaking. Disable/Power-Down The EL5146 and EL5246 amplifiers can be disabled, placing its output in a high-impedance state. Turn-off time is only 10ns and turn-on time is around 500ns. When disabled, the amplifier's supply current is reduced to 2.6A typically, thereby effectively eliminating power consumption. The amplifier's power-down can be controlled by standard TTL or CMOS signal levels at the CE pin. The applied logic signal is relative to the GND pin. Letting the CE pin float will enable the amplifier. Hence, the 8 Ld PDIP and 8 Ld SOIC single amps are pin compatible with standard amplifiers that don't have a power-down feature. Short Circuit Current Limit The EL5144 series amplifiers do not have internal short circuit protection circuitry. Short circuit current of 90mA sourcing and 65mA sinking typically will flow if the output is trying to drive high or low but is shorted to half way between the rails. If an output is shorted indefinitely, the power dissipation could easily increase such that the part will be destroyed. Maximum reliability is maintained if the output current never exceeds 50mA. This limit is set by internal metal interconnect limitations. Obviously, short circuit conditions must not remain or the internal metal connections will be destroyed. Power Dissipation With the high output drive capability of the EL5144 series amplifiers, it is possible to exceed the +150C Absolute Maximum junction temperature under certain load current conditions. Therefore, it is important to calculate the maximum junction temperature for the application to determine if load conditions or package type need to be modified for the amplifier to remain in the safe operating area. The maximum power dissipation allowed in a package is determined according to Equation 1: T JMAX - T AMAX PD MAX = -------------------------------------------- JA (EQ. 1) FN7177.2 March 31, 2011 EL5144, EL5146, EL5244, EL5246, EL5444 EL5144 Series Comparator Application where: TJMAX = Maximum junction temperature TAMAX = Maximum ambient temperature JA = Thermal resistance of the package PDMAX = Maximum power dissipation in the package The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power in the IC due to the load, or as expressed in Equation 2: V OUT PD MAX = N x V S x I SMAX + ( V S - V OUT ) x ---------------RL The EL5144 series amplifier can be used as a very fast, single supply comparator. Most op amps used as a comparator allow only slow speed operation because of output saturation issues. The EL5144 series amplifier doesn't suffer from output saturation issues. Figure 50 shows the amplifier implemented as a comparator. Figure 51 is a graph of propagation delay vs overdrive as a square wave is presented at the input of the comparator. 1 8 0.1F EL5146 (EQ. 2) VIN +2.5V + - 2 3 where: 7 + 5 RL FIGURE 50. EL5146 AMPLIFIER IMPLEMENTED AS A COMPARATOR VS = Total supply voltage ISMAX = Maximum supply current per amplifier RL = Load resistance tied to ground If we set the two PDMAX equations equal to each other, we can solve for RL using Equation 3: V OUT x ( V S - V OUT ) R L = --------------------------------------------------------------------------------------------- T JMAX - T AMAX --------------------------------------------- - ( V S x I SMAX ) N x JA (EQ. 3) Assuming worst case conditions of TA = +85C, VOUT = VS/2V, VS = 5.5V, and ISMAX = 8.8mA per amplifier, following is a table of all packages and the minimum RL allowed. PART PACKAGE MINIMUM RL EL5144CW SOT23-5 37 EL5146CS SOIC-8 21 EL5146CN PDIP-8 14 EL5244CS SOIC-8 48 EL5244CN PDIP-8 30 EL5244CY MSOP-8 69 EL5246CY MSOP-10 69 EL5246CS SOIC-14 34 EL5246CN PDIP-14 23 EL5444CU QSOP-16 139 EL5444CS SOIC-14 85 EL5444CN PDIP-14 51 PROPAGATION DELAY (ns) 1000 VOUT = Maximum output voltage of the application 18 VOUT 6 4 N = Number of amplifiers in the package +5V NEGATIVE GOING SIGNAL 100 POSITIVE GOING SIGNAL 10 0.01 0.1 OVERDRIVE (V) 1.0 FIGURE 51. PROPAGATION DELAY vs OVERDRIVE FOR AMPLIFIER USED AS A COMPARATOR Multiplexing with the EL5144 Series Amplifier Besides normal power-down usage, the CE pin on the EL5146 and EL5246 series amplifiers also allow for multiplexing applications. Figure 52 shows an EL5246 with its outputs tied together, driving a back terminated 75 video load. A 3VP-P 10MHz sine wave is applied at Amp A input, and a 2.4VP-P 5MHz square wave to Amp B. Figure 53 shows the SELECT signal that is applied, and the resulting output waveform at VOUT. Observe the break-before-make operation of the multiplexing. Amp A is on and VIN1 is being passed through to the output of the amplifier. Then Amp A turns off in about 10ns. The output decays to ground with an RLCL time constants. 500ns later, Amp B turns on and VIN2 is passed through to the output. This break-before-make operation ensures that more than one amplifier isn't trying to drive the bus at the same time. Notice the outputs are tied directly together. Isolation resistors at each output are not necessary. FN7177.2 March 31, 2011 EL5144, EL5146, EL5244, EL5246, EL5444 VIN 1 3VPP 1 2 14 + 5V VOUT 13 3 +5V 4 11 5 10 Sele 6 VIN 2 2.4VPP VOUT 12 EL5246 + - 4.7 0V 5V 9 7 0.1 Selec 150 8 0V FIGURE 52. FIGURE 53. 470K 1 5 470K 0.1 + 2 5V +5V 3 VOUT ROS 4 470K COS 0V FIGURE 54. FIGURE 55. 5V 0V FIGURE 56. Free Running Oscillator Application Figure 54 is an EL5144 configured as a free running oscillator. To first order, ROSC and COSC determine the frequency of oscillation according to: 0.72 F OSC = --------------------------------------R OSC x C OSC (EQ. 4) For rail to rail output swings, maximum frequency of oscillation is around 15MHz. If reduced output swings are acceptable, 25MHz can be achieved. Figure 55 shows the oscillator for ROSC = 510, COSC = 240pF and FOSC = 6MHz. 19 FN7177.2 March 31, 2011 EL5144, EL5146, EL5244, EL5246, EL5444 SOT-23 Package Family MDP0038 e1 D SOT-23 PACKAGE FAMILY A 6 N 4 E1 2 E 3 0.15 C D 1 2X 2 3 0.20 C 5 2X e 0.20 M C A-B D B b NX 0.15 C A-B 1 SOT23-5 SOT23-6 TOLERANCE A 1.45 1.45 MAX A1 0.10 0.10 0.05 A2 1.14 1.14 0.15 b 0.40 0.40 0.05 c 0.14 0.14 0.06 D 2.90 2.90 Basic E 2.80 2.80 Basic E1 1.60 1.60 Basic e 0.95 0.95 Basic e1 1.90 1.90 Basic L 0.45 0.45 0.10 L1 0.60 0.60 Reference N 5 6 Reference Rev. E 3/00 3 NOTES: D 2X SYMBOL 1. Plastic or metal protrusions of 0.25mm maximum per side are not included. C A2 SEATING PLANE 3. This dimension is measured at Datum Plane "H". A1 0.10 C 2. Plastic interlead protrusions of 0.25mm maximum per side are not included. 4. Dimensioning and tolerancing per ASME Y14.5M-1994. 5. Index area - Pin #1 I.D. will be located within the indicated zone (SOT23-6 only). NX 6. SOT23-5 version has no center lead (shown as a dashed line). (L1) H A GAUGE PLANE c L 20 0.25 0 +3 -0 FN7177.2 March 31, 2011 EL5144, EL5146, EL5244, EL5246, EL5444 Small Outline Package Family (SO) A D h X 45 (N/2)+1 N A PIN #1 I.D. MARK E1 E c SEE DETAIL "X" 1 (N/2) B L1 0.010 M C A B e H C A2 GAUGE PLANE SEATING PLANE A1 0.004 C 0.010 M C A B L b 0.010 4 4 DETAIL X MDP0027 SMALL OUTLINE PACKAGE FAMILY (SO) INCHES SYMBOL SO-14 SO16 (0.300") (SOL-16) SO20 (SOL-20) SO24 (SOL-24) SO28 (SOL-28) TOLERANCE NOTES A 0.068 0.068 0.068 0.104 0.104 0.104 0.104 MAX - A1 0.006 0.006 0.006 0.007 0.007 0.007 0.007 0.003 - A2 0.057 0.057 0.057 0.092 0.092 0.092 0.092 0.002 - b 0.017 0.017 0.017 0.017 0.017 0.017 0.017 0.003 - c 0.009 0.009 0.009 0.011 0.011 0.011 0.011 0.001 - D 0.193 0.341 0.390 0.406 0.504 0.606 0.704 0.004 1, 3 E 0.236 0.236 0.236 0.406 0.406 0.406 0.406 0.008 - E1 0.154 0.154 0.154 0.295 0.295 0.295 0.295 0.004 2, 3 e 0.050 0.050 0.050 0.050 0.050 0.050 0.050 Basic - L 0.025 0.025 0.025 0.030 0.030 0.030 0.030 0.009 - L1 0.041 0.041 0.041 0.056 0.056 0.056 0.056 Basic - h 0.013 0.013 0.013 0.020 0.020 0.020 0.020 Reference - 16 20 24 28 Reference - N SO-8 SO16 (0.150") 8 14 16 Rev. M 2/07 NOTES: 1. Plastic or metal protrusions of 0.006" maximum per side are not included. 2. Plastic interlead protrusions of 0.010" maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994 21 FN7177.2 March 31, 2011 EL5144, EL5146, EL5244, EL5246, EL5444 Plastic Dual-In-Line Packages (PDIP) E D A2 SEATING PLANE L N A PIN #1 INDEX E1 c e b A1 NOTE 5 1 eA eB 2 N/2 b2 MDP0031 PLASTIC DUAL-IN-LINE PACKAGE INCHES SYMBOL PDIP8 PDIP14 PDIP16 PDIP18 PDIP20 TOLERANCE A 0.210 0.210 0.210 0.210 0.210 MAX A1 0.015 0.015 0.015 0.015 0.015 MIN A2 0.130 0.130 0.130 0.130 0.130 0.005 b 0.018 0.018 0.018 0.018 0.018 0.002 b2 0.060 0.060 0.060 0.060 0.060 +0.010/-0.015 c 0.010 0.010 0.010 0.010 0.010 +0.004/-0.002 D 0.375 0.750 0.750 0.890 1.020 0.010 E 0.310 0.310 0.310 0.310 0.310 +0.015/-0.010 E1 0.250 0.250 0.250 0.250 0.250 0.005 e 0.100 0.100 0.100 0.100 0.100 Basic eA 0.300 0.300 0.300 0.300 0.300 Basic eB 0.345 0.345 0.345 0.345 0.345 0.025 L 0.125 0.125 0.125 0.125 0.125 0.010 N 8 14 16 18 20 Reference NOTES 1 2 Rev. C 2/07 NOTES: 1. Plastic or metal protrusions of 0.010" maximum per side are not included. 2. Plastic interlead protrusions of 0.010" maximum per side are not included. 3. Dimensions E and eA are measured with the leads constrained perpendicular to the seating plane. 4. Dimension eB is measured with the lead tips unconstrained. 5. 8 and 16 lead packages have half end-leads as shown. 22 FN7177.2 March 31, 2011 EL5144, EL5146, EL5244, EL5246, EL5444 Mini SO Package Family (MSOP) 0.25 M C A B D MINI SO PACKAGE FAMILY (N/2)+1 N E MDP0043 A E1 MILLIMETERS PIN #1 I.D. 1 B (N/2) e H C SEATING PLANE 0.10 C N LEADS 0.08 M C A B b SYMBOL MSOP8 MSOP10 TOLERANCE NOTES A 1.10 1.10 Max. - A1 0.10 0.10 0.05 - A2 0.86 0.86 0.09 - b 0.33 0.23 +0.07/-0.08 - c 0.18 0.18 0.05 - D 3.00 3.00 0.10 1, 3 E 4.90 4.90 0.15 - E1 3.00 3.00 0.10 2, 3 e 0.65 0.50 Basic - L 0.55 0.55 0.15 - L1 0.95 0.95 Basic - N 8 10 Reference Rev. D 2/07 NOTES: 1. Plastic or metal protrusions of 0.15mm maximum per side are not included. L1 2. Plastic interlead protrusions of 0.25mm maximum per side are not included. A 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994. c SEE DETAIL "X" A2 GAUGE PLANE L A1 0.25 3 3 DETAIL X 23 FN7177.2 March 31, 2011 EL5144, EL5146, EL5244, EL5246, EL5444 Quarter Size Outline Plastic Packages Family (QSOP) MDP0040 A QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY D (N/2)+1 N INCHES SYMBOL QSOP16 QSOP24 QSOP28 TOLERANCE NOTES E PIN #1 I.D. MARK E1 1 (N/2) B 0.010 C A B e H C SEATING PLANE 0.007 0.004 C b C A B A 0.068 0.068 0.068 Max. - A1 0.006 0.006 0.006 0.002 - A2 0.056 0.056 0.056 0.004 - b 0.010 0.010 0.010 0.002 - c 0.008 0.008 0.008 0.001 - D 0.193 0.341 0.390 0.004 1, 3 E 0.236 0.236 0.236 0.008 - E1 0.154 0.154 0.154 0.004 2, 3 e 0.025 0.025 0.025 Basic - L 0.025 0.025 0.025 0.009 - L1 0.041 0.041 0.041 Basic - N 16 24 28 Reference Rev. F 2/07 NOTES: L1 A 1. Plastic or metal protrusions of 0.006" maximum per side are not included. 2. Plastic interlead protrusions of 0.010" maximum per side are not included. c SEE DETAIL "X" 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994. 0.010 A2 GAUGE PLANE L A1 44 DETAIL X All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 24 FN7177.2 March 31, 2011