1
100MHz Single-Supply Rail-to-Rail
Amplifiers
The EL5144 series amplifiers are voltage-feedback, high
speed, rail-to-rail amplifiers designed to operate on a single
+5V supply. They offer unity gain stability with an unloaded
-3dB bandwidth of 100MHz. The input common-mode
voltage range extends from the negative rail to within 1.5V of
the positive rail. Driving a 75W double terminated coaxial
cable, the EL5144 series amplifiers drive to within 150mV of
either rail. The 200V/µs slew rate and 0.1%/0.1° differential
gain/differential phase makes these parts ideal for composite
and component video applications. With their voltage
feedback architecture, these amplifiers can accept reactive
feedback networks, allowing them to be used in analog
filtering applications These amplifiers will source 90mA and
sink 65mA.
The EL5146 and EL5246 have a power-savings disable
feature. Applying a standard TTL low logic level to the CE (Chip
Enable) pin reduces the supply current to 2.6µA within 10ns.
Turn-on time is 500ns, allowing true break-before-make
conditions for multiplexing applications. Allowing the CE pin to
float or applying a high logic level will enable the amplifier.
For applications where board space is critical, singles are
offered in a 5 Ld SOT-23 package, duals in 8 Ld and 10 Ld
MSOP packages, and quads in a 16 Ld QSOP package.
Singles, duals, and quads are also available in industry
standard pinouts in SO and PDIP packages. All parts operate
over the industrial temperature range of -40°C to +85°C.
Features
Rail-to-rail output swing
-3dB bandwidth = 100MHz
Single-supply +5V operation
Power-down to 2.6µA
Large input common-mode range 0V < VCM < 3.5V
Diff gain/phase = 0.1%/0.1°
Low power 35mW per amplifier
Space-saving SOT23-5, 8 Ld MSOP and 10 Ld MSOP,
and 16 Ld QSOP packages
Pb-Free available (RoHS compliant)
Applications
Video amplifiers
5V analog signal processing
Multiplexers
Line drivers
Portable computers
High speed communications
Sample and hold amplifiers
Comparators
FN7177.2
EL5144, EL5146, EL5244, EL5246, EL5444
Data Sheet March 31, 2011
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2003, 2005, 2007, 2008. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
OBSOLETE
PRODUCTRECOMMENDED
REPLACEMENT
EL5144
EL5146
EL5244
EL5246
EL5444
EL8101
EL8100
EL8201
EL8200
EL8401
2FN7177.2
March 31, 2011
Ordering Information
PART NUMBER PART MARKING PACKAGE PKG. DWG. #
EL5144CW J 5 Ld SOT-23** MDP0038
EL5144CW-T7* J 5 Ld SOT-23** MDP0038
EL5144CW-T7A* J 5 Ld SOT-23** MDP0038
EL5144CWZ-T7* (Note) BAHA 5 Ld SOT-23** (Pb-free) MDP0038
EL5144CWZ-T7A* (Note) BAHA 5 Ld SOT-23** (Pb-free) MDP0038
EL5146CN EL5146CN 8 Ld PDIP MDP0031
EL5146CS 5146CS 8 Ld SOIC MDP0027
EL5146CS-T7* 5146CS 8 Ld SOIC MDP0027
EL5146CS-T13* 5146CS 8 Ld SOIC MDP0027
EL5146CSZ (Note) 5146CSZ 8 Ld SOIC (Pb-free) MDP0027
EL5146CSZ-T7* (Note) 5146CSZ 8 Ld SOIC (Pb-free) MDP0027
EL5146CSZ-T13* (Note) 5146CSZ 8 Ld SOIC (Pb-free) MDP0027
EL5244CN EL5244CN 8 Ld PDIP MDP0031
EL5244CS 5244CS 8 Ld SOIC MDP0027
EL5244CS-T7* 5244CS 8 Ld SOIC MDP0027
EL5244CS-T13* 5244CS 8 Ld SOIC MDP0027
EL5244CSZ (Note) 5244CSZ 8 Ld SOIC (Pb-free) MDP0027
EL5244CSZ-T7* (Note) 5244CSZ 8 Ld SOIC (Pb-free) MDP0027
EL5244CSZ-T13* (Note) 5244CSZ 8 Ld SOIC (Pb-free) MDP0027
EL5244CY H 8 Ld MSOP MDP0043
EL5244CY-T13* H 8 Ld MSOP MDP0043
EL5244CYZ (Note) BAVAA 8 Ld MSOP (Pb-free) MDP0043
EL5244CYZ-T7* (Note) BAVAA 8 Ld MSOP (Pb-free) MDP0043
EL5244CYZ-T13* (Note) BAVAA 8 Ld MSOP (Pb-free) MDP0043
EL5246CN EL5246CN 14 Ld PDIP MDP0031
EL5246CS 5246CS 14 Ld SOIC MDP0027
EL5246CS-T7* 5246CS 14 Ld SOIC MDP0027
EL5246CS-T13* 5246CS 14 Ld SOIC MDP0027
EL5246CSZ (Note) 5246CSZ 14 Ld SOIC (Pb-free) MDP0027
EL5246CSZ-T7* (Note) 5246CSZ 14 Ld SOIC (Pb-free) MDP0027
EL5246CSZ-T13* (Note) 5246CSZ 14 Ld SOIC (Pb-free) MDP0027
EL5246CY C 10 Ld MSOP MDP0043
EL5246CY-T13* C 10 Ld MSOP MDP0043
EL5246CYZ (Note) BAWAA 10 Ld MSOP (Pb-free) MDP0043
EL5246CYZ-T7* (Note) BAWAA 10 Ld MSOP (Pb-free) MDP0043
EL5246CYZ-T13* (Note) BAWAA 10 Ld MSOP (Pb-free) MDP0043
EL5444CN EL5444CN 14 Ld PDIP MDP0031
EL5444CS 5444CS 14 Ld SOIC MDP0027
EL5444CS-T7* 5444CS 14 Ld SOIC MDP0027
EL5444CS-T13* 5444CS 14 Ld SOIC MDP0027
EL5144, EL5146, EL5244, EL5246, EL5444
3FN7177.2
March 31, 2011
EL5444CSZ (Note) 5444CSZ 14 Ld SOIC (Pb-free) MDP0027
EL5444CSZ-T7* (Note) 5444CSZ 14 Ld SOIC (Pb-free) MDP0027
EL5444CSZ-T13* (Note) 5444CSZ 14 Ld SOIC (Pb-free) MDP0027
EL5444CU 5444CU 16 Ld QSOP MDP0040
EL5444CU-T13* 5444CU 16 Ld QSOP MDP0040
EL5444CUZ (Note) 5444CUZ 16 Ld QSOP (Pb-free) MDP0040
EL5444CUZ-T7* (Note) 5444CUZ 16 Ld QSOP (Pb-free) MDP0040
EL5444CUZ-T13* (Note) 5444CUZ 16 Ld QSOP (Pb-free) MDP0040
*Please refer to TB347 for details on reel specifications.
**EL5144CW symbol is .Jxxx where xxx represents date
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations).
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J
STD-020.
Ordering Information (Continued)
PART NUMBER PART MARKING PACKAGE PKG. DWG. #
EL5144, EL5146, EL5244, EL5246, EL5444
4FN7177.2
March 31, 2011
s
Pinouts
EL5144
(5 LD SOT-23)
TOP VIEW
EL5146
(8 LD SO, PDIP)
TOP VIEW
EL5244
(8 LD SOIC, PDIP, MSOP)
TOP VIEW
EL5246
(10 LD MSOP)
TOP VIEW
EL5246
(14 LD SOIC, PDIP)
TOP VIEW
EL5444
(14 LD SOIC, PDIP)
TOP VIEW
EL5444
(16 LD QSOP)
TOP VIEW
1
2
3
5
4
-+
OUT
GND
IN+
VS
IN-
1
2
3
4
8
7
6
5
-
+
NC
IN-
IN+
GND
CE
VS
OUT
NC
1
2
3
4
8
7
6
5
-
+
INB-
OUTB
INA-
INA+
GND INB+
VS
OUTA
-
+
1
2
3
4
65
10
9
8
7
-
+
-
+
INA-
OUTA
VS
OUTB
INB-
INA+
CEA
GND
CEB
INB+
1
2
3
4
14
13
12
11
5
6
7
10
9
8
-
+
-
+
NC
OUTA
INA-
OUTB
NC
INB-
VS
NC
CEA
INA+
CEB
NC
INB+
GND
1
2
3
4
14
13
12
11
5
6
7
10
9
8
-
+
-
+
-
+
-
+
INA-
INA+
OUTA
INB+
INB-
OUTB
VS
IND+
IND-
OUTD
INC-
INC+
OUTC
GND
1
2
3
4
16
15
14
13
5
6
7
12
11
10
8 9
-
+
-
+
-
+
-
+
IND+
IND-
GND
OUTD
INC-
INC+
OUTC
GND
INA-
INA+
VS
OUTA
INB+
INB-
OUTB
VS
EL5144, EL5146, EL5244, EL5246, EL5444
5FN7177.2
March 31, 2011
Absolute Maximum Ratings (TA = +25°C) Thermal Information
Supply Voltage between VS and GND. . . . . . . . . . . . . . . . . . . . .+6V
Pin Voltages . . . . . . . . . . . . . . . . . . . . . . . . . GND -0.5V to VS +0.5V
Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 50mA
Operating Conditions
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . -65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications VS = +5V, GND = 0V, TA = +25°C, CE = +2V, unless otherwise specified.
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
AC PERFORMANCE
dGDifferential Gain Error (Note 1) G = 2, RL = 150Ω to 2.5V, RF = 1kΩ0.1 %
dPDifferential Phase Error (Note 1) G = 2, RL = 150Ω to 2.5V, RF = 1kΩ0.1 °
BW Bandwidth -3dB, G = 1, RL = 10kΩ, RF = 0 100 MHz
-3dB, G = 1, RL = 150Ω, RF = 0 60 MHz
BW1 Bandwidth ±0.1dB, G = 1, RL = 150Ω to GND, RF = 0 8 MHz
GBWP Gain Bandwidth Product 60 MHz
SR Slew Rate G = 1, RL = 150Ω to GND, RF = 0, VO = 0.5V
to 3.5V
150 200 V/µs
tSSettling Time to 0.1%, VOUT = 0V to 3V 35 ns
DC PERFORMANCE
AVOL Open Loop Voltage Gain RL = no load, VOUT = 0.5V to 3V 54 65 dB
RL = 150Ω to GND, VOUT = 0.5V to 3V 40 50 dB
VOS Offset Voltage VCM = 1V, SOT23-5 and MSOP packages 25 mV
VCM = 1V, All other packages 15 mV
TCVOS Input Offset Voltage Temperature
Coefficient
10 mV/°C
IBInput Bias Current VCM = 0V and 3.5V 2 100 nA
INPUT CHARACTERISTICS
CMIR Common Mode Input Range CMRR 47dB 0 3.5 V
CMRR Common Mode Rejection Ratio DC, VCM = 0 to 3.0V 50 60 dB
DC, VCM = 0 to 3.5V 47 60 dB
RIN Input Resistance 1.5 GΩ
CIN Input Capacitance 1.5 pF
OUTPUT CHARACTERISTICS
VOP Positive Output Voltage Swing RL = 150Ω to 2.5V (Note 2) 4.70 4.85 V
RL = 150Ω to GND (Note 2) 4.20 4.65 V
RL = 1kΩ to 2.5V (Note 2) 4.95 4.97 V
VON Negative Output Voltage Swing RL = 150Ω to 2.5V (Note 2) 0.15 0.30 V
RL = 150Ω to GND (Note 2) 0 V
RL = 1kΩ to 2.5V (Note 2) 0.03 0.05 V
EL5144, EL5146, EL5244, EL5246, EL5444
6FN7177.2
March 31, 2011
+IOUT Positive Output Current RL = 10Ω to 2.5V 60 90 150 mA
-IOUT Negative Output Current RL = 10Ω to 2.5V -50 -65 -125 mA
ENABLE (EL5146 AND EL5246 ONLY)
tEN Enable Time EL5146, EL5246 500 ns
tDIS Disable Time EL5146, EL5246 10 ns
IIHCE CE Pin Input High Current CE = 5V, EL5146, EL5246 0.003 1 mA
IILCE CE Pin Input Low Current CE = 0V, EL5146, EL5246 -1.2 -3 mA
VIHCE CE Pin Input High Voltage for
Power-Up
EL5146, EL5246 2.0 V
VILCE CE Pin Input Low Voltage for
Power-Down
EL5146, EL5246 0.8 V
SUPPLY
IsON Supply Current - Enabled
(Per Amplifier)
No load, VIN = 0V, CE = 5V 7 8.8 mA
IsOFF Supply Current - Disabled
(Per Amplifier)
No load, VIN = 0V, CE = 0V, EL5146 and
EL5246 only
2.6 5 mA
PSOR Power Supply Operating Range 4.75 5.0 5.25 V
PSRR Power Supply Rejection Ratio DC, VS = 4.75V to 5.25V 50 60 dB
NOTES:
1. Standard NTSC test, AC signal amplitude = 286mVP-P
, f = 3.8MHz, VOUT is swept from 0.8V to 3.4V, RL is DC-coupled.
2. RL is total load resistance due to feedback resistor and load resistor.
Electrical Specifications VS = +5V, GND = 0V, TA = +25°C, CE = +2V, unless otherwise specified. (Continued)
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
Typical Performance Curves
FIGURE 1. NON-INVERTING FREQUENCY RESPONSE (GAIN) FIGURE 2. NON-INVERTING FREQUENCY RESPONSE
(PHASE)
1M 10M
0
NORMALIZED MAGNITUDE (dB)
FREQUENCY (Hz)
2
AV = 5.6,
RF = 1kΩ
-4
-2
-8
-6
100M
VCM = 1.5V
RL = 150Ω
AV = 1, RF = 0Ω
AV = 2,
RF = 1kΩ
PHASE (°)
1M 10M
FREQUENCY (Hz)
100M
AV = 5.6,
RF = 1kΩ
AV = 1, RF = 0Ω
AV = 2,
RF = 1kΩ
-45
0
-135
-90
-180 VCM = 1.5V
RL = 150Ω
EL5144, EL5146, EL5244, EL5246, EL5444
7FN7177.2
March 31, 2011
FIGURE 3. INVERTING FREQUENCY RESPONSE (GAIN) FIGURE 4. INVERTING FREQUENCY RESPONSE (PHASE)
FIGURE 5. 3dB BANDWIDTH vs DIE TEMPERATURE FOR
VARIOUS GAINS
FIGURE 6. 3dB BANDWIDTH VS DIE TEMPERATURE FOR
VARIOUS GAINS
FIGURE 7. FREQUENCY RESPONSE FOR VARIOUS RLFIGURE 8. FREQUENCY RESPONSE FOR VARIOUS CL
Typical Performance Curves
1M 10M
FREQUENCY (Hz)
100M
0
NORMALIZED MAGNITUDE (dB)
2
-4
-2
-8
-6
AV = -5.6
AV = -1
VCM = 1.5V
RF = 1kΩ
RL = 150Ω
AV = -2
1M 10M
FREQUENCY (Hz)
100M
PHASE (°)
135
180
45
90
0
AV = -5.6
VCM = 1.5V
RF = 1kΩ
RL = 150Ω
AV = -1
AV = -2
-55 25
DIE TEMPERATURE (°C)
145-15 65 105
80
3dB BANDWIDTH (MHz)
100
40
60
0
20
AV = 1, RF = 0Ω
AV = 2, RF = 1kΩ
AV = 5.6, RF = 1kΩ
RL = 150Ω
-55 25
DIE TEMPERATURE (°C)
145-15 65 105
120
3dB BANDWIDTH (MHz)
150
60
90
0
30
RL = 10kΩ
AV = 1, RF = 0Ω
AV = 2, RF = 1kΩ
AV = 5.6, RF = 1kΩ
VCM = 1.5V
RF = 0Ω
AV = 1
1M 10M
FREQUENCY (Hz)
100M
NORMALIZED MAGNITUDE (dB)
2
4
-2
0
-4
RL = 10kΩ
RL = 520Ω
RL= 150Ω
1M 10M
FREQUENCY (Hz)
100M
NORMALIZED MAGNITUDE (dB)
4
8
-4
0
-8
CL=100pF
VCM = 1.5V
RL = 150Ω
AV = 1 CL= 47pF
CL = 22pF
CL = 0pF
EL5144, EL5146, EL5244, EL5246, EL5444
8FN7177.2
March 31, 2011
FIGURE 9. FREQUENCY RESPONSE FOR VARIOUS RF AND
RG
FIGURE 10. GROUP DELAY vs FREQUENCY
FIGURE 11. OPEN LOOP GAIN AND PHASE vs FREQUENCY FIGURE 12. OPEN LOOP VOLTAGE GAIN vs DIE
TEMPERATURE
FIGURE 13. VOLTAGE NOISE vs FREQUENCY - VIDEO AMP FIGURE 14. CLOSED LOOP OUTPUT IMPEDANCE vs
FREQUENCY
Typical Performance Curves
RF = RG = 2kΩ
RF = RG = 560Ω
1M 10M
FREQUENCY (Hz)
100M
NORMALIZED MAGNITUDE (dB)
0
2
-4
-2
-6
VCM = 1.5V
RL = 150Ω
AV = 2
RF = RG = 1kΩAV = 2
RF = 1kΩ
AV = 1
RF = 1Ω
1M 10M
FREQUENCY (Hz)
100M
GROUP DELAY (ns)
6
8
2
4
0
10
90
45
180
135
225
0
GAIN (dB)
60
80
20
40
0
PHASE (°)
1k 1M
FREQUENCY (Hz)
100M10k 10M100k
RL = 1kΩ
RL = 150Ω
PHASE
GAIN RL = 150Ω
NO LOAD
OPEN LOOP GAIN (dB)
60
70
40
50
30
80
-55 65
DIE TEMPERATURE (°C)
145-15 10525
10k
1k
100
10
10 100 10k 100M
FREQUENCY (Hz)
VOLTAGE NOISE (nV/Hz)
1M1k 100k 10M
CLOSED LOOP (ZO)
20
2
0.2
200
10k 10M
FREQUENCY (Hz)
100M100k 1M
RF = 0Ω
AV = 2
EL5144, EL5146, EL5244, EL5246, EL5444
9FN7177.2
March 31, 2011
FIGURE 15. OFFSET VOLTAGE vs DIE TEMPERATURE
(6 TYPICAL SAMPLES)
FIGURE 16. PSRR AND CMRR vs FREQUENCY
FIGURE 17. OUTPUT VOLTAGE SWING vs FREQUENCY FOR
THD < 1%
FIGURE 18. OUTPUT VOLTAGE SWING vs FREQUENCY FOR
THD < 0.1%
FIGURE 19. LARGE SIGNAL PULSE RESPONSE (SINGLE
SUPPLY)
FIGURE 20. SMALL SIGNAL PULSE RESPONSE (SINGLE
SUPPLY)
Typical Performance Curves
OFFSET VOLTAGE (mV)
6
12
-6
0
-12
-55 65
DIE TEMPERATURE (°C)
145-15 10525 1k 10M
FREQUENCY (Hz)
100M100k 1M10k
PSRR, CMRR (dB)
-20
0
-60
-40
-80
20
PSRR+
CMRR
PSRR-
OUTPUT VOLTAGE SWING (VP-P)
3
4
1
2
0
5
1M 10M
FREQUENCY (Hz)
100M
RL = 150Ω TO 2.5V
RL = 500Ω TO 2.5V
RF = 1kΩ
AV = 2
OUTPUT VOLTAGE SWING (VP-P)
3
4
1
2
0
5
1M 10M
FREQUENCY (Hz)
100M
RF = 1kΩ
AV = 2
RL = 150Ω TO 2.5V
RL = 500Ω TO 2.5V
OUTPUT VOLTAGE (V)
2
3
1
0
4
TIME (20ns/div)
VS = 5V
RL = 150Ω TO 0V
RF = 1kΩ
AV = 2
VS = 5V
RL = 150Ω TO 0V
RF = 1kΩ
AV = 2
OUTPUT VOLTAGE (V)
1.5
1.7
1.3
1.1
1.9
TIME (20ns/div)
EL5144, EL5146, EL5244, EL5246, EL5444
10 FN7177.2
March 31, 2011
FIGURE 21. LARGE SIGNAL PULSE RESPONSE (SPLIT
SUPPLIES)
FIGURE 22. SMALL SIGNAL PULSE RESPONSE (SPLIT
SUPPLY)
FIGURE 23. SETTLING TIME vs SETTLING ACCURACY FIGURE 24. SLEW RATE vs DIE TEMPERATURE
FIGURE 25. DIFFERENTIAL GAIN FOR RL TIED TO 0V FIGURE 26. DIFFERENTIAL PHASE FOR RL TIED TO 0V
Typical Performance Curves
OUTPUT VOLTAGE (V)
0
2
-2
-4
4
TIME (20ns/div)
VS = ±2.5V
RL = 150Ω TO 0V
RF = 1kΩ
AV = 2
OUTPUT VOLTAGE (V)
0
0.2
-0.2
-0.4
0.4
TIME (20ns/div)
VS = ±2.5V
RL = 150Ω TO 0V
RF = 1kΩ
AV = 2
SETTLING TIME (ns)
60
80
20
40
0
100
0.01 0.1
SETTLING ACCURACY (%)
1
RL = 1kΩ
RF = 500Ω
AV = -1
VSTEP = 3V
SLEW RATE (V/µs)
200
150
250
-55 25
DIE TEMPERATURE (°C)
145-15 65 105
DIFFERENTIAL GAIN (%)
0
0.04
-0.04
-0.08
0.08
0.25 1.75
VOUT (V)
3.25
RF = 0Ω
AV = 1
RL = 10kΩ
RL = 150Ω
0.25 1.75
VOUT (V)
3.25
DIFFERENTIAL PHASE (°)
0
0.1
-0.1
-0.2
0.2 RF = 0Ω
AV = 1
RL = 10kΩ
RL = 150Ω
EL5144, EL5146, EL5244, EL5246, EL5444
11 FN7177.2
March 31, 2011
FIGURE 27. DIFFERENTIAL GAIN FOR RL TIED TO 2.5V FIGURE 28. DIFFERENTIAL PHASE FOR RL TIED TO 2.5V
FIGURE 29. DIFFERENTIAL GAIN FOR RL TIED TO 0V FIGURE 30. DIFFERENTIAL PHASE FOR RL TIED TO 0V
FIGURE 31. DIFFERENTIAL GAIN FOR RL TIED TO 2.5V FIGURE 32. DIFFERENTIAL PHASE FOR RL TIED TO 2.5V
Typical Performance Curves
0.5 2.0
VOUT (V)
3.5
DIFFERENTIAL GAIN (%)
0
0.1
-0.1
-0.2
0.2 RF = 0Ω
AV = 1
RL = 10kΩ
RL = 150Ω
0.5 2.0
VOUT (V)
3.5
DIFFERENTIAL PHASE (°)
0
0.1
-0.1
-0.2
0.2 RF = 0Ω
AV = 1
RL = 10kΩ
RL = 150Ω
0.5 2.0
VOUT (V)
3.5
DIFFERENTIAL GAIN (%)
0
0.1
-0.1
-0.2
0.2
RL=10kΩ
RL=150ΩRF = 1kΩ
AV = 2
0.5 2.0
VOUT (V)
3.5
DIFFERENTIAL PHASE (°)
0
0.1
-0.1
-0.2
0.2
RL = 10kΩ
RL = 150Ω
RF = 1kΩ
AV = 2
0.5 2.0
VOUT (V)
3.5
DIFFERENTIAL GAIN (%)
0
0.1
-0.1
-0.2
0.2
RL = 10kΩ
RL = 150Ω
RF = 1kΩ
AV = 2
0.5 2.0
VOUT (V)
3.5
DIFFERENTIAL PHASE (°)
0
0.1
-0.1
-0.2
0.2
RL = 10kΩ
RL = 150Ω
RF = 1kΩ
AV = 2
EL5144, EL5146, EL5244, EL5246, EL5444
12 FN7177.2
March 31, 2011
FIGURE 33. 2nd AND 3rd HARMONIC DISTORTION vs
FREQUENCY
FIGURE 34. 2nd AND 3rd HARMONIC DISTORTION vs
FREQUENCY
FIGURE 35. 2nd AND 3rd HARMONIC DISTORTION vs
FREQUENCY
FIGURE 36. CHANNEL-TO-CHANNEL CROSSTALK - DUALS
AND QUADS (WORST CHANNEL)
FIGURE 37. SUPPLY CURRENT (PER AMP) vs SUPPLY
VOLTAGE
FIGURE 38. OUTPUT CURRENT VS DIE TEMPERATURE
Typical Performance Curves
1M 10M
FREQUENCY (Hz)
100M
DISTORTION (dBc)
-45
-35
-55
-75
-25
-65
VOUT = 0.25V TO 2.25V
RL = 100Ω TO 0V
HD3
HD2
1M 10M
FREQUENCY (Hz)
100M
DISTORTION (dBc)
-45
-35
-55
-75
-25
-65 VOUT = 0.5V TO 2.5V
RL = 100Ω TO 0V
HD2
HD3
HD3
HD2
VOUT=1V to
3V
1M 10M
FREQUENCY (Hz)
100M
DISTORTION (dBc)
-45
-35
-55
-75
-25
-65
VOUT = 1V TO 3V
RL = 100Ω TO 0V
1M 10M 100M
-45
-35
-55
-75
-25
-65
HD2
HD3
100k 1M
FREQUENCY (Hz)
100M10M
CROSSTALK (dB)
-40
-20
-60
-100
0
-80
03
SUPPLY VOLTAGE (V)
5142
SUPPLY CURRENT (mA)
4
6
2
0
8
-55
DIE TEMPERATURE (°C)
145-15 10565
OUTPUT CURRENT (mA)
60
80
40
20
120
100
25
SINK
RL = 10Ω TO 2.5V
EL5144, EL5146, EL5244, EL5246, EL5444
13 FN7177.2
March 31, 2011
FIGURE 39. SUPPLY CURRENT - ON (PER AMP) vs DIE
TEMPERATURE
FIGURE 40. SUPPLY CURRENT - OFF (PER AMP) vs DIE
TEMPERATURE
FIGURE 41. POSITIVE OUTPUT VOLTAGE SWING vs DIE
TEMPERATURE
FIGURE 42. NEGATIVE OUTPUT VOLTAGE SWING vs DIE
TEMPERATURE
FIGURE 43. OUTPUT VOLTAGE FROM EITHER RAIL vs DIE
TEMPERATURE FOR VARIOUS EFFECTIVE
RLOAD
FIGURE 44. OFF ISOLATION - EL5146 AND EL5246
Typical Performance Curves
-55
DIE TEMPERATURE (°C)
145-15 10565
SUPPLY CURRENT (mA)
6
7
5
4
9
8
25 -55
DIE TEMPERATURE (°C)
145-15 10565
SUPPLY CURRENT (µA)
2
3
1
0
5
4
25
-55
DIE TEMPERATURE (°C)
145-15 1056525
OUTPUT VOLTAGE (V)
4.7
4.8
4.6
4.5
5.0
4.9
RL = 150Ω TO 2.5V
RL = 150Ω TO 0V
RL=150Ω
RL = 150Ω TO 2.5V
RL = 150Ω TO 0V
-55
DIE TEMPERATURE (°C)
145-15 1056525
OUTPUT VOLTAGE (V)
0.2
0.3
0.1
0
0.5
0.4
-55
DIE TEMPERATURE (°C)
145-15 1056525
OUTPUT VOLTAGE (V)
10
1
300
100
EFFECTIVE R
LOAD
= 150
Ω
EFFECTIVE R
LOAD
= 1k
Ω
EFFECTIVE RLOAD = 5k
Ω
EFFECTIVE RLOAD = RL//RF TO VS/2
10k
FREQUENCY (Hz)
100M100k 10M1M
MAGNITUDE (dBc)
-80
-120
-20
-40
-60
-100
EL5146CS AND
EL5146CN
EL5246CN
EL5246CS
EL5144, EL5146, EL5244, EL5246, EL5444
14 FN7177.2
March 31, 2011
FIGURE 45. MAXIMUM POWER DISSIPATION vs AMBIENT
TEMPERATURE SINGLES (TJMAX = +150°C)
FIGURE 46. MAXIMUM POWER DISSIPATION vs AMBIENT
TEMPERATURE DUALS (TJMAX = +150°C)
FIGURE 47. MAXIMUM POWER DISSIPATION vs AMBIENT TEMPERATURE QUADS (TJMAX = +150°C)
Typical Performance Curves
POWER DISSIPATION (W)
AMBIENT TEMPERATURE (°C)
0
0.4
0.8
1.2
2
.
0
1.6
-50 10 40 70-20 100
PDIP, ΘJA = 110°C/W
SOIC, ΘJA = 161°C/W
SOT23-5, ΘJA = 256°C/W
POWER DISSIPATION (W)
AMBIENT TEMPERATURE (°C)
0
0.5
1.0
1.5
2
.
5
2.0
-50 104070-20 100
PDIP-14, ΘJA = 87°C/W
SOIC-14, ΘJA = 120°C/W
PDIP-8, ΘJA = 107°C/W
MSOP-8,10, ΘJA = 206°C/W
SOIC-8, ΘJA = 159°C/W
POWER DISSIPATION (W)
AMBIENT TEMPERATURE (°C)
0
0.5
1.0
1.5
2.5
2.0
-50 10 40 70-20 100
SOIC-14, ΘJA = 118°C/W
QSOP-16, ΘJA = 158°C/W
PDIP-14, ΘJA = 83°C/W
EL5144, EL5146, EL5244, EL5246, EL5444
15 FN7177.2
March 31, 2011
Pin Descriptions
EL5144
5 Ld
SOT23
EL5146
8 Ld
SO/PDIP
EL5244
8 Ld SO/
PDIP/MSOP
EL5246
10 Ld
MSOP
EL5246
14 Ld
SO/PDIP
EL5444
14 Ld
SO/PDIP
EL5444
16 Ld
QSOP NAME FUNCTION EQUIVALENT CIRCUIT
5 7 8 8 11 4 4, 5 VS Positive Power Supply
2 4 4 3 4 11 12, 13 GND Ground or Negative
Power Supply
3 3 IN+ Non-inverting Input
Circuit 1
4 2 IN- Inverting Input (Reference Circuit 1)
1 6 OUT Amplifier Output
Circuit 2
3 1 1 3 3 INA+ Amplifier A
Non-inverting Input
(Reference Circuit 1)
2 10 14 2 2 INA- Amplifier A Inverting
Input
(Reference Circuit 1)
1 9 13 1 1 OUTA Amplifier A Output (Reference Circuit 2)
5 5 7 5 6 INB+ Amplifier B
Non-inverting Input
(Reference Circuit 1)
6 6 8 6 7 INB- Amplifier B Inverting
Input
(Reference Circuit 1)
7 7 9 7 8 OUTB Amplifier B Output (Reference Circuit 2)
10 11 INC+ Amplifier C
Non-inverting Input
(Reference Circuit 1)
9 10 INC- Amplifier C Inverting
Input
(Reference Circuit 1)
8 9 OUTC Amplifier C Output (Reference Circuit 2)
12 14 IND+ Amplifier D
Non-inverting Input
(Reference Circuit 1)
13 15 IND- Amplifier D Inverting
Input
(Reference Circuit 1)
14 16 OUTD Amplifier D Output (Reference Circuit 2)
8 CE Enable
(Enabled when high)
f
Circuit 3
VS
GND
VS
GND
+
VS
1.4V
GND
EL5144, EL5146, EL5244, EL5246, EL5444
16 FN7177.2
March 31, 2011
Description of Operation and Applications
Information
Product Description
The EL5144 series is a family of wide bandwidth, single
supply, low power, rail-to-rail output, voltage feedback
operational amplifiers. The family includes single, dual, and
quad configurations. The singles and duals are available
with a power-down pin to reduce power to 2.6µA typically. All
the amplifiers are internally compensated for closed loop
feedback gains of +1 or greater. Larger gains are acceptable
but bandwidth will be reduced according to the familiar Gain
Bandwidth Product.
Connected in voltage follower mode and driving a high
impedance load, the EL5144 series has a -3dB bandwidth of
100MHz. Driving a 150Ω load, they have a -3dB bandwidth
of 60MHz while maintaining a 200V/µs slew rate. The input
common mode voltage range includes ground while the
output can swing rail-to-rail.
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high-frequency device, good printed circuit
board layout is necessary for optimum performance. Ground
plane construction is highly recommended. Lead lengths
should be as short as possible. The power supply pin must
be well bypassed to reduce the risk of oscillation For normal
single supply operation, where the GND pin is connected to
the ground plane, a single 4.7µF tantalum capacitor in
parallel with a 0.1µF ceramic capacitor from VS to GND will
suffice. This same capacitor combination should be placed
at each supply pin to ground if split supplies are to be used.
In this case, the GND pin becomes the negative supply rail.
For good AC performance, parasitic capacitance should be
kept to a minimum. Use of wire wound resistors should be
avoided because of their additional series inductance. Use
of sockets, particularly for the SO package, should be
avoided if possible. Sockets add parasitic inductance and
capacitance that can result in compromised performance.
Input, Output and Supply Voltage Range
The EL5144 series has been designed to operate with a
single supply voltage of 5V. Split supplies can be used so
long as their total range is 5V.
The amplifiers have an input common mode voltage range
that includes the negative supply (GND pin) and extends to
within 1.5V of the positive supply (VS pin). They are
specified over this range.
The output of the EL5144 series amplifiers can swing rail to
rail. As the load resistance becomes lower in value, the
ability to drive close to each rail is reduced. However, even
with an effective 150Ω load resistor connected to a voltage
halfway between the supply rails, the output will swing to
within 150mV of either rail.
Figure 48 shows the output of the EL5144 series amplifier
swinging rail to rail with RF = 1kΩ, AV = +2 and RL = 1MΩ.
Figure 49 is with RL = 150Ω.
2 3 CEA Enable Amplifier A
(Enabled when high)
(Reference Circuit 3)
4 5 CEB Enable Amplifier B
(Enabled when high)
(Reference Circuit 3)
1, 5 2, 6,
10, 12
NC No Connect.
Not internally
connected.
Pin Descriptions (Continued)
EL5144
5 Ld
SOT23
EL5146
8 Ld
SO/PDIP
EL5244
8 Ld SO/
PDIP/MSOP
EL5246
10 Ld
MSOP
EL5246
14 Ld
SO/PDIP
EL5444
14 Ld
SO/PDIP
EL5444
16 Ld
QSOP NAME FUNCTION EQUIVALENT CIRCUIT
0V
5V
FIGURE 48.
0V
5V
FIGURE 49.
EL5144, EL5146, EL5244, EL5246, EL5444
17 FN7177.2
March 31, 2011
Choice of Feedback Resistor, RF
These amplifiers are optimized for applications that require a
gain of +1. Hence, no feedback resistor is required.
However, for gains greater than +1, the feedback resistor
forms a pole with the input capacitance. As this pole
becomes larger, phase margin is reduced. This causes
ringing in the time domain and peaking in the frequency
domain. Therefore, RF has some maximum value that
should not be exceeded for optimum performance. If a large
value of RF must be used, a small capacitor in the few
picofarad range in parallel with RF can help to reduce this
ringing and peaking at the expense of reducing the
bandwidth.
As far as the output stage of the amplifier is concerned, RF +
RG appear in parallel with RL for gains other than +1. As this
combination gets smaller, the bandwidth falls off.
Consequently, RF also has a minimum value that should not
be exceeded for optimum performance.
For AV = +1, RF = 0Ω is optimum. For AV = -1 or +2 (noise
gain of 2), optimum response is obtained with RF between
300Ω and 1kΩ. For AV = -4 or +5 (noise gain of 5), keep RF
between 300Ω and 15kΩ.
Video Performance
For good video signal integrity, an amplifier is required to
maintain the same output impedance and the same
frequency response as DC levels are changed at the output.
This can be difficult when driving a standard video load of
150Ω, because of the change in output current with DC level.
A look at Figures 25 through 32 beginning on page 10
(Differential Gain and Differential Phase curves for various
supply and loading conditions) will help you obtain optimal
performance. Curves are provided for AV= +1 and +2, and
RL = 150Ω and 10kΩ tied both to ground as well as 2.5V. As
with all video amplifiers, there is a common mode sweet spot
for optimum differential gain/differential phase. For example,
with AV = +2 and RL=150Ω tied to 2.5V, and the output
common mode voltage kept between 0.8V and 3.2V, dG/dP
is a very low 0.1%/0.1°. This condition corresponds to
driving an AC-coupled, double terminated 75Ω coaxial cable.
With AV = +1, RL = 150Ω tied to ground, and the video level
kept between 0.85V and 2.95V, these amplifiers provide
dG/dP performance of 0.05%/0.20°. This condition is
representative of using the EL5144 series amplifier as a
buffer driving a DC coupled, double terminated, 75Ω coaxial
cable. Driving high impedance loads, such as signals on
computer video cards, gives similar or better dG/dP
performance as driving cables.
Driving Cables and Capacitive Loads
The EL5144 series amplifiers can drive 50pF loads in
parallel with 150Ω with 4dB of peaking and 100pF with 7dB
of peaking. If less peaking is desired in these applications, a
small series resistor (usually between 5Ω and 50Ω) can be
placed in series with the output to eliminate most peaking.
However, this will obviously reduce the gain slightly. If your
gain is greater than 1, the gain resistor (RG) can then be
chosen to make up for any gain loss, which may be created
by this additional resistor at the output. Another method of
reducing peaking is to add a “snubber” circuit at the output.
A snubber is a resistor in a series with a capacitor, 150Ω and
100pF being typical values. The advantage of a snubber is
that it does not draw DC load current.
When used as a cable driver, double termination is always
recommended for reflection-free performance. For those
applications, the back-termination series resistor will de-couple
the EL5144 series amplifier from the cable and allow extensive
capacitive drive. However, other applications may have high
capacitive loads without a back-termination resistor. Again, a
small series resistor at the output can reduce peaking.
Disable/Power-Down
The EL5146 and EL5246 amplifiers can be disabled, placing
its output in a high-impedance state. Turn-off time is only
10ns and turn-on time is around 500ns. When disabled, the
amplifier’s supply current is reduced to 2.6µA typically,
thereby effectively eliminating power consumption. The
amplifier’s power-down can be controlled by standard TTL or
CMOS signal levels at the CE pin. The applied logic signal is
relative to the GND pin. Letting the CE pin float will enable
the amplifier. Hence, the 8 Ld PDIP and 8 Ld SOIC single
amps are pin compatible with standard amplifiers that don’t
have a power-down feature.
Short Circuit Current Limit
The EL5144 series amplifiers do not have internal short
circuit protection circuitry. Short circuit current of 90mA
sourcing and 65mA sinking typically will flow if the output is
trying to drive high or low but is shorted to half way between
the rails. If an output is shorted indefinitely, the power
dissipation could easily increase such that the part will be
destroyed. Maximum reliability is maintained if the output
current never exceeds ±50mA. This limit is set by internal
metal interconnect limitations. Obviously, short circuit
conditions must not remain or the internal metal connections
will be destroyed.
Power Dissipation
With the high output drive capability of the EL5144 series
amplifiers, it is possible to exceed the +150°C Absolute
Maximum junction temperature under certain load current
conditions. Therefore, it is important to calculate the maximum
junction temperature for the application to determine if load
conditions or package type need to be modified for the
amplifier to remain in the safe operating area.
The maximum power dissipation allowed in a package is
determined according to Equation 1:
PDMAX
TJMAX - TAMAX
θJA
---------------------------------------------
=(EQ. 1)
EL5144, EL5146, EL5244, EL5246, EL5444
18 FN7177.2
March 31, 2011
where:
TJMAX = Maximum junction temperature
TAMAX = Maximum ambient temperature
θJA = Thermal resistance of the package
PDMAX = Maximum power dissipation in the package
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the load, or
as expressed in Equation 2:
where:
N = Number of amplifiers in the package
VS = Total supply voltage
ISMAX = Maximum supply current per amplifier
VOUT = Maximum output voltage of the application
RL = Load resistance tied to ground
If we set the two PDMAX equations equal to each other, we
can solve for RL using Equation 3:
Assuming worst case conditions of TA = +85°C, VOUT =V
S/2V,
VS = 5.5V, and ISMAX = 8.8mA per amplifier, following is a table
of all packages and the minimum RL allowed.
EL5144 Series Comparator Application
The EL5144 series amplifier can be used as a very fast,
single supply comparator. Most op amps used as a
comparator allow only slow speed operation because of
output saturation issues. The EL5144 series amplifier
doesn’t suffer from output saturation issues. Figure 50
shows the amplifier implemented as a comparator. Figure 51
is a graph of propagation delay vs overdrive as a square
wave is presented at the input of the comparator.
Multiplexing with the EL5144 Series Amplifier
Besides normal power-down usage, the CE pin on the
EL5146 and EL5246 series amplifiers also allow for
multiplexing applications. Figure 52 shows an EL5246 with
its outputs tied together, driving a back terminated 75Ω video
load. A 3VP-P 10MHz sine wave is applied at Amp A input,
and a 2.4VP-P 5MHz square wave to Amp B. Figure 53
shows the SELECT signal that is applied, and the resulting
output waveform at VOUT
. Observe the break-before-make
operation of the multiplexing. Amp A is on and VIN1 is being
passed through to the output of the amplifier. Then Amp A
turns off in about 10ns. The output decays to ground with an
RLCL time constants. 500ns later, Amp B turns on and VIN2
is passed through to the output. This break-before-make
operation ensures that more than one amplifier isn’t trying to
drive the bus at the same time. Notice the outputs are tied
directly together. Isolation resistors at each output are not
necessary.
PART PACKAGE MINIMUM RL
EL5144CW SOT23-5 37
EL5146CS SOIC-8 21
EL5146CN PDIP-8 14
EL5244CS SOIC-8 48
EL5244CN PDIP-8 30
EL5244CY MSOP-8 69
EL5246CY MSOP-10 69
EL5246CS SOIC-14 34
EL5246CN PDIP-14 23
EL5444CU QSOP-16 139
EL5444CS SOIC-14 85
EL5444CN PDIP-14 51
P
DMAX NV
SISMAX VS
( - VOUT)VOUT
RL
----------------
×+××=(EQ. 2)
RL
VOUT VS - VOUT
()×
TJMAX - TAMAX
NθJA
×
---------------------------------------------
⎝⎠
⎜⎟
⎛⎞
- VSISMAX
×()
----------------------------------------------------------------------------------------------
=(EQ. 3)
1
2
3
4
8
7
6
5
+
-
+
EL5146
+5V
VIN
+2.5V VOUT
RL
0.1µF
FIGURE 50. EL5146 AMPLIFIER IMPLEMENTED AS A
COMPARATOR
0.01 0.1 1.0
10
100
1000
PROPAGATION DELAY (ns)
OVERDRIVE (V)
POSITIVE GOING
SIGNAL
NEGATIVE GOING
SIGNAL
FIGURE 51. PROPAGATION DELAY vs OVERDRIVE FOR
AMPLIFIER USED AS A COMPARATOR
EL5144, EL5146, EL5244, EL5246, EL5444
19 FN7177.2
March 31, 2011
Free Running Oscillator Application
Figure 54 is an EL5144 configured as a free running
oscillator. To first order, ROSC and COSC determine the
frequency of oscillation according to:
For rail to rail output swings, maximum frequency of
oscillation is around 15MHz. If reduced output swings are
acceptable, 25MHz can be achieved. Figure 55 shows the
oscillator for ROSC = 510Ω, COSC = 240pF and
FOSC =6MHz.
FIGURE 52. FIGURE 53.
FIGURE 54. FIGURE 55.
FIGURE 56.
1
2
3
4
14
13
12
11
5
6
7
10
9
8
-
+
-
+
Sele
+5V
VOUT
150Ω
VIN 1
3VPP
0.1µ4.7µ
VIN 2
2.4VPP
EL5246
0V
5V
VOUT
Selec
0V
5V
1
2
3
5
4
-
+
+5V
470K
470K
0.1µ
470K
ROS
COS
5V
VOUT
0V
0V
5V
FOSC
0.72
ROSC COSC
×
---------------------------------------
=(EQ. 4)
EL5144, EL5146, EL5244, EL5246, EL5444
20 FN7177.2
March 31, 2011
EL5144, EL5146, EL5244, EL5246, EL5444
SOT-23 Package Family
e1
N
A
D
E
4
321
E1
0.15 DC
2X 0.20 C
2X
e
B0.20 MDC A-B
b
NX
6
2 3
5
SEATING
PLANE
0.10 C
NX
1 3
C
D
0.15 A-BC
2X
A2
A1
H
c
(L1)
L
0.25
+3°
-0°
GAUGE
PLANE
A
MDP0038
SOT-23 PACKAGE FAMILY
SYMBOL SOT23-5 SOT23-6 TOLERANCE
A 1.45 1.45 MAX
A1 0.10 0.10 ±0.05
A2 1.14 1.14 ±0.15
b 0.40 0.40 ±0.05
c 0.14 0.14 ±0.06
D 2.90 2.90 Basic
E 2.80 2.80 Basic
E1 1.60 1.60 Basic
e 0.95 0.95 Basic
e1 1.90 1.90 Basic
L 0.45 0.45 ±0.10
L1 0.60 0.60 Reference
N 5 6 Reference
Rev. E 3/00
NOTES:
1. Plastic or metal protrusions of 0.25mm maximum per side are
not included.
2. Plastic interlead protrusions of 0.25mm maximum per side are
not included.
3. This dimension is measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
5. Index area - Pin #1 I.D. will be located within the indicated zone
(SOT23-6 only).
6. SOT23-5 version has no center lead (shown as a dashed line).
21 FN7177.2
March 31, 2011
EL5144, EL5146, EL5244, EL5246, EL5444
Small Outline Package Family (SO)
GAUGE
PLANE
A2
A1 L
L1
DETAIL X
4° ±4°
SEATING
PLANE
eH
b
C
0.010 BMCA
0.004 C
0.010 BMCA
B
D
(N/2)
1
E1
E
NN (N/2)+1
A
PIN #1
I.D. MARK
h X 45°
A
SEE DETAIL “X”
c
0.010
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO)
SYMBOL
INCHES
TOLERANCE NOTESSO-8 SO-14
SO16
(0.150”)
SO16 (0.300”)
(SOL-16)
SO20
(SOL-20)
SO24
(SOL-24)
SO28
(SOL-28)
A 0.068 0.068 0.068 0.104 0.104 0.104 0.104 MAX -
A1 0.006 0.006 0.006 0.007 0.007 0.007 0.007 ±0.003 -
A2 0.057 0.057 0.057 0.092 0.092 0.092 0.092 ±0.002 -
b 0.017 0.017 0.017 0.017 0.017 0.017 0.017 ±0.003 -
c 0.009 0.009 0.009 0.011 0.011 0.011 0.011 ±0.001 -
D 0.193 0.341 0.390 0.406 0.504 0.606 0.704 ±0.004 1, 3
E 0.236 0.236 0.236 0.406 0.406 0.406 0.406 ±0.008 -
E1 0.154 0.154 0.154 0.295 0.295 0.295 0.295 ±0.004 2, 3
e 0.050 0.050 0.050 0.050 0.050 0.050 0.050 Basic -
L 0.025 0.025 0.025 0.030 0.030 0.030 0.030 ±0.009 -
L1 0.041 0.041 0.041 0.056 0.056 0.056 0.056 Basic -
h 0.013 0.013 0.013 0.020 0.020 0.020 0.020 Reference -
N 8 14 16 16 20 24 28 Reference -
Rev. M 2/07
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994
22 FN7177.2
March 31, 2011
EL5144, EL5146, EL5244, EL5246, EL5444
Plastic Dual-In-Line Packages (PDIP)
MDP0031
PLASTIC DUAL-IN-LINE PACKAGE
SYMBOL
INCHES
TOLERANCE NOTESPDIP8 PDIP14 PDIP16 PDIP18 PDIP20
A 0.210 0.210 0.210 0.210 0.210 MAX
A1 0.015 0.015 0.015 0.015 0.015 MIN
A2 0.130 0.130 0.130 0.130 0.130 ±0.005
b 0.018 0.018 0.018 0.018 0.018 ±0.002
b2 0.060 0.060 0.060 0.060 0.060 +0.010/-0.015
c 0.010 0.010 0.010 0.010 0.010 +0.004/-0.002
D 0.375 0.750 0.750 0.890 1.020 ±0.010 1
E 0.310 0.310 0.310 0.310 0.310 +0.015/-0.010
E1 0.250 0.250 0.250 0.250 0.250 ±0.005 2
e 0.100 0.100 0.100 0.100 0.100 Basic
eA 0.300 0.300 0.300 0.300 0.300 Basic
eB 0.345 0.345 0.345 0.345 0.345 ±0.025
L 0.125 0.125 0.125 0.125 0.125 ±0.010
N 8 14 16 18 20 Reference
Rev. C 2/07
NOTES:
1. Plastic or metal protrusions of 0.010” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions E and eA are measured with the leads constrained perpendicular to the seating plane.
4. Dimension eB is measured with the lead tips unconstrained.
5. 8 and 16 lead packages have half end-leads as shown.
D
L
A
eb
A1
NOTE 5
A2
SEATING
PLANE
L
N
PIN #1
INDEX
E1
12 N/2
b2
E
eB
eA
c
23 FN7177.2
March 31, 2011
EL5144, EL5146, EL5244, EL5246, EL5444
Mini SO Package Family (MSOP)
1
(N/2)
(N/2)+1
N
PLANE
SEATING
N LEADS
0.10 C
PIN #1
I.D.
E1E
b
DETAIL X
3° ±3°
GAUGE
PLANE
SEE DETAIL "X"
c
A
0.25
A2
A1 L
0.25 C A B
D
A
M
B
e
C
0.08 C A B
M
H
L1
MDP0043
MINI SO PACKAGE FAMILY
SYMBOL
MILLIMETERS
TOLERANCE NOTESMSOP8 MSOP10
A1.101.10 Max. -
A1 0.10 0.10 ±0.05 -
A2 0.86 0.86 ±0.09 -
b 0.33 0.23 +0.07/-0.08 -
c0.180.18 ±0.05 -
D 3.00 3.00 ±0.10 1, 3
E4.904.90 ±0.15 -
E1 3.00 3.00 ±0.10 2, 3
e0.650.50 Basic -
L0.550.55 ±0.15 -
L1 0.95 0.95 Basic -
N 8 10 Reference -
Rev. D 2/07
NOTES:
1. Plastic or metal protrusions of 0.15mm maximum per side are not
included.
2. Plastic interlead protrusions of 0.25mm maximum per side are
not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
24
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN7177.2
March 31, 2011
EL5144, EL5146, EL5244, EL5246, EL5444
Quarter Size Outline Plastic Packages Family (QSOP)
0.010 CAB
SEATING
PLANE
DETAIL X
EE1
1(N/2)
(N/2)+1
N
PIN #1
I.D. MARK
b
0.004 C
c
A
SEE DETAIL "X"
A2
4°±4°
GAUGE
PLANE
0.010
L
A1
D
B
H
C
e
A
0.007 CAB
L1
MDP0040
QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY
SYMBOL
INCHES
TOLERANCE NOTESQSOP16 QSOP24 QSOP28
A 0.068 0.068 0.068 Max. -
A1 0.006 0.006 0.006 ±0.002 -
A2 0.056 0.056 0.056 ±0.004 -
b 0.010 0.010 0.010 ±0.002 -
c 0.008 0.008 0.008 ±0.001 -
D 0.193 0.341 0.390 ±0.004 1, 3
E 0.236 0.236 0.236 ±0.008 -
E1 0.154 0.154 0.154 ±0.004 2, 3
e 0.025 0.025 0.025 Basic -
L 0.025 0.025 0.025 ±0.009 -
L1 0.041 0.041 0.041 Basic -
N 16 24 28 Reference -
Rev. F 2/07
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not
included.
2. Plastic interlead protrusions of 0.010” maximum per side are not
included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.