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ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. FDMC86340 N-Channel Shielded Gate Power Trench(R) MOSFET 80 V, 48 A, 6.5 m Features General Description Shielded Gate MOSFET Technology This N-Channel MOSFET is produced using Fairchild Semiconductor's advanced PowerTrench(R) process that incorporates Shielded Gate technology. This process has been optimized for the on-state resistance and yet maintain superior switching performance. Max rDS(on) = 6.5 m at VGS = 10 V, ID = 14 A Max rDS(on) = 8.5 m at VGS = 8 V, ID = 12 A High performance technology for extremely low rDS(on) Termination is Lead-free Application RoHS Compliant DC-DC Conversion Pin 1 Pin 1 S D D D Top S S S D S D S D G D G D Bottom Power 33 MOSFET Maximum Ratings TA = 25 C unless otherwise noted Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage Drain Current ID -Continuous TC = 25 C -Continuous TA = 25 C -Pulsed Single Pulse Avalanche Energy EAS PD TJ, TSTG Power Dissipation TC = 25 C Power Dissipation TA = 25 C Ratings 80 Units V 20 V 48 (Note 1a) 14 (Note 4) 200 (Note 3) 216 54 (Note 1a) Operating and Storage Junction Temperature Range 2.3 -55 to +150 A mJ W C Thermal Characteristics RJC Thermal Resistance, Junction to Case RJA Thermal Resistance, Junction to Ambient (Note 1) 2.3 (Note 1a) 53 C/W Package Marking and Ordering Information Device Marking FDMC86340 Device FDMC86340 (c)2013 Fairchild Semiconductor Corporation FDMC86340 Rev. C2 Package Power33 1 Reel Size 13 '' Tape Width 12 mm Quantity 3000 units www.fairchildsemi.com FDMC86340 N-Channel Shielded Gate Power Trench(R) MOSFET January 2014 Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 A, VGS = 0 V BVDSS TJ Breakdown Voltage Temperature Coefficient ID = 250 A, referenced to 25 C IDSS Zero Gate Voltage Drain Current VDS = 64 V, VGS = 0 V 1 A IGSS Gate to Source Leakage Current VGS = 20 V, VDS = 0 V 100 nA 4.0 V 80 V 46 mV/C On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 A VGS(th) TJ Gate to Source Threshold Voltage Temperature Coefficient ID = 250 A, referenced to 25 C VGS = 10 V, ID = 14 A 5.0 6.5 rDS(on) Static Drain to Source On Resistance VGS = 8 V, ID = 12 A 6.0 8.5 VGS = 10 V, ID = 14 A, TJ = 125 C 8.5 11 VDD = 10 V, ID = 14 A 36 gFS Forward Transconductance 2.0 3.4 -10 mV/C m S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance VDS = 40 V, VGS = 0 V, f = 1 MHz 0.1 2775 3885 pF 468 655 pF 15 25 pF 0.7 2.1 Switching Characteristics td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time tf Fall Time VDD = 40 V, ID = 14 A, VGS = 10 V, RGEN = 6 Qg(TOT) Total Gate Charge VGS = 0 V to 10 V Qg(TOT) Total Gate Charge VGS = 0 V to 8 V Qgs Gate to Source Charge Qgd Gate to Drain "Miller" Charge Qoss Output Charge VDD = 40 V, ID = 14 A 20 32 ns 7.9 16 ns 23 37 ns 5.1 10 ns 38 53 nC 31 44 14 VDD = 40 V, VGS = 0 V nC nC 8.0 nC 42 nC Drain-Source Diode Characteristics VSD Source to Drain Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = 14 A (Note 2) 0.8 1.3 VGS = 0 V, IS = 1.9 A (Note 2) 0.7 1.2 V 41 66 ns 25 40 nC IF = 14 A, di/dt = 100 A/s V Notes: 1. RJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RJC is guaranteed by design while RCA is determined by the user's board design. a. 53 C/W when mounted on a 1 in2 pad of 2 oz copper b. 125 C/W when mounted on a minimum pad of 2 oz copper SS SF DS DF G SS SF DS DF G 2. Pulse Test: Pulse Width < 300 s, Duty cycle < 2.0%. 3. EAS of 216 mJ is based on starting TJ = 25 C, L = 3 mH, IAS = 12 A, VDD = 80 V, VGS = 10 V. 100% test at L = 0.1 mH, IAS = 37 A. 4. Pulsed Id limited by junction temperature, td<=100 S, please refer to SOA curve for more details. (c)2013 Fairchild Semiconductor Corporation FDMC86340 Rev. C2 2 www.fairchildsemi.com FDMC86340 N-Channel Shielded Gate Power Trench(R) MOSFET Electrical Characteristics TJ = 25 C unless otherwise noted 200 5 ID, DRAIN CURRENT (A) VGS = 10 V NORMALIZED DRAIN TO SOURCE ON-RESISTANCE PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX 160 VGS = 8 V 120 VGS = 7 V 80 VGS = 6.5 V 40 VGS = 6 V 0 0 1 2 3 VDS, DRAIN TO SOURCE VOLTAGE (V) VGS = 6 V 4 VGS = 6.5 V 3 VGS = 7 V 2 VGS = 8 V 1 0 4 0 80 120 160 200 Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 50 ID = 14 A VGS = 10 V 1.8 rDS(on), DRAIN TO 1.6 1.4 1.2 1.0 0.8 0.6 -75 SOURCE ON-RESISTANCE (m) 2.0 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 40 ID, DRAIN CURRENT (A) Figure 1. On-Region Characteristics PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX 40 ID = 14 A 30 20 TJ = 125 oC 10 TJ = 25 oC 0 -50 -25 0 25 50 75 100 125 150 5 TJ, JUNCTION TEMPERATURE (oC) IS, REVERSE DRAIN CURRENT (A) PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX 160 VDS = 5 V 120 80 TJ = 25 oC 40 TJ = -55 oC 0 3 4 5 6 7 8 9 200 100 8 9 10 10 VGS = 0 V 10 1 TJ = 150 oC 0.1 TJ = 25 oC 0.01 TJ = -55 oC 0.001 0.0 VGS, GATE TO SOURCE VOLTAGE (V) 0.3 0.6 0.9 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics (c)2013 Fairchild Semiconductor Corporation FDMC86340 Rev. C2 7 Figure 4. On-Resistance vs Gate to Source Voltage 200 TJ = 150 oC 6 VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized On- Resistance vs Junction Temperature ID, DRAIN CURRENT (A) VGS = 10 V PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX Figure 6. Source to Drain Diode Forward Voltage vs Source Current 3 www.fairchildsemi.com FDMC86340 N-Channel Shielded Gate Power Trench(R) MOSFET Typical Characteristics TJ = 25 C unless otherwise noted 10000 ID = 14 A Ciss VDD = 30 V 8 VDD = 40 V CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) 10 6 VDD = 50 V 4 1000 Coss 100 10 2 0 0 8 16 24 32 Crss f = 1 MHz VGS = 0 V 1 0.1 40 Figure 7. Gate Charge Characteristics 80 80 ID, DRAIN CURRENT (A) TJ = 25 oC 10 TJ = 100 oC TJ = 125 oC 60 VGS = 10 V 40 Limited by Package VGS = 8 V 20 o RJC = 2.3 C/W 1 0.001 0.01 0.1 1 10 0 25 100 50 0.1 0.01 P(PK), PEAK TRANSIENT POWER (W) 100 s 1 ms THIS AREA IS LIMITED BY rDS(on) SINGLE PULSE TJ = MAX RATED RJA = 125 oC/W TA = 25 oC 0.001 0.01 0.1 CURVE BENT TO MEASURED DATA 1 10 10 ms 100 ms 1s 10 s DC 100 400 150 2000 1000 100 10 1 SINGLE PULSE RJA = 125 oC/W TA = 25 oC 0.1 -4 10 -3 10 -2 10 -1 10 1 100 10 1000 t, PULSE WIDTH (sec) VDS, DRAIN to SOURCE VOLTAGE (V) Figure 11. Forward Bias Safe Operating Area (c)2013 Fairchild Semiconductor Corporation FDMC86340 Rev. C2 125 Figure 10. Maximum Continuous Drain Current vs Case Temperature 300 100 1 100 TC, CASE TEMPERATURE ( C) Figure 9. Unclamped Inductive Switching Capability 10 75 o tAV, TIME IN AVALANCHE (ms) ID, DRAIN CURRENT (A) 10 Figure 8. Capacitance vs Drain to Source Voltage 60 IAS, AVALANCHE CURRENT (A) 1 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 12. Single Pulse Maximum Power Dissipation 4 www.fairchildsemi.com FDMC86340 N-Channel Shielded Gate Power Trench(R) MOSFET Typical Characteristics TJ = 25 C unless otherwise noted r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 2 1 0.1 0.01 0.001 0.0001 -4 10 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 NOTES: ZJA(t) = r(t) x RJA SINGLE PULSE -3 10 RJA = 125 C/W Peak TJ = PDM x ZJA(t) + TA Duty Cycle, D = t1 / t2 -2 10 -1 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 13. Junction-to-Ambient Transient Thermal Response Curve (c)2013 Fairchild Semiconductor Corporation FDMC86340 Rev. C2 5 www.fairchildsemi.com FDMC86340 N-Channel Shielded Gate Power Trench(R) MOSFET Typical Characteristics TJ = 25 C unless otherwise noted 3.40 3.20 PKG CL 8 2.37 MIN A (0.45) 8 B 5 PKG CL 3.40 3.20 PKG CL SYM CL 5 2.15 MIN (0.40) (0.65) 0.70 MIN PIN 1 INDICATOR 1 4 1 4 0.65 1.95 SEE DETAIL A 0.42 MIN (8X) LAND PATTERN RECOMMENDATION 1.95 0.10 C A B 0.37 (8X) 0.27 0.65 1 4 0.50 0.30 PKG CL 2.05 1.85 5 8 (0.34) (0.52 TYP) (0.33) TYP (2.27) 0.10 C 0.80 0.70 0.08 C 0.25 0.15 0.05 0.00 C SEATING PLANE SCALE: 2X NOTES: UNLESS OTHERWISE SPECIFIED A) PACKAGE STANDARD REFERENCE: JEDEC MO-240, ISSUE A, VAR. BA, DATED OCTOBER 2002. B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE BURRS OR MOLD FLASH. MOLD FLASH OR BURRS DOES NOT EXCEED 0.10MM. D) DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994. E) DRAWING FILE NAME: PQFN08HREV1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor's product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. "Typical" parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 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