KA3842B/3B/4B/5B SMPS CONTROLLER CURRENT-MODE PWM CONTROLLERS The KA3842B/3B/4B/5B are PWM controller. They are specially designed for Off - Line and DC-to-DC converter applications with minimal external components. These integrated circuits feature a trimmed oscillator for precise duty cycle control, a temperature com- pensated reference, high gain error amplifier. current sensi- ng comparator, and a high current totempole output Ideally suited for driving a power MOSFET. Protection circuity Includes built in under-voltage lockout and current limiting. The KA3842B and KA3844B have UVLO thresholds of 16V (on) and 10V (off) The KA3843B and KA3845B are 8.5V (on) and 7.9V (off) The KA3842B and KA3843B can operate within 100% duty cycle. The operate with 50% duty cycle. FEATURES Low Start Up Current Maximum Duty Clamp UNV Lockout With Hysteresis * Operating Frequency Up To 500KHz BLOCK DIAGRAM fixed frequency current-mode 8 DIP KA3844B and KA3845B can 14 SOP ORDERING INFORMATION Device Package Operating Temperature KA384XB 8 DIP 0~+70T KA384XBD 14 SOP 0~+70C Voc (12) Vrer(14) x 8 INTERNAL BIAS Vee (3) @) COMP (1) CURRENT SENSE (5) ' LOGLS V2 Vrer 3 RyfCr (7) *( 1S 148016 OSCILLATOR PIN NO *TOGGLE FLIP FLOP USED ONLY IN KA3844B, KA38458 ! 7) 3V GND (9) 5V SET VREF RESET UVLO. PWA VG (11) OUTPUT (10) PWR GND (8) ee FAIRCHILD SEMICONDUCTOR 1 999 Fairchild Semiconductor Corporation Rev. BKA3842B/3B/4B/5B SMPS CONTROLLER ABSOLUTE MAXIMUM RATINGS Characteristic Symbol Value Unit Supply Voltage Vec 30 Vv Output Current lo t 1 A Analog Inputs (Pin 2.3) Viana) -0.3 to 6.3 Vv Error Amp Output Sink Current Isink (B.A) 10 mA Power Dissipation (Ta = 25C) Pp 1 WwW ELECTRICAL CHARACTERISTICS (" Vec=15V, Rr=10K2 , C7=3.3nF, Ta= OT to +70, unless otherwise specified) Characteristic Symbol Test Conditions Min Typ Max Unit REFERENCE SECTION Reference Output Voltage VreF Ty =25C, Irep = 1MA 4.90 5.00 5.10 Vv Line Regulation A Vrer 12VS Vecs 25V 6 20 mV Load Regulation A Vrer | 1MAS lIperS 20MA 6 25 mV Short Circuit Output Current Isc Ta =25C -100 -180 mA OSCILLATOR SECTION Oscillation Frequency f Ty =25C 47 52 57 KHz Frequency Change with Voltage | A f/A Vec}] 12VS VecS 25V 0.05 1 % Oscillator Amplitude Viosc) 1.6 Vep ERROR AMPLIFIER SECTION Input Bias Current Ibias -0.1 -2 HA Input Voltage Viera) Vi = 2.5V 2.42 2.50 2.58 Vv Open Loop Voltage Gain Gvo 2Vs Vos 4V 65 90 dB Power Supply Rejection Ratio PSRR 12VS Vecs 25V 60 70 dB Output Sink Current Isink Ve =2.7V,V1i=1.1V 2 7 mA Output Source Current Isounce | Ve=2.3V, Vi=5V -0.6 -1.0 mA High Output Voltage Vou V2 = 2.3V, RL=15K2 toGND 5 6 Vv Low Output Voltage VoL V2=2.7V, RL=15K2_ to Pin8 0.8 11 Vv CURRENT SENSE SECTION Gain Gy (Note 1 & 2) 2.85 3 3.15 VN Maximum Input Signal Viawax) Vi = 5V(Note 1) 0.9 1 1 Vv Power Supply Rejection Ratio PSRR_ | 12V< Vocc< 25V (Note 1) 70 dB Input Bias Current Ibias -3 -10 HA _ FAIRCHILD Lr ep SEMICONDUCTORKA3842B/3B/4B/5B SMPS CONTROLLER ELECTRICAL CHARACTERISTICS (Continued) (* Vec=15V, Rt=10K2 , Cr=3.3nF, Ta=0'C to+70 unless otherwise specified) Characteristic | Symbol | Test Conditions | Min Typ Max | Unit OUTPUT SECTION Low Output Voltage Voi isin = 20mA 0.08 o4 V Isink = 200mA 1.4 2.2 Vv High Output Voltage Vou lsounce = 20mA 18 138 V lsourcE = 200mA 12 13.0 Vv Rise Time tr Ty = 25, C= 1nF (Note 3) 45 150 ns Fall Time tr Ty = 25, Ci= 1nF (Note 3) 35 150 ns UNDER-VOLTAGE LOCKOUT SECTION KA3842B/44B 14.5 16.0 17.5 Vv Start Threshold VoHisT) KA3843B/45B 78 8.4 9.0 Vv Min. Operating Voltage Vorrminy | KA3842B/44B 8.5 10.0 11.5 Vv (After Turn On) KA3843B/45BG 7.0 7.6 8.2 Vv PWM SECTION KA3842B/43B 95 97 100 % Max. Duty Cycle Dine 1K A38448/45B 47 48 50 % Min. Duty Cycle Dein) 0 % TOTAL STANDBY CURRENT Start-Up Current Ist 0.45 1 mA Operating Supply Current locorry V3=V2=ON 14 17 mA Zener Voltage Vz Ice = 25mMA 30 38 Vv Adjust Vec above the start threshould before setting at 15V Note 1. Parameter measured at trip point of latch 2. Gain defined as: A= 7 AM A V3 3.These parameters, although guaranteed, are not 100% tested in production. , 0S V3S 0.8V ee FAIRCHILD ee SEMICONDUCTORKA3842B/3B/4B/5B SMPS CONTROLLER Fig. 1 Open Loop Test Circuit > oO 2N 47K 2202 7 Mi EIA 1K ADJUST ng 7 TRAW isense T ADJUST a 4.7K QUTPUT 77 High peak currents associated with capacitive loads necessitate careful grounding techniques Timing and bypass capacitors should be connected close to pin 5 in a single point ground. The transistor and 5K2 potentiometer are used to sample the oscillator waveform and apply an adjustable ramp to pin 3. Fig. 2 Under Voltage Lockout ON/OFE COMMAND loc TO REST OF IC KAG842B/48]KA3B43B/58) 4.4 | Vox | 18 B4V Vor] 10V 7.6V <1maA Vee Vore You During Under-Voltage Lock-Out, the output driver is biased to a high impedance state. Pin 6 should be shunted to ground with a bleeder resistor to prevent activating the power switch with output leakage current. Fig. 3 Error Amp Configuration 2.5V Error amp can source or sink up to 0.5mA ee FAIRCHILD SEMICONDUCTORKA3842B/3B/4B/5B SMPS CONTROLLER Fig. 4 Current Sense Circuit ERROR 2R R W CURRENT SENSE CURRENT COMPARATOR SENSE Peak current (Is) is determined by the formula: Ig(max) = 1a iS A small RC filter may be required to suppress switch transients. Fig. 5 Oscillator Waveforms and Maximum Duty Cycle LARGE Rr SMALL Cr Va [ l J l INTERNAL CLOCK SMALL Rr LARGE Rr /L\y V6 TLS $L wrernar crocx Oscillator timing capacitor, Cr, is charged by Vrer through Rr, and discharged by an internal current source. During the discharge time, the internal clock signal blanks the output to the low state. Selection of Rr and Cy therefore deter- mines both oscillator frequency and maximum duty cycle. Charge and discharge times are determined by the formulas: te = 0.55 Ry Cr 0.0063 Ry-2.7 to=RrCrin (Oo063Rr4 ) Frequency, then, is: f=(te + ta)" 18 Rr Cr For RT>5kKQ , f= ee FAIRCHILD ee SEMICONDUCTORKA3842B/3B/4B/5B SMPS CONTROLLER Fig. 6 Oscillator Dead Time & Frequency DEADTIME vs CT (RT>5K) Fig. 7 Timing Resistance vs Frequency 30 100 ta (us) Rr (KQ) 3 \ 7 aoa . VAAN 1 2.2 47 10 22 A? 100 100 1K 40K 100K 4M FREQUENCY (Hz) Fig. 8 Shutdown Techniques compe SHUTDOWN TO CURRENT (7 SENSE-RESIST IR Shutdown of the KA3842B can be accomplished by two methods; either raise pin 3 above 1V or pull pin 1 below a voltage two diode drops above ground. Either method causes the output of the PWM comparator to be high (refer to block diagram). The PWM latch is reset dominant so that the output will remain low until the next clock cycle after the shutdown condition at pins 1 and/or 3 is removed. In one example, an externally latched shutdown may be accomplished by adding an SOR which will be re- set by cycling Voc below the lower UVLO threshold. At this point the reference turns off, allowing the SCR to reset. SHUTDOWN O Fig. 9 Slope Compensation KA38426/3B _ m4 | | ISENSE . v LI 1 zr Rsense tf / A fraction of the oscillator ramp can be resistively summed with the current sense signal to provide slope compensation for co- nverters requiring duty cycles over 50%. IseNsE Note that capacitor, C, forms a filter with R2 to suppress the leading edge switch spikes. ee FAIRCHILD Lr ep SEMICONDUCTORKA3842B/3B/4B/5B SMPS CONTROLLER Pig. 10 TEMPERATURE DRIFT (Vref) Fig. 11 TEMPERATURE DRIFT (ist) KA3842B KA3B42B 5.02 | 550 Veo = 18 (V) Voc=9 (V} 5.01 FN lo=1 (mA) 500 \ ove \ 7 \ S z i 4.99 \ = 40 \ , \ : \ 4.98 N 350 X 4.97 \ 300 NS - 50 - 25 oO 25 50 75 100 425 150 - 5 ~25 25 50 75 400 125 150 TEMPERATURE (C) TEMPERATURE (C) Fig. 12 TEMPERATURE DRIFT (Icc) KA3842B 1 Vec= 15] fo=1 (mA) 14 NY 3 IN 2 N 2 NA 12 N\ ahi N 10 ~0 ~25 o 26 60 7 100 6125 150 TEMPERATURE (C) ee FAIRCHILD Lr ep SEMICONDUCTOR TEMP ERAT URE (c) TEMP ERAT URE (Cc)TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. 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