DFE-T V2.1
Quad ISDN 4B3T Echocanceller
Digital Front End
PEF 24901 Version 2.1
Delta Sheet, DS 2, June 2001
Wired
Communications
Never stop thinking.
Edition 2001-06-22
Published by Infineon Technologies AG,
St.-Martin-Strasse 53,
D-81541 München, Germany
© Infineon Technologies AG 2001.
All Rights Reserved.
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be endangered.
Wired
Communications
DFE-T V2.1
Quad ISDN 4B3T Echocanceller
Digital Front End
PEF 24901 Version 2.1
Delta Sheet, DS 2, June 2001
Never stop thinking.
For questions on technology, delivery and prices please contact the Infineon
Technologies Offices in Germany or the Infineon Technologies Companies and
Representatives worldwide: see our webpage at http://www.infineon.com
PEF 24901
Revision History: 2001-06-22 DS 2
Previous Version: 03.99 DS 1
Major changes since last revision:
- added table with specified power consumption
- Pinning
– changed pin16: MTO functionality is not supported
– new on pin 45: SLOT1 selection
– changed pin 49: functionility not required
– changed pin 55: renamed SLOT0
- Removed ’Exchange of Transparent Messages’: not supported
- BER description refined (zeros must be sent by the user)
- C/I-Command LTD will be supported in V2.1 (same function as in V1.2)
- Slightly optimized statemachine
- Coefficients are not retrievable
- Version update of the boundary scan IDCODE Register
- MON-8 AID version identification
- Recognition delay of C/I-changes
- MON-8 message in state ’Reset’
- C/I-channel indication in hardware reset
- Hardware reset execution
PEF 24901
Table of Contents Page
Delta Sheet 2001-06-22
1 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3 MON-12 Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
4 Bit Error Rate Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
5 Digital Local Loops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
6 LT Mode Only . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
7 C/I Channel Command Coding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
8 C/I Code ’HI’ omitted . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
9 State Machine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
10 Retrieving Coefficients . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
11 Boundary Scan Instruction Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
12 Version Update of the Boundary Scan IDCODE Register . . . . . . . . . . 12
13 MON-8 AID Version Identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
14 Recognition Delay of C/I-Code Changes . . . . . . . . . . . . . . . . . . . . . . . . 13
15 MON-8 Messages in State ’Reset’ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
16 C/I-Channel Indication in Hardware Reset . . . . . . . . . . . . . . . . . . . . . . 13
17 Hardware Reset Execution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Quad ISDN 4B3T Echocanceller Digital Front End
DFE-T V2.1
PEF 24901 Version 2.1
Delta Sheet 1 2001-06-22
This Delta Sheet lists the add-on features and differences between the DFE-T V2.1
and the DFE-T V1.2.
1 Power Supply
The DFE-T V2.1 requires a +3.3V ±0.3V power supply. The inputs and outputs remain
5V TTL compatible.
2 Pinning
Table 2 lists the changes that were made concerning the pinning, Table 3 specifies new
pin functions that were introduced with version 2.1.
Table 1 Power Consumption
Mode Typ. values Max. values Unit Test conditions
Power-up
all Channels
85 100 mA 3.3 V, open outputs,
inputs at VDD /VSS
Power-down 35 t.b.d. mA 3.3 V, open outputs,
inputs at VDD /VSS
Table 2 Pinning Changes
Pin No. V2.1 V1.2 Comment
32 PUP SLOT2 additional push-pull mode for pin
DOUT eases interface adaption,
SLOT2 was not used in V1.2
45 SLOT1 N.C. increased max data rate (4 MBit/s)
requires an additional SLOT pin
49 N.C. TP3 no function
PEF 24901
Delta Sheet 2 2001-06-22
53 N.C. LT as in V1.x LT-RP mode is not
supported in V2.1
55 SLOT0 SLOT renamed
56 SSP TSP dedicated pin for ’Send Single
Pulses’ test mode
62 DT TP2 dedicated pin for ’Data Through’
test mode
63 TRST TP1 BScan power-on-reset is replaced
by a dedicated reset line
Table 3 Pin Definitions and Functions
Pin No. Symbol Input (I)
Output (O)
Function
32 PUP I
(PD)
Push Pull Mode
in push pull mode ’0’ and ’1’ is actively driven
during an occupied time-slot, outside the
active time-slots DOUT is high impedance
(tristate)
’1’= configures DOUT as push/pull output
’0’= configures DOUT as open drain output
55 SLOT0 I IOM®-2 Channel Slot Selection 0
assigns IOM®-2 channels in blocks of 4
SLOT1, 0:
’00’= IOM®-2 channels 0 to 3
’01’= IOM®-2 channels 4 to 7
’10’= IOM®-2 channels 8 to 11
’11’= IOM®-2 channels 12 to 15
45 SLOT1 I
(PD)
IOM®-2 Channel Slot Selection 1
assigns IOM®-2 channels in blocks of 4
49 N.C. - No function
May be clamped to GND for compatibility to
former versions
Table 2 Pinning Changes
Pin No. V2.1 V1.2 Comment
PEF 24901
Delta Sheet 3 2001-06-22
PU: Pull Up: typ 100µA
PD: Pull Down: typ 100µA
53 N.C. - No function
May be clamped to VDD for compatibility to
former versions
56 SSP I Send Single Pulses (SSP) Test Mode
enables/disables SSP test mode
’1’= SSP test mode enabled,
+1 pulses are issued at the four line ports in
1ms intervals
’0’= SSP test mode disabled
62 DT I Data Through (DT) Test Mode
enables/disables DT test mode
’1’= DT test mode enabled,
the U-transceiver is forced on all line ports to
enter the ’Transparent’ state
’0’= DT test mode disabled
63 TRST I
(PU)
JTAG Boundary Scan Disable
resets the TAP controller state machine
(asynchronous reset), internal pullup
’1’= reset inactive
’0’= reset active
Table 3 Pin Definitions and Functions
Pin No. Symbol Input (I)
Output (O)
Function
PEF 24901
Delta Sheet 4 2001-06-22
Figure 1 Pin Diagram of the DFE-T V2.1
3 MON-12 Protocol
MON-12 commands feature direct access to the device internal register map via the
IOM®-2 Monitor channel. The MON-12 protocol works in the manner of a serial
microprocessor interface.
New functions such as digital local loopbacks, BER measurement etc. are only
accessible via MON-12 commands. Functions that were so far provided via MON-8
commands, e.g. RDS counter status retrieval, can be accessed as well via the MON-12
protocol. For a detailed description of the register set please refer to the data sheet of
the DFE-T V2.1.
4 Bit Error Rate Measurement
For bit error rate monitoring the DFE-T V2.1 features an 16-bit Bit Error Rate counter
(BERC) per line. As soon as the BER function is enabled, the user must send zeros in
TRST
DT
CLS3
RES
N.C.
N.C.
SSP
SLOT0
VDD
N.C.
CLS2
D3D
D2D
N.C.
VSS
TCK
P-MQFP-64
1 2 3 4 5 6 7 8 9 10 11 12 14 15 1613
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
TMS
TDI
TDO
CL15
SDR
VDD
PDM3
PDM2
VSS
PDM1
PDM0
DCL
FSC
DIN
DOUT
N.C.
pinning.vsd
3334353637383940414243
45464748
D2A
D3A
D0B
N.C.
D1B
VDD
D2B
D3B
VSS
D0C
SLOT1
D3C
D0D
D1D
44
D1C
D2C
PUP
17
18
20
19
21
22
23
24
25
26
27
28
29
30
31
32
CLS1
ST21
VSS
ST01
D1A
D0A
CLS0
ST00
ST10
ST11
ST30
ST31
SDX
ST20
VDD
PEF 24901
Delta Sheet 5 2001-06-22
the selected channels and incoming ones are counted until the BER function has been
disabled again by the user.
5 Digital Local Loops
Besides the remote loopback stimulation and the local analog loopback (C/I= ARL) the
DFE-T V2.1 features digital local loopbacks via its internal register set. The loopbacks
that are additionally available with the internal LOOP register are shown in Figure 2. The
local loops LB1, LB2 and LBBD can be activated at any time independent of the current
activation status using the MON-12 protocol. Before loop DLB may be closed, the DFE-
T must be in a transparent state, e.g. by applying C/I-command ’Data Through DT’.
PEF 24901
Delta Sheet 6 2001-06-22
Figure 2 Loopbacks Featured by Register LOOP
IOM
®
-2
DSP
Echo
Canceller
+
SyncWord
Activation/ Deactivation
Controller
Layer-1 Controller
Timing
Recovery
SIU
DFE-T V2.1
System
Interface
Unit
Scrambler
4B3T
Coder
U De-
Framing
De-
Scrambler
U
Framing
M
U
X
M
U
X
A
G
C
Equalizer
PDM
Filter
LOOP.LB1=1 or
LOOP.LB2=1 or
LOOP.LBBD= 1
&
LOOP.U/IOM=
1
LOOP.LB1=1 or
LOOP.LB2=1 or
LOOP.LBBD= 1
&
LOOP.U/IOM=
0
4B3T
Decoder
IOM
®
-2
DSP
Echo
Canceller
+
SyncWord
Activation/ Deactivation
Controller
Layer-1 Controller
Timing
Recovery
SIU
DFE-T V2.1
loopreg.vsd
System
Interface
Unit
Scrambler
4B3T
Coder
U De-
Framing
De-
Scrambler
U
Framing
M
U
X
M
U
X
LOOP.DLB= 1
A
G
C
Equalizer
PDM
Filter
4B3T
Decoder
PEF 24901
Delta Sheet 7 2001-06-22
6 LT Mode Only
The DFE-T V2.1 operates only in LT mode. LT-RP mode is not supported.
7 C/I Channel Command Coding
C/I code mnemonics were adapted to the 2B1Q notation for consistency reasons. The
coding has been retained unchanged. Table 4 presents all defined C/I codes. The former
C/I code names of the DFE-T V1.2 are given in brackets.
Table 4 Command / Indicate Codes (4B3T)
•
Code LT-Mode
DIN DOUT
0000 DR –
0001 –DEAC(DA)
0010 ––
0011 LTD – (HI)
0100 –RSY (RSYU)
0101 SSP –
0110 DT(TEST) –
0111 –UAI(RDS)
1000 AR(ARN) AR(ARU)
1001 AR1 –
1010 AR2 –
1011 AR4 –
1100 –AI(AIU)
1101 RES –
1110 ––
1111 DC(DID) DI(DIU)
AI Activation Indication DR Deactivation Request
AR Activation Request LTD LT Disable
AR1 Activation Request Local Loop RES Reset
AR2 Activation Request Loop 2 RSY Resynchronization Indication
AR4 Activation Request Loop 4 SSP Send-Single-Pulses
PEF 24901
Delta Sheet 8 2001-06-22
8 C/I Code ’HI’ omitted
The C/I indication ’HI’ is no more supported.
9 State Machine
Some minor changes were made regarding the state machine, e.g. the notation was
aligned to that of 2B1Q for consistency reasons. The improvements are summarized and
listed in Table 5. See also the state diagrams in Figure 3 (V2.1) and Figure 4 (V1.2).
DC Deactivation Confirmation DT Data Through Mode
DEAC Deactivation Accepted UAI U Activation Indication
DI Deactivation Indication.
PEF 24901
Delta Sheet 9 2001-06-22
Figure 3 State Diagram of V2.1
Start Awaking Uk0
AR
Synchronizing
AR
Link to TE Synch.
UAI / RSY
Wait 1ms
UAI / RSY
Transparent
AI / RSY
ANY STATE
Reset
DEAC
Uk0 Synch. no TE?
Sending Awake-Ack.
AR
Deactivating
DEAC
AR, AR1,
AR2, AR4
DC AR1
(T05E & U0)
DR
AWR
DR
DR
DR
AWR
DR
U1
DR
DR
DR
AR1, DR
RES, Pin RES
(U3 | AR1)
AWT
AWT
(T12E & /AR1)
(T12E & AR1)
(AWR & /AR1)
U3
DR
DR
Deactivated
DI
Deac. Acknowledge
DI
Awake Signal Sent
AR
Ack. Sent / Received
AR
T12S
U0
U0
T05S
T7S
T12S
T12S
T7S
T7E
T1S
T1E
T1S
T1E
T7S
T1S
U2W
U0
U0
U2
U4H
U4
U4
U0
U2
U2W
U0
Test
DEAC
SP / U0
SSP, Pin-SSP
LTD
AR1, DR
AR, AR1,
AR2, AR4
T12S
DT, Pin-DT
LT_SM_4B3T_cus.emf
UAI / RSY
PEF 24901
Delta Sheet 10 2001-06-22
Figure 4 State Diagram of V1.2
PEF 24901
Delta Sheet 11 2001-06-22
10 Retrieving Coefficients
Coefficients are not retrievable by MON-8 commands. The corresponding MON-8
commands are no more supported.
Table 5 Differences to LT-SM of DFE-T V1.2
No. V1.2 State/
Signal
Change in V2.1 Comment
1. ’Maintenance’
State
split into two states
- Reset State
- Test State
defined reset and test states
transition with C/I-code
’AR1’: new: from state
’Reset’ or ’Test’ to state
’Deactivating’
old: to state ’Start Awaking
Uk0’: no more supported
simplifies SM implementation
2. Any State transition condition PFOFF&
/ARL doesn’t exist any more
no support of the IEC type power
controller interface
3. State
’Data
Transmission’
renamed to state
’Transparent’
consistency to 2B1Q coding
4. State ’Power
Down’
renamed to state
’Deactivated’
5. Renamed C/I
codes
old -> new
ARN -> AR
ARL -> AR1
AIU -> AI
DA -> DEAC
DID -> DC
DIU -> DI
RSYU -> RSY
TEST -> DT
RDS -> UAI
6. C/I code HI C/I codes ’HI’ omitted
7. Timer
variables
introduced
Name Duration
T05 0.5ms
T1 1.0ms
T7 7.0ms
T12 12.0ms
PEF 24901
Delta Sheet 12 2001-06-22
11 Boundary Scan Instruction Set
The Boundary-Scan instructions ’CLAMP’ and ’HIGHZ’ are introduced in version 2.1.
The instruction ’SSP’ is omitted since this test function can be triggered either by pin
’SSP’ or channel selective by C/I ’SSP’.
CLAMP allows the state of the signals included in the boundary scan driven from the
PEB 24901 to be determined from the boundary scan register while the bypass register
is selected as the serial path between TDI and TDO. These output signals driven from
the DFE-T V2.1 will not change while CLAMP is selected.
HIGHZ sets all output pins included to the boundary scan path into a high impedance
state. In this state, an in-circuit test system may drive signals onto the connections
normally driven by the DFE-T V2.1 outputs without incurring the risk of damage to the
DFE-T V2.1.
Table 6 TAP Controller Instructions:
12 Version Update of the Boundary Scan IDCODE Register
13 MON-8 AID Version Identification
On receiving the MON-8 Command RID the DFE-T responds with the MONITOR
message AID coded 8008H .
This code is unique for version 2.1 with respect to other DFE-T versions
Code Instruction Function
0000 EXTEST External testing
0001 INTEST Internal testing
0010 SAMPLE/PRELOAD Snap-shot testing
0011 IDCODE Reading ID code
0100 CLAMP Reading outputs
0101 HIGHZ Z-State of all boundary scan output pins
11XX BYPASS Bypass operation
Version Device Code Manufacturer Code Output
0001 0000 0000 0110 0111 0000 1000 001 1 --> TDO
PEF 24901
Delta Sheet 13 2001-06-22
14 Recognition Delay of C/I-Code Changes
The DFE-T V2.1 has implemented a new architecture for low power consumption.
Furthermore it is developed for complete compatibility in MONITOR and C/I messages.
The new architecture , however, leads to changes in response times compared to former
versions, that could affect the compatibility to software with rigid time-out settings.
The evaluation of changes of the incoming C/I-code takes longer than in former versions
of the PEF 24901:
•Recognition of changes to unconditional commands (I.e.: to RES, SSP, LTD and DT)
takes up to 2,5 msec instead of 0.25 msec in former versions
•In states ’Test’ and ’Reset’ recognition of changes in the C/I channel can also take up
to 2,5 msec instead of 0.25 msec in former versions
•In states other than ’Reset’ or ’Test’ recognition of changes to all other conditional
commands takes up to 0,5 ms instead of 0.25 msec in former versions
The C/I codes shall be repeated at least the times above, before the C/I code may be
changed. Surveillance timers have to be set to values beyond the named times.
15 MON-8 Messages in State ’Reset’
The issuing of MON-8 messages has been improved in state ’Reset’
If the state ’Reset’ is entered due to a hardware reset (pin RES=0) the device will issue
a MON-8 message AST afterwards if one of the pins STxy is high to communicate this
status to the system software.
The usage of MON-8 commands is not blocked during a Software Reset, i.e. the C/I-
command RES is applied. Even while the SW-reset is activated, the relay driver pins can
be programmed by the MON-8 message SETD, and the status pins can be read with
RST messages or will autonomously communicate changes of the status. The device will
also answer on a RID-command with a AID-message.
16 C/I-Channel Indication in Hardware Reset
As long as pin RES is low, the issued C/I-code is DI (1111b) instead of DEAC (0001b) for
all channels. After putting RES to high the C/I-codes change to DEAC.
17 Hardware Reset Execution
In contrast to former versions of the DFE-T, a hardware reset to the DFE-T V2.1 by
RES =’0’ takes effect immediately and requires no clocks on IOM-2. However, the DFE-
T V2.1 must be supplied with 15.36 MHz masterclock on pin CL15. The end of reset
execution is delayed internally for 900µs.
