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FSFM260N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

FSFM260N / FSFM300N Rev. 1.0.0

April 2009

FSFM260N / FSFM300N

Green-Mode Fairchild Power Switch (FPS™)

Features

!Internal Avalanche-Rugged SenseFET

!Advanced Burst-Mode Operation Consumes Under

1W at 240VAC and 0.5W Load

!Precision Fixed Operating Frequency: 67kHz

!Internal Startup Circuit

!Over-Voltage Protection (OVP)

!Overload Protection (OLP)

!Internal Thermal Shutdown Function (TSD)

!Abnormal Over-Current Protection (AOCP)

!Auto-Restart Mode

!Under-Voltage Lockout (UVLO) with Hysteresis

!Low Operating Current: 2.5mA

!Built-in Soft-Start: 15ms

Applications

!Power Supply for LCD TV and Monitor, VCR, SVR,

STB, DVD, and DVD Recorder

!Adapter

Related Resources

Visit: http://www.fairchildsemi.com/apnotes/ for:

!AN-4134: Design Guidelines for Offline Forward

Converters Using Fairchild Power Switch (FPS™)

!AN-4137: Design Guidelines for Offline Flyback

Converters Using Fairchild Power Switch (FPS™)

!AN-4140: Transformer Design Consideration for

Offline Flyback Converters Using Fairchild Power

Switch (FPS™)

!AN-4141: Troubleshooting and Design Tips for

Fairchild Power Switch (FPS™) Flyback Applications

!AN-4145: Electromagnetic Compatibility for Power

Converters

!AN-4147: Design Guidelines for RCD Snubber of

Flyback Converters

!AN-4148: Audible Noise Reduction Techniques for

Fairchild Power Switch (FPS™) Applications

Description

The FSFM260/300 is an integrated Pulse Width

Modulator (PWM) and SenseFET specifically designed

for high-performance offline Switch Mode Power

Supplies (SMPS) with minimal external components.

This device is an integrated high-voltage power-

switching regulator that combines an avalanche-rugged

SenseFET with a current-mode PWM control block. The

PWM controller includes an integrated fixed-frequency

oscillator, under-voltage lockout, leading-edge blanking

(LEB), optimized gate driver, internal soft-start,

temperature-compensated precise-current sources for a

loop compensation, and self-protection circuitry.

Compared with discrete MOSFET and PWM controller

solutions, it can reduce total cost, component count, size,

and weight while simultaneously increasing efficiency,

productivity, and system reliability. This device is a basic

platform for cost-effective designs of flyback converters.

FSFM260N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

FSFM260N / FSFM300N Rev. 1.0.0 2

Ordering Information

Notes:

1. The junction temperature can limit the maximum output power.

2. 230VAC or 100/115VAC with doubler.

3. Typical continuous power in a non-ventilated enclosed adapter measured at 50°C ambient temperature.

4. Maximum practical continuous power in an open-frame design at 50°C ambient.

5. Eco status for both the FSFM2600N and FSFM300NS is RoHS.

For Fairchild’s definition of “green” Eco Status, please visit:

http://www.fairchildsemi.com/company/green/rohs_green.html. Eco Status: RoHS.

Product

Number PKG.(5) Operating

Temp.

Current

Limit

RDS(ON)

Max.

Maximum Output Power(1)

Replaces

Devices

230VAC±15%(2) 85-265VAC

Adapter(3) Open

Frame(4) Adapter(3) Open

Frame(4)

FSFM260N 8-DIP -25 to +85°C 1.5A 2.6Ω23W 35W 17W 26W FSDM0465RS

FSQ0465RS

FSFM300N 8-DIP -25 to +85°C 1.6A 2.2Ω26W 40W 20W 30W

FSFM260N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

FSFM260N / FSFM300N Rev. 1.0.0 3

Application Diagram

Figure 1. Typical Flyback Application

Internal Block Diagram

Figure 2. Internal Block Diagram

VCC

GND

Drain

PWM

VSTR

FSFM260 Rev. 00

ILIM

8V/12V

Vref

VCC

Idelay IFB

VSD

VOVP

VOCP

2.5R

VCC good

VCC Drain

GND

Gate

driver

VCC good

VBURL/VBURH

ILIM

OSC

Vstr

2 85

FSFM260 Rev.00

VCC

TSD

Burst

Normal PWM

LEB

250ns

VCC

Soft-

Start

LPF

FSFM260N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

FSFM260N / FSFM300N Rev. 1.0.0 4

Pin Configuration

Figure 3. Pin Configuration (Top View)

Pin Definitions

Pin # Name Description

1GNDGround. This pin is the control ground and the SenseFET source.

Power Supply. This pin is the positive supply input, providing internal operating current for

both startup and steady-state operation.

3FB

Feedback. This pin is internally connected to the inverting input of the PWM comparator. The

collector of an opto-coupler is typically tied to this pin. For stable operation, a capacitor should

be placed between this pin and GND. If the voltage of this pin reaches 6V, the overload pro-

tection triggers, which shuts down the FPS.

LIM

Peak Current Limit. Adjusts the peak current limit of the Sense FET. The feedback 0.9mA

current source is diverted to the parallel combination of an internal 2.8kΩ resistor and any ex-

ternal resistor to GND on this pin to determine the peak current limit.

STR

Startup. This pin is connected directly, or through a resistor, to the high-voltage DC link. At

startup, the internal high-voltage current source supplies internal bias and charges the exter-

nal capacitor connected to the VCC pin. Once VCC reaches 12V, the internal current source is

disabled. It is not recommended to connect VSTR and drain together.

6,7,8 Drain SenseFET Drain. High-voltage power SenseFET drain connection.

GND

VCC

ILIM VSTR

8-DIP

Drain

FSFM260 Rev.1.0.0

Drain

FSFM260N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

FSFM260N / FSFM300N Rev. 1.0.0 5

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera-

ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi-

tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. The

absolute maximum ratings are stress ratings only. TA = 25°C, unless otherwise specified.

Notes:

6. VFB is internally clamped and its maximum clamping current capability is 100μA.

7. Repetitive rating: pulse-width limited by maximum junction temperature.

8. L=14mH, starting TJ=25°C.

Thermal Impedance

TA = 25°C unless otherwise specified.

Notes:

9. Free standing with no heat-sink under natural convection.

10. Infinite cooling condition - refer to the SEMI G30-88.

11. Measured on the package top surface.

Symbol Parameter Min. Max. Unit

VSTR VSTR Pin Voltage 650 V

VDS Drain Pin Voltage 650 V

VCC Supply Voltage 21 V

VFB Feedback Voltage Range(6) -0.3 8.0 V

IDM Drain Current Pulsed 9.6 A

Continuous Drain Current of

FSFM260(7)

TC = 25°C 2.2

TC = 100°C 1.4

Continuous Drain Current of

FSFM300(7)

TC = 25°C 2.8

TC = 100°C 1.7

EAS Single Pulsed Avalanche Energy(8) FSFM260 120 mJ

FSFM300 190

PDTotal Power Dissipation (TC=25°C) 1.5 W

TJOperating Junction Temperature Internally Limited °C

TAOperating Ambient Temperature -25 +85 °C

TSTG Storage Temperature -55 +150 °C

ESD

Electrostatic Discharge Capability Human Body Model,

JESD22-A114 2.0

Electrostatic Discharge Capability, Charged Device Model,

JESD22-C110 2.0

Symbol Parameter Package Value Unit

θJA Junction-to-Ambient Thermal Resistance(9)

8-DIP

80 °C/W

θJC Junction-to-Case Thermal Resistance(10) 20 °C/W

ΨJT Junction-to-Top Thermal Resistance(11) 35 °C/W

FSFM260N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

FSFM260N / FSFM300N Rev. 1.0.0 6

Electrical Characteristics

TA = 25°C unless otherwise specified.

Symbol Parameter Condition Min. Typ. Max. Unit

SenseFET Section

BVDSS

Drain Source Breakdown Voltage

VCC = 0V, ID = 250µA 650 V

IDSS1 Zero Gate Voltage Drain Current1 VDS = 650V, VGS = 0V,

TC = 25°C 250 µA

IDSS2 Zero Gate Voltage Drain Current2 VDS = 520V, VGS = 0V,

TC = 125°C 250 µA

RDS(ON)

Static Drain Source on Resistance of

FSFM260(12)

VGS = 10V, ID = 2.5A

2.20 2.60 Ω

Static Drain Source on Resistance of

FSFM300(12) 1.76 2.20 Ω

COSS Output Capacitance of FSFM260 VGS = 0V, VDS = 25V, f = 1MHz 60 pF

td(on) Turn-On Delay Time of FSFM260

VDD = 325V, ID = 5A

trRise Time of FSFM260 20

td(off) Turn-Off Delay Time of FSFM260 65

tfFall Time of FSFM260 27

COSS Output Capacitance of FSFM300 VGS = 0V, VDS = 25V, f = 1MHz 75 pF

td(on) Turn-On Delay Time of FSFM300

VDD = 325V, ID = 5A

trRise Time of FSFM300 26

td(off) Turn-Off Delay Time of FSFM300 32

tfFall Time of FSFM300 25

Control Section

fOSC Switching Frequency VFB = 3V 61 67 73 kHz

ΔfSTABLE Switching Frequency Stability 13V ≤ VCC ≤ 18V 0 1 3 %

ΔfOSC Switching Frequency Variation(13) -25°C ≤ TA ≤ 85°C 0 ±5 ±10 %

IFB Feedback Source Current VFB = GND 0.7 0.9 1.1 mA

DMAX Maximum Duty Cycle 71 77 83 %

DMIN Minimum Duty Cycle 0 %

VSTART UVLO Threshold Voltage VFB = GND 11 12 13 V

VSTOP 789V

tS/S Internal Soft-Start Time VFB = 3V 10 15 20 ms

Burst Mode Section

VBURH Burst Mode Voltages VCC = 14V 0.50 V

VBURL 0.35 V

FSFM260N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

FSFM260N / FSFM300N Rev. 1.0.0 7

Electrical Characteristics (Continued)

TA = 25°C unless otherwise specified.

Notes:

12. Pulse test: pulse width ≤ 300µs, duty ≤ 2%.

13. Guaranteed by design; not tested in production.

Symbol Parameter Condition Min. Typ. Max. Unit

Protection Section

VSD Shutdown Feedback Voltage VFB ≥ 5.5V 5.5 6.0 6.5 V

IDELAY Shutdown Delay Current VFB = 5V 3.5 5.0 6.5 µA

tLEB Leading Edge Blanking Time(13) 200 ns

ILIMIT Peak Current Limit FSFM260 TJ = 25°C, di/dt = 200mA/µs 1.32 1.50 1.68 A

FSFM300 1.41 1.60 1.79

VOVP Over-Voltage Protection 18.0 19.0 20.5 V

TSD Thermal Shutdown Temperature(13) 125 140 °C

Total Device Section

IOP Operating Supply Current VFB = GND, VCC = 14V 135mA

ISTART Start Current VCC = 10V (before VCC

reaches VSTART)150 200 250 µA

ICH Startup Charging Current VCC = 0V, VSTR=min. 50V 0.70 0.85 1.00 mA

VSTR Minimum VSTR Supply Voltage at ISTRIN=ISTART 24 V

FSFM260N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

FSFM260N / FSFM300N Rev. 1.0.0 8

Typical Performance Characteristics

Graphs are normalized at TA= 25°C.

Figure 4. Operating Supply Current (IOP) vs. TAFigure 5. UVLO Start Threshold Voltage

(VSTART) vs. TA

Figure 6. UVLO Stop Threshold Voltage

(VSTOP) vs. TA

Figure 7. Startup Charging Current (ICH) vs. TA

Figure 8. Switching Frequency (fOSC) vs. TAFigure 9. Maximum Duty Cycle (DMAX) vs. TA

-25 0 25 50 75 100 125

0.0

0.2

0.4

0.6

0.8

1.0

1.2

Normalized

Temperature [°C]

-25 0 25 50 75 100 125

0.0

0.2

0.4

0.6

0.8

1.0

1.2

Normalized

Temperature [°C]

-25 0 25 50 75 100 125

0.0

0.2

0.4

0.6

0.8

1.0

1.2

Normalized

Temperature [°C]

-25 0 25 50 75 100 125

0.0

0.2

0.4

0.6

0.8

1.0

1.2

Normalized

Temperature [°C]

-25 0 25 50 75 100 125

0.0

0.2

0.4

0.6

0.8

1.0

1.2

Normalized

Temperature [°C]

-25 0 25 50 75 100 125

0.0

0.2

0.4

0.6

0.8

1.0

1.2

Normalized

Temperature [°C]

FSFM260N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

FSFM260N / FSFM300N Rev. 1.0.0 9

Typical Performance Characteristics (Continued)

Graphs are normalized at TA= 25°C.

Figure 10. Over-Voltage Protection (VOVP) vs. TAFigure 11. Feedback Source Current (IFB) vs. TA

Figure 12. Shutdown Delay Current (IDELAY) vs. TA Figure 13. Burst-Mode HIGH Threshold Voltage

(VBURH) vs. TA

Figure 14. Burst-Mode LOW Threshold Voltage

(VBURL) vs. TA

Figure 15. Peak Current Limit (ILIMIT) vs. TA

-25 0 25 50 75 100 125

0.0

0.2

0.4

0.6

0.8

1.0

1.2

Normalized

Temperature [°C]

-25 0 25 50 75 100 125

0.0

0.2

0.4

0.6

0.8

1.0

1.2

Normalized

Temperature [°C]

-25 0 25 50 75 100 125

0.0

0.2

0.4

0.6

0.8

1.0

1.2

Normalized

Temperature [°C]

-25 0 25 50 75 100 125

0.0

0.2

0.4

0.6

0.8

1.0

1.2

Normalized

Temperature [°C]

-25 0 25 50 75 100 125

0.0

0.2

0.4

0.6

0.8

1.0

1.2

Normalized

Temperature [°C]

-25 0 25 50 75 100 125

0.0

0.2

0.4

0.6

0.8

1.0

1.2

Normalized

Temperature [°C]

FSFM260N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

FSFM260N / FSFM300N Rev. 1.0.0 10

Functional Description

1. Startup: In previous generations of Fairchild Power

Switches (FPS™), the VCC pin had an external startup

resistor to the DC input voltage line. In this generation,

the startup resistor is replaced by an internal high-

voltage current source. At startup, an internal high-

voltage current source supplies the internal bias and

charges the external capacitor (Cvcc) connected to the

VCC pin, as illustrated in Figure 16. When VCC reaches

12V, the FSFM260/300 begins switching and the internal

high-voltage current source is disabled. Then, the

FSFM260/300 continues its normal switching operation

and the power is supplied from the auxiliary transformer

winding unless VCC goes below the stop voltage of 8V.

Figure 16. Internal Startup Circuit

2. Feedback Control: FSFM260/300 employs current-

mode control, as shown in Figure 17. An opto-coupler

(such as the FOD817A) and shunt regulator (such as the

KA431) are typically used to implement the feedback

network. Comparing the feedback voltage with the

voltage across the RSENSE resistor makes it possible to

control the switching duty cycle. When the reference pin

voltage of the shunt regulator exceeds the internal

reference voltage of 2.5V, the optocoupler LED current

increases, pulling down the feedback voltage and

reducing the duty cycle. This typically occurs when the

input voltage is increased or the output load is

decreased.

2.1 Pulse-by-Pulse Current Limit: Because current-

mode control is employed, the peak current through the

SenseFET is determined by the inverting input of the

PWM comparator (VFB*), as shown in Figure 17. When

the current through the opto-transistor is zero and the

current limit pin (#4) is left floating, the feedback current

source (IFB) of 0.9mA flows only through the internal

resistor (R+2.5R=2.8k). In this case, the cathode voltage

of diode D2 and the peak drain current have maximum

values of 2.5V and 1.5A, respectively. The pulse-by-

pulse current limit can be adjusted using a resistor to

GND on the current limit pin (#4). The current limit level

using an external resistor (RLIM) is given by:

where, ILIM is the desired drain current limit.

Figure 17. Pulse Width Modulation (PWM) Circuit

2.2 Leading-Edge Blanking (LEB): At the instant the

internal SenseFET is turned on, a high-current spike

occurs through the SenseFET, caused by primary-side

capacitance and secondary-side rectifier reverse

recovery. Excessive voltage across the RSENSE resistor

would lead to incorrect feedback operation in the current-

mode PWM control. To counter this effect, the FSFM260/

300 employs a leading edge blanking (LEB) circuit. This

circuit inhibits the PWM comparator for a short time

(tLEB) after the SenseFET is turned on.

2.3 Constant Power Limit Circuit: Due to the circuit

delay of FPS, the pulse-by-pulse limit current increases

a little bit when the input voltage increases. This means

unwanted excessive power is delivered to the secondary

side. To compensate, the auxiliary power compensation

network in Figure 18 can be used. RLIM can adjust pulse-

by-pulse current by absorbing internal current source

(IFB: typical value is 0.9mA) depending on the ratio

between resistors. With the suggested compensation

circuit, additional current from IFB is absorbed more

proportionally to the input voltage (VDC) and achieves

constant power in wide input range. Choose RLIM for

proper current to the application, then check the pulse-

by-pulse current difference between minimum and

maximum input voltage. To eliminate the difference (to

gain constant power), Ry can be calculated by:

8V/12V

Vref

Internal

Bias

VCC

Vstr

Istart

VCC good

VDC

CVcc

FSFM260 Rev: 00

(1)

LIM

SPE

LIMLIM

LIM Rk

I+Ω

⋅

=8.2

(2)

LIMSPEC_LIM

LIM

LIM II

k8.2I

R−

⋅

==>

3OSC

VCC VCC

Idelay IFB

VSD

2.5R

Gate

driver

OLP

D1 D2

Vfb*

Vfb

KA431

FOD817A

Rsense

SenseFET

FSFM260 Rev: 00

lim_spec dc

fb lim_comp

RIΔI

××

≅×(3)

FSFM260N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

FSFM260N / FSFM300N Rev. 1.0.0 11

where, Ilim_spec is the limit current stated on the

specification; Na and Np are the number of turns for VCC

and primary side, respectively; Ifb is the internal current

source at feedback pin with a typical value of 0.9mA; and

ΔIlim_comp is the current difference that must be

eliminated. In case of capacitor in the circuit 1µF, 100V is

good choice for all applications.

Figure 18. Constant Power Limit Circuit

Figure 19. Auto Restart Operation

3. Protection Circuit: The FSFM260/300 has several

self protective functions, such as overload protection

(OLP), over-voltage protection (OVP), and thermal

shutdown (TSD). Because these protection circuits are

fully integrated into the IC without external components,

the reliability is improved without increasing cost. Once

the fault condition occurs, switching is terminated and

the SenseFET remains off. This causes VCC to fall.

When VCC reaches the UVLO stop voltage, 8V, the

protection is reset and the internal high-voltage current

source charges the VCC capacitor via the Vstr pin. When

VCC reaches the UVLO start voltage, 12V, the FSFM260/

300 resumes normal operation. In this manner, the auto-

restart can alternately enable and disable the switching

of the power SenseFET until the fault condition is

eliminated (see Figure 19).

3.1 Overload Protection (OLP): Overload is defined as

the load current exceeding a pre-set level due to an

unexpected event. In this situation, the protection circuit

should be activated to protect the SMPS. However, even

when the SMPS is in the normal operation, the overload

protection circuit can be activated during the load

transition. To avoid this undesired operation, the

overload protection circuit is designed to be activated

after a specified time to determine whether it is a

transient situation or an overload situation. Because of

the pulse-by-pulse current limit capability, the maximum

peak current through the SenseFET is limited and,

therefore the maximum input power is restricted with a

given input voltage. If the output consumes beyond this

maximum power, the output voltage (VO) decreases

below the set voltage. This reduces the current through

the opto-coupler LED, which also reduces the opto-

coupler transistor current, increasing the feedback

voltage (VFB). If VFB exceeds 2.5V, D1 is blocked and

the 5µA current source starts to charge CB slowly up to

VCC. In this condition, VFB continues increasing until it

reaches 6V, when the switching operation is terminated,

as shown in Figure 20. The delay time for shutdown is

the time required to charge CB from 2.5V to 6.0V with

5µA. In general, a 10 ~ 50ms delay time is typical for

most applications.

Figure 20. Overload Protection

Vfb Drain

Vcc

GND

I_lim

VDC Np

RLIM

DCyN

VV ×=

compensation

network

FSFM260 Rev. 00

Fault

situation

12V

Vcc

Vds

Fault

occurs Fault

removed

Normal

operation

Normal

operation

Power

FSFM260 Rev: 00

VFB

2.5V

6.0V

Overload protection

T12= Cfb*(6.0-2.5)/Idelay

T1T2

FSFM260 Rev: 00

FSFM260N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

FSFM260N / FSFM300N Rev. 1.0.0 12

3.2 Over-Voltage Protection (OVP): If the secondary

side feedback circuit malfunctions or a solder defect

causes an open in the feedback path, the current

through the opto-coupler transistor becomes almost

zero. Then, VFB climbs up in a similar manner to the

overload situation, forcing the preset maximum current

to be supplied to the SMPS until the overload protection

is activated. Because more energy than required is

provided to the output, the output voltage may exceed

the rated voltage before the overload protection is

activated, resulting in the breakdown of the devices in

the secondary side. To prevent this situation, an over-

voltage protection (OVP) circuit is employed. In general,

VCC is proportional to the output voltage and the

FSFM260/300 uses VCC instead of directly monitoring

the output voltage. If VCC exceeds 19V, an OVP circuit is

activated, terminating the switching operation. To avoid

undesired activation of OVP during normal operation,

VCC should be designed below 19V.

3.3 Thermal Shutdown (TSD): The SenseFET and the

control IC are built in one package. This allows for the

control IC to detect the heat generation from the

SenseFET. When the temperature exceeds

approximately 140°C, the thermal shutdown is activated.

3.4 Abnormal Over-Current Protection (AOCP): When

the secondary rectifier diodes or the transformer pins are

shorted, a steep current with extremely high di/dt can

flow through the SenseFET during the LEB time. Even

though the FPS has overload protection, it is not enough

to protect the FPS in those abnormal cases, since

severe current stress is imposed on the SenseFET until

OLP triggers. This IC has an internal AOCP circuit

shown in Figure 21. When the gate turn-on signal is

applied to the power SenseFET, the AOCP block is

enabled and monitors the current through the sensing

resistor. The voltage across the resistor is compared with

a preset AOCP level. If the sensing resistor voltage is

greater than the AOCP level, the set signal is applied to

the latch, resulting in the shutdown of the SMPS.

Figure 21. Abnormal Over-Current Protection

4. Soft-Start: The FSFM260/300 has an internal soft-

start circuit that increases PWM comparator inverting

input voltage, together with the SenseFET current,

slowly after it starts up. The typical soft-start time is

15ms. The pulse width to the power switching device is

progressively increased to establish the correct working

conditions for transformers, inductors, and capacitors.

The voltage on the output capacitors is progressively

increased to smoothly establish the required output

voltage. It also helps prevent transformer saturation and

reduce the stress on the secondary diode during startup.

5. Burst Operation: To minimize power dissipation in

standby mode, the FSFM260/300 enters burst mode

operation. As the load decreases, the feedback voltage

decreases. As shown in Figure 22, the device

automatically enters burst mode when the feedback

voltage drops below VBURL (350mV). At this point,

switching stops and the output voltages start to drop at a

rate dependent on standby current load. This causes the

feedback voltage to rise. Once it passes VBURH (500mV)

switching resumes. The feedback voltage then falls and

the process repeats. Burst mode operation alternately

enables and disables switching of the power SenseFET,

thereby reducing switching loss in standby mode.

Figure 22. Waveforms of Burst Operation

OSC

VOCP

GND

Gate

driver

LEB

FSFM260 Rev: 00

2.5R

AOCP protection

VFB

Vds

0.35V

0.5V

Ids

Voset

time

Switching

disabled

T1 T2 T3

Switching

disabled T4

FSFM260 Rev: 00

FSFM260N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

FSFM260N / FSFM300N Rev. 1.0.0 13

PCB Layout Guide

Due to the combined scheme, FPS shows better noise

immunity than conventional PWM controller and

MOSFET discrete solutions. Furthermore, internal drain

current sense eliminates noise generation caused by a

sensing resistor. There are some recommendations for

PCB layout to enhance noise immunity and suppress the

noise inevitable in power-handling components.

There are typically two grounds in the conventional

SMPS: power ground and signal ground. The power

ground is the ground for primary input voltage and

power, while the signal ground is ground for PWM

controller. In FPS, those two grounds share the same

pin, GND. Normally the separate grounds do not share

the same trace and meet only at one point, the GND pin.

More, wider patterns for both grounds are good for large

currents by decreasing resistance.

Capacitors at the VCC and FB pins should be as close as

possible to the corresponding pins to avoid noise from

the switching device. Sometimes Mylar® or ceramic

capacitors with electrolytic for VCC is better for smooth

operation. The ground of these capacitors needs to

connect to the signal ground not the power ground.

The cathode of the snubber diode should be close to the

drain pin to minimize stray inductance. The Y-capacitor

between primary and secondary should be directly

connected to the power ground of DC link to maximize

surge immunity.

Because the voltage range of feedback line is small, it is

affected by the noise of the drain pin. Those traces

should not draw across or close to the drain line.

In FSFM260/300, drain pins are the heat radiation pins,

so wider PCB pattern is recommended to decrease the

package temperature. Drain pins are also high voltage

switching pins; however, too wide PCB pattern may

deteriorate EMI immunity.

Figure 23. Recommended PCB Layout

Mylar® is a registered trademark of DuPont Teijin Films.

FSFM260N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

FSFM260N / FSFM300N Rev. 1.0.0 14

Typical Application Circuit

Features

!Average efficiency of 25%, 50%, 75%, and 100% load conditions is higher than 80% at universal input

!Low standby mode power consumption (<1W at 230VAC input and 0.5W load)

!Enhanced system reliability through various protection functions

!Internal soft-start (15ms)

Key Design Notes

!The delay time for overload protection is designed to be about 23ms with C105 of 33nF. If faster/slower triggering of

OLP is required, C105 can be changed to a smaller/larger value (e.g. 100nF for 70ms).

!The SMD-type 100nF capacitor must be placed as close as possible to VCC pin to avoid malfunction by abrupt pul-

sating noises and to improve surge immunity.

1. Schematic

Figure 24. Demonstation Circuit of FSFM300N

Application FPS™ Device Input Voltage

Range Rated Output Power Output Voltage

(Maximum Current)

LCD Monitor

Power Supply FSFM300N 85-265VAC 30W 5.0V (2.0A)

14V (1.4A)

C102

150nF

275VAC

LF101

30mH

C101

150nF

275VAC

RT1

NTC

5D-9

FUSE

250V

C103

100 F

400V

R103

51k

C104

3.3nF

630V

D101

1N4007

C105

33nF

100V

EER3016

BD101

2KBP06M

R101

FSFM300N

VSTR

FB VCC

Drain

GND

6,7,8

C201

1000 F

25V

C202

1000 F

25V

L201

14V, 1.4A

D202

MBRF1060

C203

2200 F

10V

C204

1000 F

10V

L202

5V, 2A

R201

R202

1.2k

R204

R203

18k

C205

47nF

R205

C301

4.7nF

IC301

FOD817C IC201

KA431

R102

75k

C107

47 F

50V

D102

UF 4004

C106

100nF

R108

N.C

ILIM

4R105

100

0.5W

ZD101

1N4745A

FSFM260N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

FSFM260N / FSFM300N Rev. 1.0.0 15

2. Transformer

Figure 25. Transformer Schematic Diagram

3. Winding Specification

4. Electrical Characteristics

5. Core & Bobbin

!Core: EER3016 (Ae=109.7mm2)

!Bobbin: EER3016

Position No Pin (s→f) Wire Turns Winding Method

Bottom

Top

Np/2 3 → 20.25φ × 1 30 Two-Layer Solenoid Winding

Insulation: Polyester Tape t = 0.025mm, Three Layers

N14V 10 → 8 0.4φ × 2(TIW) 5 Solenoid Winding

Insulation: Polyester Tape t = 0.025mm, Three Layers

N5V 8 → 60.4φ × 3(TIW) 3 Solenoid Winding

Insulation: Polyester Tape t = 0.025mm, Three Layers

N5V 7 → 60.4φ × 3(TIW) 3 Solenoid Winding

Insulation: Polyester Tape t = 0.025mm, Three Layers

Na7 → 6 0.15φ × 1 7 Center Solenoid Winding

Insulation: Polyester Tape t = 0.025mm, Three Layers

Np/2 2 → 1 0.25φ × 1 19 Center Solenoid Winding

Insulation: Polyester Tape t = 0.025mm, Two Layers

Pin Specification Remarks

Inductance 1 - 3 1.2mH ± 10% 67kHz, 1V

Leakage 1 - 3 15µH Maximum Short all other pins

Bottom

Top

Np/2 2

N14V

N5V

Np/2 1

Na4 5

N5V 6

EER3016

N14V

Np/2

N5V

Np/2

N5V

GND

FSFM260N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

FSFM260N / FSFM300N Rev. 1.0.0 16

6. Evaluation Board Part List

Part Value Note Part Value Note

Resistor Inductor

R101 1MΩ1W L201 5µH 5A Rating

R102 75kΩ1/2W L202 5µH 5A Rating

R103 51kΩ1W Diode

R105 100Ω1/4W D101 IN4007 1A, 1000V General-Purpose

Rectifier

R108 10kΩ1/4W D102 UF4004 1A, 400V Ultrafast Rectifier

R201 1kΩ1/4W ZD101 1N4745A 1W 16V Zener Diode

(optional)

R202 1.2kΩ1/4W D201 MBRF10H100 10A,100V Schottky Rectifier

R203 18kΩ1/4W D202 MBRF1060 10A,60V Schottky Rectifier

R204 8kΩ1/4W IC

R205 8kΩ1/4W IC101 FSFM300N FPS™

Capacitor IC201 KA431 (TL431) Voltage Reference

C101 150nF/275VAC Box Capacitor IC202 FOD817A Opto-Coupler

C102 150nF/275VAC Box Capacitor Fuse

C103 100µF/400V Electrolytic Capacitor Fuse 2A/250V

C104 3.3nF/630V Film Capacitor NTC

C105 33nF/50V Ceramic Capacitor RT101 5D-9

C106 100nF/50V SMD (1206) Bridge Diode

C107 47µF/50V Electrolytic Capacitor BD101 2KBP06M2N257 Bridge Diode

C201 1000µF/25V Low-ESR Electrolytic

Capacitor Line Filter

C202 1000µF/25V Low-ESR Electrolytic

Capacitor LF101 34mH

C203 2200µF/10V Low-ESR Electrolytic

Capacitor Transformer

C204 1000µF/10V Low-ESR Electrolytic

Capacitor T1 EER3016 Ae=109.7mm2

C205 47nF/50V Ceramic Capacitor

C301 4.7nF/1kV Ceramic Capacitor

FSFM260N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

FSFM260N / FSFM300N Rev. 1.0.0 17

Package Dimensions

Figure 26. 8-Lead Dual Inline Package (DIP)

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please

note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package

specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www.fairchildsemi.com/packaging/.

5.08 MAX

0.33 MIN

2.54

7.62

0.56

0.355

1.65

1.27

3.683

3.20

3.60

3.00

6.67

6.096

9.83

9.00

7.62

9.957

7.87

0.356

0.20

NOTES: UNLESS OTHERWISE SPECIFIED

A) THIS PACKAGE CONFORMS TO

JEDEC MS-001 VARIATION BA

B) ALL DIMENSIONS ARE IN MILLIMETERS.

C) DIMENSIONS ARE EXCLUSIVE OF BURRS,

MOLD FLASH, AND TIE BAR EXTRUSIONS.

D) DIMENSIONS AND TOLERANCES PER

ASME Y14.5M-1994

8.255

7.61

E) DRAWING FILENAME AND REVSION: MKT-N08FREV2.

(0.56)

FSFM260N / FSFM300N — Green-Mode Farichild Power Switch (FPS™)

FSFM260N / FSFM300N Rev. 1.0.0 18