SSM6N7002CFU MOSFETs Silicon N-Channel MOS SSM6N7002CFU 1. Applications * High-Speed Switching 2. Features (1) Gate-Source diode for protection (2) Low drain-source on-resistance : RDS(ON) = 2.8 (typ.) (@VGS = 10 V, ID = 100 mA) RDS(ON) = 3.1 (typ.) (@VGS = 5 V, ID = 100 mA) RDS(ON) = 3.2 (typ.) (@VGS = 4.5 V, ID = 100 mA) 3. Packaging and Pin Assignment 1. Source1 2. Gate1 3. Drain2 4. Source2 5. Gate2 6. Drain1 US6 Start of commercial production 1 2015-04 2015-04-13 Rev.1.0 SSM6N7002CFU 4. Absolute Maximum Ratings (Note) (Unless otherwise specified, Ta = 25 ) (Q1,Q2 Common) Characteristics Symbol Rating Unit V Drain-source voltage VDSS 60 Gate-source voltage VGSS 20 (Note 1) ID 170 (Note 1), (Note 2) IDP 680 Drain current (DC) Drain current (pulsed) Power dissipation (Note 3) mA PD 285 mW Channel temperature Tch 150 Storage temperature Tstg -55 to 150 Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook ("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 1: Ensure that the channel temperature does not exceed 150 . Note 2: Pulse width (PW) 10 s, duty 1% Note 3: Device mounted on an FR-4 board.(total dissipation) (25.4 mm x 25.4 mm x 1.6 mm ,Cu pad: 645 mm2) Note: Note: The MOSFETs in this device are sensitive to electrostatic discharge. When handling this device, the worktables, operators, soldering irons and other objects should be protected against anti-static discharge. The channel-to-ambient thermal resistance, Rth(ch-a), and the drain power dissipation, PD, vary according to the board material, board area, board thickness and pad area. When using this device, be sure to take heat dissipation fully into account. 2 2015-04-13 Rev.1.0 SSM6N7002CFU 5. Electrical Characteristics 5.1. Static Characteristics (Unless otherwise specified, Ta = 25 )(Q1,Q2 Common) Characteristics Symbol Gate leakage current IGSS Drain cut-off current IDSS Drain-source breakdown voltage Min Typ. Max Unit VDS = 0 V, VGS = 16 V 2 A VDS = 0 V, VGS = 10 V 0.5 VDS = 0 V, VGS = 5 V 0.1 VDS = 60 V, VGS = 0 V 1 VDS = 60 V, VGS = 0 V, Tj = 150 200 V(BR)DSS ID = 250 A, VGS = 0 V Gate threshold voltage (Note 1) Drain-source on-resistance (Note 2) Forward transfer admittance Test Condition (Note 2) A 60 V 1.1 2.1 V RDS(ON) ID = 100 mA, VGS = 10 V 2.8 3.9 ID = 100 mA, VGS = 10 V, Tj = 150 5.4 8.1 ID = 100 mA, VGS = 5 V 3.1 4.4 ID = 100 mA, VGS = 4.5 V 3.2 4.7 VDS = 10 V, ID = 200 mA 450 Vth |Yfs| ID = 250 A, VDS = VGS mS Note 1: Let Vth be the voltage applied between gate and source that causes the drain current (ID) to below (250 A for this device). Then, for normal switching operation, VGS(ON) must be higher than Vth, and VGS(OFF) must be lower than Vth. This relationship can be expressed as: VGS(OFF) < Vth < VGS(ON). Take this into consideration when using the device. Note 2: Pulse measurement. 5.2. Dynamic Characteristics (Unless otherwise specified, Ta = 25 )(Q1,Q2 Common) Characteristics Symbol Input capacitance Ciss Reverse transfer capacitance Crss Output capacitance Coss Switching time (turn-on delay time) td(on) Switching time (rise time) Switching time (turn-off delay time) Switching time (fall time) tr Test Condition VDS = 10 V, VGS = 0 V, f = 1 MHz VDD = 40 V, ID = 160 mA, VGS = 0 to 10 V, RG = 50 Min Typ. Max Unit 11 17 pF 0.7 3 2 4 3 td(off) 7 14 tf 24 ns 5.3. Switching Time Test Circuit Fig. 5.3.1 Switching Time Test Circuit Fig. 5.3.2 Input Waveform/Output Waveform 3 2015-04-13 Rev.1.0 SSM6N7002CFU 5.4. Gate Charge Characteristics (Unless otherwise specified, Ta = 25 ) (Q1,Q2 Common) Characteristics Symbol Total gate charge (gate-source plus gate-drain) Qg Gate-source charge Qgs Gate-drain charge Qgd Test Condition VDS = 30 V, ID = 200 mA, VGS = 4.5 V Min Typ. Max Unit 0.27 0.35 nC 0.08 0.08 5.5. Source-Drain Characteristics (Unless otherwise specified, Ta = 25 ) (Q1,Q2 Common) Characteristics Diode forward voltage Symbol (Note 1) VDSF Test Condition ID = -115 mA, VGS = 0 V Min Typ. Max Unit -0.87 -1.2 V Note 1: Pulse measurement. 6. Marking Fig. 6.1 Marking 4 2015-04-13 Rev.1.0 SSM6N7002CFU 7. Characteristics Curves (Q1,Q2 Common) (Note) Fig. 7.1 ID - VDS Fig. 7.2 ID - VGS Fig. 7.3 RDS(ON) - VGS Fig. 7.4 RDS(ON) - ID Fig. 7.5 RDS(ON) - Ta Fig. 7.6 Vth - Ta 5 2015-04-13 Rev.1.0 SSM6N7002CFU Note: Fig. 7.7 IDR - VDS Fig. 7.8 C - VDS Fig. 7.9 t - ID Fig. 7.10 Dynamic Input Characteristics Fig. 7.11 rth - tw Fig. 7.12 Safe Operating Area The above characteristics curves are presented for reference only and not guaranteed by production test, unless otherwise noted. 6 2015-04-13 Rev.1.0 SSM6N7002CFU Package Dimensions Unit: mm Weight: 6.8 mg (typ.) Package Name(s) Nickname: US6 7 2015-04-13 Rev.1.0 SSM6N7002CFU RESTRICTIONS ON PRODUCT USE * Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively "Product") without notice. * This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with TOSHIBA's written permission, reproduction is permissible only if reproduction is without alteration/omission. * Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. 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